From 5c36dcff44484d6f9ad1b9d3047ebb2d78abdaf2 Mon Sep 17 00:00:00 2001 From: Nithin Dabilpuram Date: Fri, 1 Oct 2021 19:10:07 +0530 Subject: [PATCH] common/cnxk: setup aura BP conf based on NIX Currently only NIX0 conf is setup in AURA for backpressure. This patch adds support for NIX1 as well. Signed-off-by: Nithin Dabilpuram Acked-by: Jerin Jacob --- drivers/common/cnxk/roc_nix_fc.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_fc.c b/drivers/common/cnxk/roc_nix_fc.c index f17eba4169..7eac7d01d4 100644 --- a/drivers/common/cnxk/roc_nix_fc.c +++ b/drivers/common/cnxk/roc_nix_fc.c @@ -284,8 +284,18 @@ rox_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, limit = rsp->aura.limit; /* BP is already enabled. */ if (rsp->aura.bp_ena) { + uint16_t bpid; + bool nix1; + + nix1 = !!(rsp->aura.bp_ena & 0x2); + if (nix1) + bpid = rsp->aura.nix1_bpid; + else + bpid = rsp->aura.nix0_bpid; + /* If BP ids don't match disable BP. */ - if ((rsp->aura.nix0_bpid != nix->bpid[0]) && !force) { + if (((nix1 != nix->is_nix1) || (bpid != nix->bpid[0])) && + !force) { req = mbox_alloc_msg_npa_aq_enq(mbox); if (req == NULL) return; @@ -315,14 +325,19 @@ rox_nix_fc_npa_bp_cfg(struct roc_nix *roc_nix, uint64_t pool_id, uint8_t ena, req->op = NPA_AQ_INSTOP_WRITE; if (ena) { - req->aura.nix0_bpid = nix->bpid[0]; - req->aura_mask.nix0_bpid = ~(req->aura_mask.nix0_bpid); + if (nix->is_nix1) { + req->aura.nix1_bpid = nix->bpid[0]; + req->aura_mask.nix1_bpid = ~(req->aura_mask.nix1_bpid); + } else { + req->aura.nix0_bpid = nix->bpid[0]; + req->aura_mask.nix0_bpid = ~(req->aura_mask.nix0_bpid); + } req->aura.bp = NIX_RQ_AURA_THRESH( limit > 128 ? 256 : limit); /* 95% of size*/ req->aura_mask.bp = ~(req->aura_mask.bp); } - req->aura.bp_ena = !!ena; + req->aura.bp_ena = (!!ena << nix->is_nix1); req->aura_mask.bp_ena = ~(req->aura_mask.bp_ena); mbox_process(mbox); -- 2.20.1