From 7201a9b56839e3c55822e5bc65f18099d9e72f64 Mon Sep 17 00:00:00 2001 From: Selwin Sebastian Date: Tue, 25 Jan 2022 17:47:42 +0530 Subject: [PATCH] net/axgbe: attempt always link training in KR mode Link training is always attempted when in KR mode, but the code is structured to check if link training has been enabled before attempting to perform it. Since that check will always be true, simplify the code to always enable and start link training during KR auto-negotiation. Signed-off-by: Selwin Sebastian Acked-by: Chandubabu Namburu --- drivers/net/axgbe/axgbe_mdio.c | 62 ++++++++-------------------------- 1 file changed, 15 insertions(+), 47 deletions(-) diff --git a/drivers/net/axgbe/axgbe_mdio.c b/drivers/net/axgbe/axgbe_mdio.c index 32d8c666f9..913ceada0d 100644 --- a/drivers/net/axgbe/axgbe_mdio.c +++ b/drivers/net/axgbe/axgbe_mdio.c @@ -80,31 +80,10 @@ static void axgbe_an_clear_interrupts_all(struct axgbe_port *pdata) axgbe_an37_clear_interrupts(pdata); } -static void axgbe_an73_enable_kr_training(struct axgbe_port *pdata) -{ - unsigned int reg; - - reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); - reg |= AXGBE_KR_TRAINING_ENABLE; - XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); -} - -static void axgbe_an73_disable_kr_training(struct axgbe_port *pdata) -{ - unsigned int reg; - - reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); - - reg &= ~AXGBE_KR_TRAINING_ENABLE; - XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); -} static void axgbe_kr_mode(struct axgbe_port *pdata) { - /* Enable KR training */ - axgbe_an73_enable_kr_training(pdata); - /* Set MAC to 10G speed */ pdata->hw_if.set_speed(pdata, SPEED_10000); @@ -114,9 +93,6 @@ static void axgbe_kr_mode(struct axgbe_port *pdata) static void axgbe_kx_2500_mode(struct axgbe_port *pdata) { - /* Disable KR training */ - axgbe_an73_disable_kr_training(pdata); - /* Set MAC to 2.5G speed */ pdata->hw_if.set_speed(pdata, SPEED_2500); @@ -126,9 +102,6 @@ static void axgbe_kx_2500_mode(struct axgbe_port *pdata) static void axgbe_kx_1000_mode(struct axgbe_port *pdata) { - /* Disable KR training */ - axgbe_an73_disable_kr_training(pdata); - /* Set MAC to 1G speed */ pdata->hw_if.set_speed(pdata, SPEED_1000); @@ -142,8 +115,6 @@ static void axgbe_sfi_mode(struct axgbe_port *pdata) if (pdata->kr_redrv) return axgbe_kr_mode(pdata); - /* Disable KR training */ - axgbe_an73_disable_kr_training(pdata); /* Set MAC to 10G speed */ pdata->hw_if.set_speed(pdata, SPEED_10000); @@ -154,8 +125,6 @@ static void axgbe_sfi_mode(struct axgbe_port *pdata) static void axgbe_x_mode(struct axgbe_port *pdata) { - /* Disable KR training */ - axgbe_an73_disable_kr_training(pdata); /* Set MAC to 1G speed */ pdata->hw_if.set_speed(pdata, SPEED_1000); @@ -166,8 +135,6 @@ static void axgbe_x_mode(struct axgbe_port *pdata) static void axgbe_sgmii_1000_mode(struct axgbe_port *pdata) { - /* Disable KR training */ - axgbe_an73_disable_kr_training(pdata); /* Set MAC to 1G speed */ pdata->hw_if.set_speed(pdata, SPEED_1000); @@ -178,8 +145,6 @@ static void axgbe_sgmii_1000_mode(struct axgbe_port *pdata) static void axgbe_sgmii_100_mode(struct axgbe_port *pdata) { - /* Disable KR training */ - axgbe_an73_disable_kr_training(pdata); /* Set MAC to 1G speed */ pdata->hw_if.set_speed(pdata, SPEED_1000); @@ -284,6 +249,12 @@ static void axgbe_an73_set(struct axgbe_port *pdata, bool enable, { unsigned int reg; + /* Disable KR training for now */ + reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); + reg &= ~AXGBE_KR_TRAINING_ENABLE; + XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); + + /* Update AN settings */ reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1); reg &= ~MDIO_AN_CTRL1_ENABLE; @@ -379,20 +350,17 @@ static enum axgbe_an axgbe_an73_tx_training(struct axgbe_port *pdata, XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL, reg); /* Start KR training */ - reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); - if (reg & AXGBE_KR_TRAINING_ENABLE) { - if (pdata->phy_if.phy_impl.kr_training_pre) - pdata->phy_if.phy_impl.kr_training_pre(pdata); + if (pdata->phy_if.phy_impl.kr_training_pre) + pdata->phy_if.phy_impl.kr_training_pre(pdata); - reg |= AXGBE_KR_TRAINING_START; - XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, - reg); - - PMD_DRV_LOG(DEBUG, "KR training initiated\n"); + reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); + reg |= AXGBE_KR_TRAINING_ENABLE; + reg |= AXGBE_KR_TRAINING_START; + XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); - if (pdata->phy_if.phy_impl.kr_training_post) - pdata->phy_if.phy_impl.kr_training_post(pdata); - } + PMD_DRV_LOG(DEBUG, "KR training initiated\n"); + if (pdata->phy_if.phy_impl.kr_training_post) + pdata->phy_if.phy_impl.kr_training_post(pdata); return AXGBE_AN_PAGE_RECEIVED; } -- 2.20.1