From 7ab475a0299ba379e1ac6efa3b29dbce2656289a Mon Sep 17 00:00:00 2001 From: Tomasz Duszynski Date: Thu, 15 Jul 2021 08:53:27 -0500 Subject: [PATCH] common/cnxk: support reading BPHY CGX/RPM FEC Before setting FEC for specific LMAC one needs to know which type is actually supported because it generally differs between modes LMAC operates in (SGMII, SFI, etc.). Signed-off-by: Tomasz Duszynski --- drivers/common/cnxk/roc_bphy_cgx.c | 25 +++++++++++++++++++++++++ drivers/common/cnxk/roc_bphy_cgx.h | 3 +++ drivers/common/cnxk/roc_bphy_cgx_priv.h | 4 ++++ drivers/common/cnxk/version.map | 1 + 4 files changed, 33 insertions(+) diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c index 056a3db47f..467b67686b 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.c +++ b/drivers/common/cnxk/roc_bphy_cgx.c @@ -395,3 +395,28 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac) { return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false); } + +int +roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac, + enum roc_bphy_cgx_eth_link_fec *fec) +{ + uint64_t scr1, scr0; + int ret; + + if (!roc_cgx || !fec) + return -EINVAL; + + if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac)) + return -EINVAL; + + scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_GET_SUPPORTED_FEC); + + ret = roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0); + if (ret) + return ret; + + scr0 = FIELD_GET(SCR0_ETH_FEC_TYPES_S_FEC, scr0); + *fec = (enum roc_bphy_cgx_eth_link_fec)scr0; + + return 0; +} diff --git a/drivers/common/cnxk/roc_bphy_cgx.h b/drivers/common/cnxk/roc_bphy_cgx.h index 49c35a1e63..9439f88b34 100644 --- a/drivers/common/cnxk/roc_bphy_cgx.h +++ b/drivers/common/cnxk/roc_bphy_cgx.h @@ -115,6 +115,9 @@ __roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac); +__roc_api int roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, + unsigned int lmac, + enum roc_bphy_cgx_eth_link_fec *fec); #endif /* _ROC_BPHY_CGX_H_ */ diff --git a/drivers/common/cnxk/roc_bphy_cgx_priv.h b/drivers/common/cnxk/roc_bphy_cgx_priv.h index 71a277fffd..93aa43ef5a 100644 --- a/drivers/common/cnxk/roc_bphy_cgx_priv.h +++ b/drivers/common/cnxk/roc_bphy_cgx_priv.h @@ -66,6 +66,7 @@ enum eth_cmd_id { ETH_CMD_INTERNAL_LBK = 7, ETH_CMD_MODE_CHANGE = 11, /* hot plug support */ ETH_CMD_INTF_SHUTDOWN = 12, + ETH_CMD_GET_SUPPORTED_FEC = 18, ETH_CMD_SET_PTP_MODE = 34, }; @@ -109,6 +110,9 @@ enum eth_cmd_own { #define SCR0_ETH_LNK_STS_S_LMAC_TYPE GENMASK_ULL(35, 28) #define SCR0_ETH_LNK_STS_S_MODE GENMASK_ULL(43, 36) +/* struct eth_fec_types_s */ +#define SCR0_ETH_FEC_TYPES_S_FEC GENMASK_ULL(10, 9) + /* scratchx(1) CSR used for non-secure SW->ATF communication * This CSR acts as a command register */ diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 2a28087ef9..6923116256 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -24,6 +24,7 @@ INTERNAL { roc_ae_fpm_put; roc_bphy_cgx_dev_fini; roc_bphy_cgx_dev_init; + roc_bphy_cgx_fec_supported_get; roc_bphy_cgx_get_linkinfo; roc_bphy_cgx_intlbk_disable; roc_bphy_cgx_intlbk_enable; -- 2.39.5