From 8dc4ff37fe8b7c656aafdf81360f2ef2cd0d94d3 Mon Sep 17 00:00:00 2001 From: Kiran Kumar K Date: Tue, 14 Jan 2020 14:56:22 +0530 Subject: [PATCH] net/octeontx2: fix PTP and HIGIG2 coexistence octeontx2 PMD does not support both PTP and HIGIG2 together. Added a check to enforce this and updated the Rx offload capabilities when Higig2 mode enabled. Fixes: 602009ee2dfb ("net/octeontx2: support HIGIG2") Cc: stable@dpdk.org Signed-off-by: Kiran Kumar K Acked-by: Jerin Jacob --- drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++- drivers/net/octeontx2/otx2_ptp.c | 5 +++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index 43c6107a80..268b383dbd 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev) { uint64_t capa = NIX_RX_OFFLOAD_CAPA; - if (otx2_dev_is_vf(dev)) + if (otx2_dev_is_vf(dev) || + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) capa &= ~DEV_RX_OFFLOAD_TIMESTAMP; return capa; @@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) goto fail_offloads; } + if (dev->ptp_en && + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + otx2_err("Both PTP and switch header enabled"); + goto free_nix_lf; + } + rc = nix_lf_switch_header_type_enable(dev); if (rc) { otx2_err("Failed to enable switch type nix_lf rc=%d", rc); diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c index f34b9339c4..ae5a2b7cd1 100644 --- a/drivers/net/octeontx2/otx2_ptp.c +++ b/drivers/net/octeontx2/otx2_ptp.c @@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev) return -EINVAL; } + if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + otx2_err("Both PTP and switch header enabled"); + return -EINVAL; + } + /* Allocating a iova address for tx tstamp */ const struct rte_memzone *ts; ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts", -- 2.20.1