From 94a24aaf6c5bd0a03c2828e7411d30a4fc0ac075 Mon Sep 17 00:00:00 2001 From: Phil Yang Date: Thu, 5 Sep 2019 18:55:07 +0800 Subject: [PATCH] net/mlx5: fix Rx CQ doorbell synchronization on aarch64 The Rx completion queue doorbell field needs to be updated after the last CQE decompressed. For the weaker memory model processors, the compiler barrier is not sufficient to guarantee the order of these operations, so use the coherent I/O memory barrier to make sure these fields are updated in order. Fixes: 570acdb1da8a ("net/mlx5: add vectorized Rx/Tx burst for ARM") Cc: stable@dpdk.org Suggested-by: Gavin Hu Signed-off-by: Phil Yang Reviewed-by: Gavin Hu Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h index 99302869a7..e914d017d6 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h @@ -727,7 +727,7 @@ rxq_burst_v(struct mlx5_rxq_data *rxq, struct rte_mbuf **pkts, uint16_t pkts_n, rxq->decompressed -= n; } } - rte_compiler_barrier(); + rte_cio_wmb(); *rxq->cq_db = rte_cpu_to_be_32(rxq->cq_ci); return rcvd_pkt; } -- 2.20.1