From 9b7198ea6d2c9b141b92e11c296f156678e1a781 Mon Sep 17 00:00:00 2001 From: Harman Kalra Date: Fri, 21 Jan 2022 17:34:18 +0530 Subject: [PATCH] common/cnxk: reset stale values on error debug registers LF's error debug registers like NIX_LF_SQ_OP_ERR_DBG, NIX_LF_MNQ_ERR_DBG, NIX_LF_SEND_ERR_DBG captures debug info for an error detected during LMT operation or meta enqueue or after meta enqueue granted respectively. HW sets a valid bit when info is captured and SW is expected to clear this valid bit by writing 1, else these registers will show stale values of first interrupt when occurred and will never update with subsequent interrupts. Fixes: f6d567b03d28 ("common/cnxk: support NIX IRQ") Cc: stable@dpdk.org Signed-off-by: Harman Kalra Acked-by: Jerin Jacob --- drivers/common/cnxk/roc_nix_irq.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix_irq.c b/drivers/common/cnxk/roc_nix_irq.c index a5cd9d4b02..7dcd533ea9 100644 --- a/drivers/common/cnxk/roc_nix_irq.c +++ b/drivers/common/cnxk/roc_nix_irq.c @@ -202,9 +202,12 @@ nix_lf_sq_debug_reg(struct nix *nix, uint32_t off) uint64_t reg; reg = plt_read64(nix->base + off); - if (reg & BIT_ULL(44)) + if (reg & BIT_ULL(44)) { plt_err("SQ=%d err_code=0x%x", (int)((reg >> 8) & 0xfffff), (uint8_t)(reg & 0xff)); + /* Clear valid bit */ + plt_write64(BIT_ULL(44), nix->base + off); + } } static void -- 2.39.5