From 9fa69746a25b7dae8b5f132e477339f63b98d04e Mon Sep 17 00:00:00 2001 From: Andy Moreton Date: Tue, 20 Feb 2018 07:34:22 +0000 Subject: [PATCH] net/sfc/base: group Medford external port mapping entries Signed-off-by: Andy Moreton Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_nic.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c index 2b8b0433a2..cb06535fe4 100644 --- a/drivers/net/sfc/base/ef10_nic.c +++ b/drivers/net/sfc/base/ef10_nic.c @@ -1351,21 +1351,6 @@ static struct ef10_external_port_map_s { 1, /* ports per cage */ 1 /* first cage */ }, - /* - * Modes that on Medford allocate each port number to a separate - * cage. - * port 0 -> cage 1 - * port 1 -> cage 2 - * port 2 -> cage 3 - * port 3 -> cage 4 - */ - { - EFX_FAMILY_MEDFORD, - (1U << TLV_PORT_MODE_10G) | /* mode 0 */ - (1U << TLV_PORT_MODE_10G_10G), /* mode 2 */ - 1, /* ports per cage */ - 1 /* first cage */ - }, /* * Modes which for Huntington identify a chip variant where 2 * adjacent port numbers map to each cage. @@ -1384,6 +1369,21 @@ static struct ef10_external_port_map_s { 2, /* ports per cage */ 1 /* first cage */ }, + /* + * Modes that on Medford allocate each port number to a separate + * cage. + * port 0 -> cage 1 + * port 1 -> cage 2 + * port 2 -> cage 3 + * port 3 -> cage 4 + */ + { + EFX_FAMILY_MEDFORD, + (1U << TLV_PORT_MODE_10G) | /* mode 0 */ + (1U << TLV_PORT_MODE_10G_10G), /* mode 2 */ + 1, /* ports per cage */ + 1 /* first cage */ + }, /* * Modes that on Medford allocate 2 adjacent port numbers to each * cage. -- 2.20.1