From ac61e233936975ea422e28df219f5b2673cb2d22 Mon Sep 17 00:00:00 2001 From: Fan Zhang Date: Fri, 3 Jun 2016 11:11:57 +0100 Subject: [PATCH] aesni_mb: add AES-CTR This patch provides counter mode support to AES-NI multi-buffer library. The following cipher algorithm is enabled: - RTE_CRYPTO_CIPHER_AES_CTR Signed-off-by: Fan Zhang Acked-by: Pablo de Lara --- app/test/test_cryptodev.c | 13 ++++++++++++ doc/guides/cryptodevs/aesni_mb.rst | 3 +++ doc/guides/cryptodevs/overview.rst | 6 +++--- doc/guides/rel_notes/release_16_07.rst | 5 +++++ drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 3 +++ .../crypto/aesni_mb/rte_aesni_mb_pmd_ops.c | 20 +++++++++++++++++++ 6 files changed, 47 insertions(+), 3 deletions(-) diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c index 03d6f021d3..45e6daa10a 100644 --- a/app/test/test_cryptodev.c +++ b/app/test/test_cryptodev.c @@ -4648,6 +4648,19 @@ static struct unit_test_suite cryptodev_aesni_mb_testsuite = { TEST_CASE_ST(ut_setup, ut_teardown, test_AES_CBC_HMAC_SHA1_encrypt_digest_sessionless), + TEST_CASE_ST(ut_setup, ut_teardown, + test_AES_CTR_encrypt_digest_case_1), + TEST_CASE_ST(ut_setup, ut_teardown, + test_AES_CTR_encrypt_digest_case_2), + TEST_CASE_ST(ut_setup, ut_teardown, + test_AES_CTR_encrypt_digest_case_3), + TEST_CASE_ST(ut_setup, ut_teardown, + test_AES_CTR_digest_verify_decrypt_case_1), + TEST_CASE_ST(ut_setup, ut_teardown, + test_AES_CTR_digest_verify_decrypt_case_2), + TEST_CASE_ST(ut_setup, ut_teardown, + test_AES_CTR_digest_verify_decrypt_case_3), + TEST_CASE_ST(ut_setup, ut_teardown, test_not_in_place_crypto), diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst index fd5414d83d..60a891424f 100644 --- a/doc/guides/cryptodevs/aesni_mb.rst +++ b/doc/guides/cryptodevs/aesni_mb.rst @@ -48,6 +48,9 @@ Cipher algorithms: * RTE_CRYPTO_SYM_CIPHER_AES128_CBC * RTE_CRYPTO_SYM_CIPHER_AES192_CBC * RTE_CRYPTO_SYM_CIPHER_AES256_CBC +* RTE_CRYPTO_SYM_CIPHER_AES128_CTR +* RTE_CRYPTO_SYM_CIPHER_AES192_CTR +* RTE_CRYPTO_SYM_CIPHER_AES256_CTR Hash algorithms: diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst index e1f33e1175..4a84146797 100644 --- a/doc/guides/cryptodevs/overview.rst +++ b/doc/guides/cryptodevs/overview.rst @@ -55,9 +55,9 @@ Supported Cipher Algorithms "AES_CBC_128",x,,x,, "AES_CBC_192",x,,x,, "AES_CBC_256",x,,x,, - "AES_CTR_128",x,,,, - "AES_CTR_192",x,,,, - "AES_CTR_256",x,,,, + "AES_CTR_128",x,,x,, + "AES_CTR_192",x,,x,, + "AES_CTR_256",x,,x,, "SNOW3G_UEA2",x,,,,x Supported Authentication Algorithms diff --git a/doc/guides/rel_notes/release_16_07.rst b/doc/guides/rel_notes/release_16_07.rst index 565055ef7a..307e7c4961 100644 --- a/doc/guides/rel_notes/release_16_07.rst +++ b/doc/guides/rel_notes/release_16_07.rst @@ -47,6 +47,11 @@ New Features * Dropped specific Xen Dom0 code. * Dropped specific anonymous mempool code in testpmd. +* **Added AES-CTR support to AESNI MB PMD.** + + Now AESNI MB PMD supports 128/192/256-bit counter mode AES encryption and + decryption. + * **Added support of AES counter mode for Intel QuickAssist devices.** Enabled support for the AES CTR algorithm for Intel QuickAssist devices. diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c index 31784e1623..6554fc4e44 100644 --- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c +++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c @@ -222,6 +222,9 @@ aesni_mb_set_session_cipher_parameters(const struct aesni_mb_ops *mb_ops, case RTE_CRYPTO_CIPHER_AES_CBC: sess->cipher.mode = CBC; break; + case RTE_CRYPTO_CIPHER_AES_CTR: + sess->cipher.mode = CNTR; + break; default: MB_LOG_ERR("Unsupported cipher mode parameter"); return -1; diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c index 3806a66eae..d3c46aceef 100644 --- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c +++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c @@ -207,6 +207,26 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = { }, } }, } }, + { /* AES CTR */ + .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, + {.sym = { + .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, + {.cipher = { + .algo = RTE_CRYPTO_CIPHER_AES_CTR, + .block_size = 16, + .key_size = { + .min = 16, + .max = 32, + .increment = 8 + }, + .iv_size = { + .min = 16, + .max = 16, + .increment = 0 + } + }, } + }, } + }, RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() }; -- 2.20.1