From d1733b701521a3764d9abf9c9d3751890383be28 Mon Sep 17 00:00:00 2001 From: Wenzhuo Lu Date: Tue, 18 Dec 2018 16:46:40 +0800 Subject: [PATCH] net/ice: support descriptor ops Add below ops, rx_descriptor_status tx_descriptor_status Signed-off-by: Wenzhuo Lu Signed-off-by: Qiming Yang Signed-off-by: Xiaoyun Li Signed-off-by: Jingjing Wu Reviewed-by: Ferruh Yigit --- doc/guides/nics/features/ice.ini | 2 ++ drivers/net/ice/ice_ethdev.c | 2 ++ drivers/net/ice/ice_rxtx.c | 58 ++++++++++++++++++++++++++++++++ drivers/net/ice/ice_rxtx.h | 2 ++ 4 files changed, 64 insertions(+) diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini index efa56014bd..8b1e22eac4 100644 --- a/doc/guides/nics/features/ice.ini +++ b/doc/guides/nics/features/ice.ini @@ -26,6 +26,8 @@ QinQ offload = Y L3 checksum offload = Y L4 checksum offload = Y Packet type parsing = Y +Rx descriptor status = Y +Tx descriptor status = Y Basic stats = Y Extended stats = Y FW version = Y diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 5fb70eeae8..0a81e04a61 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -112,6 +112,8 @@ static const struct eth_dev_ops ice_eth_dev_ops = { .get_eeprom_length = ice_get_eeprom_length, .get_eeprom = ice_get_eeprom, .rx_queue_count = ice_rx_queue_count, + .rx_descriptor_status = ice_rx_descriptor_status, + .tx_descriptor_status = ice_tx_descriptor_status, .stats_get = ice_stats_get, .stats_reset = ice_stats_reset, .xstats_get = ice_xstats_get, diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index f7637d2aa6..78e40fe78a 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -1490,6 +1490,64 @@ ice_dev_supported_ptypes_get(struct rte_eth_dev *dev) return NULL; } +int +ice_rx_descriptor_status(void *rx_queue, uint16_t offset) +{ + struct ice_rx_queue *rxq = rx_queue; + volatile uint64_t *status; + uint64_t mask; + uint32_t desc; + + if (unlikely(offset >= rxq->nb_rx_desc)) + return -EINVAL; + + if (offset >= rxq->nb_rx_desc - rxq->nb_rx_hold) + return RTE_ETH_RX_DESC_UNAVAIL; + + desc = rxq->rx_tail + offset; + if (desc >= rxq->nb_rx_desc) + desc -= rxq->nb_rx_desc; + + status = &rxq->rx_ring[desc].wb.qword1.status_error_len; + mask = rte_cpu_to_le_64((1ULL << ICE_RX_DESC_STATUS_DD_S) << + ICE_RXD_QW1_STATUS_S); + if (*status & mask) + return RTE_ETH_RX_DESC_DONE; + + return RTE_ETH_RX_DESC_AVAIL; +} + +int +ice_tx_descriptor_status(void *tx_queue, uint16_t offset) +{ + struct ice_tx_queue *txq = tx_queue; + volatile uint64_t *status; + uint64_t mask, expect; + uint32_t desc; + + if (unlikely(offset >= txq->nb_tx_desc)) + return -EINVAL; + + desc = txq->tx_tail + offset; + /* go to next desc that has the RS bit */ + desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) * + txq->tx_rs_thresh; + if (desc >= txq->nb_tx_desc) { + desc -= txq->nb_tx_desc; + if (desc >= txq->nb_tx_desc) + desc -= txq->nb_tx_desc; + } + + status = &txq->tx_ring[desc].cmd_type_offset_bsz; + mask = rte_cpu_to_le_64(ICE_TXD_QW1_DTYPE_M); + expect = rte_cpu_to_le_64(ICE_TX_DESC_DTYPE_DESC_DONE << + ICE_TXD_QW1_DTYPE_S); + if ((*status & mask) == expect) + return RTE_ETH_TX_DESC_DONE; + + return RTE_ETH_TX_DESC_FULL; +} + void ice_clear_queues(struct rte_eth_dev *dev) { diff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h index 228d2ffe12..ec0e52e519 100644 --- a/drivers/net/ice/ice_rxtx.h +++ b/drivers/net/ice/ice_rxtx.h @@ -147,6 +147,8 @@ void ice_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_rxq_info *qinfo); void ice_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); +int ice_rx_descriptor_status(void *rx_queue, uint16_t offset); +int ice_tx_descriptor_status(void *tx_queue, uint16_t offset); void ice_set_default_ptype_table(struct rte_eth_dev *dev); const uint32_t *ice_dev_supported_ptypes_get(struct rte_eth_dev *dev); #endif /* _ICE_RXTX_H_ */ -- 2.20.1