From d5df6159dddadedc1bdc12ec5f1a92a813dc94d3 Mon Sep 17 00:00:00 2001 From: Rasesh Mody Date: Sat, 8 Sep 2018 13:30:53 -0700 Subject: [PATCH] net/qede: fix ethernet type in HW registers Fix to program the HW registers with proper ether type. Fixes: 36f45bce2537 ("net/qede/base: fix to support OVLAN mode") Cc: stable@dpdk.org Signed-off-by: Rasesh Mody --- drivers/net/qede/base/ecore_dev.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c index 958d7a067d..6302abc1a9 100644 --- a/drivers/net/qede/base/ecore_dev.c +++ b/drivers/net/qede/base/ecore_dev.c @@ -2410,6 +2410,7 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev, bool b_default_mtu = true; struct ecore_hwfn *p_hwfn; enum _ecore_status_t rc = ECORE_SUCCESS; + u16 ether_type; int i; if ((p_params->int_mode == ECORE_INT_MODE_MSI) && ECORE_IS_CMT(p_dev)) { @@ -2442,6 +2443,25 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev, if (rc != ECORE_SUCCESS) return rc; + if (IS_PF(p_dev) && (OSAL_TEST_BIT(ECORE_MF_8021Q_TAGGING, + &p_dev->mf_bits) || + OSAL_TEST_BIT(ECORE_MF_8021AD_TAGGING, + &p_dev->mf_bits))) { + if (OSAL_TEST_BIT(ECORE_MF_8021Q_TAGGING, + &p_dev->mf_bits)) + ether_type = ETHER_TYPE_VLAN; + else + ether_type = ETHER_TYPE_QINQ; + STORE_RT_REG(p_hwfn, PRS_REG_TAG_ETHERTYPE_0_RT_OFFSET, + ether_type); + STORE_RT_REG(p_hwfn, NIG_REG_TAG_ETHERTYPE_0_RT_OFFSET, + ether_type); + STORE_RT_REG(p_hwfn, PBF_REG_TAG_ETHERTYPE_0_RT_OFFSET, + ether_type); + STORE_RT_REG(p_hwfn, DORQ_REG_TAG1_ETHERTYPE_RT_OFFSET, + ether_type); + } + ecore_set_spq_block_timeout(p_hwfn, p_params->spq_timeout_ms); rc = ecore_fill_load_req_params(p_hwfn, &load_req_params, -- 2.20.1