From dce1e4c2044d0e197eee29182cdb93454a0dc3d5 Mon Sep 17 00:00:00 2001 From: Adrien Mazarguil Date: Mon, 6 Aug 2018 16:25:42 +0200 Subject: [PATCH] net/mlx5: fix artificial L4 limitation on switch flow rules Partial bit-masks are in fact supported on TCP/UDP source/destination ports. Remove unnecessary check. Fixes: 2bfc777e07 ("net/mlx5: add L2-L4 pattern items to switch flow rules") Cc: stable@dpdk.org Signed-off-by: Adrien Mazarguil --- drivers/net/mlx5/mlx5_nl_flow.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/net/mlx5/mlx5_nl_flow.c b/drivers/net/mlx5/mlx5_nl_flow.c index a1c8c340bd..beb03c911e 100644 --- a/drivers/net/mlx5/mlx5_nl_flow.c +++ b/drivers/net/mlx5/mlx5_nl_flow.c @@ -799,16 +799,6 @@ trans: break; } spec.tcp = item->spec; - if ((mask.tcp->hdr.src_port && - mask.tcp->hdr.src_port != RTE_BE16(0xffff)) || - (mask.tcp->hdr.dst_port && - mask.tcp->hdr.dst_port != RTE_BE16(0xffff))) - return rte_flow_error_set - (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM_MASK, - mask.tcp, - "no support for partial masks on" - " \"hdr.src_port\" and \"hdr.dst_port\"" - " fields"); if ((mask.tcp->hdr.src_port && (!mnl_attr_put_u16_check(buf, size, TCA_FLOWER_KEY_TCP_SRC, @@ -846,16 +836,6 @@ trans: break; } spec.udp = item->spec; - if ((mask.udp->hdr.src_port && - mask.udp->hdr.src_port != RTE_BE16(0xffff)) || - (mask.udp->hdr.dst_port && - mask.udp->hdr.dst_port != RTE_BE16(0xffff))) - return rte_flow_error_set - (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM_MASK, - mask.udp, - "no support for partial masks on" - " \"hdr.src_port\" and \"hdr.dst_port\"" - " fields"); if ((mask.udp->hdr.src_port && (!mnl_attr_put_u16_check(buf, size, TCA_FLOWER_KEY_UDP_SRC, -- 2.20.1