From e04ec42af0cbeefc65aa3f114e33c5159403a755 Mon Sep 17 00:00:00 2001 From: Tomasz Duszynski Date: Tue, 25 Sep 2018 09:05:05 +0200 Subject: [PATCH] net/mvpp2: align with MUSDK 18.09 This patch introduces necessary changes required by MUSDK 18.09 library. * As of MUSDK 18.09, pp2_cookie_t is no longer available. Now RX descriptor cookie is defined as plain u64 so existing cast is no longer valid. * MUSDK 18.09 increased number of available bpools (buffer hw pools) by introducing dma regions support. Update mvpp2 driver accordingly. * replace MV_NET_IP4_F_TOS with MV_NET_IP4_F_DSCP Before this patch, API allowed to configure a classification rule according to IPv4 TOS, which was not supported in classifier. This patch fixes this by using proper field. * use 48 bit address mask We cannot get pointers exceeding 48 bits thus using 48 bit mask for extracting higher IOVA address bits is enough. Signed-off-by: Natalie Samsonov Signed-off-by: Yuval Caduri Signed-off-by: Tomasz Duszynski Reviewed-by: Shlomi Gridish Reviewed-by: Alan Winkowski Reviewed-by: Liron Himi --- doc/guides/nics/mvpp2.rst | 26 ++++++++++++-------------- drivers/crypto/mvsam/rte_mrvl_pmd.c | 2 +- drivers/net/mvpp2/mrvl_ethdev.c | 10 ++++------ drivers/net/mvpp2/mrvl_flow.c | 3 ++- drivers/net/mvpp2/mrvl_qos.c | 2 +- 5 files changed, 20 insertions(+), 23 deletions(-) diff --git a/doc/guides/nics/mvpp2.rst b/doc/guides/nics/mvpp2.rst index a452c8a8cb..3b3f8c6d44 100644 --- a/doc/guides/nics/mvpp2.rst +++ b/doc/guides/nics/mvpp2.rst @@ -74,6 +74,7 @@ Features of the MVPP2 PMD are: - QoS - RX flow control - TX queue start/stop +- Scattered TX frames Limitations @@ -96,19 +97,19 @@ Prerequisites .. code-block:: console - git clone https://github.com/MarvellEmbeddedProcessors/linux-marvell.git -b linux-4.4.52-armada-17.10 + git clone https://github.com/MarvellEmbeddedProcessors/linux-marvell.git -b linux-4.4.120-armada-18.09 - Out of tree `mvpp2x_sysfs` kernel module sources .. code-block:: console - git clone https://github.com/MarvellEmbeddedProcessors/mvpp2x-marvell.git -b mvpp2x-armada-17.10 + git clone https://github.com/MarvellEmbeddedProcessors/mvpp2x-marvell.git -b mvpp2x-armada-18.09 - MUSDK (Marvell User-Space SDK) sources .. code-block:: console - git clone https://github.com/MarvellEmbeddedProcessors/musdk-marvell.git -b musdk-armada-17.10 + git clone https://github.com/MarvellEmbeddedProcessors/musdk-marvell.git -b musdk-armada-18.09 MUSDK is a light-weight library that provides direct access to Marvell's PPv2 (Packet Processor v2). Alternatively prebuilt MUSDK library can be @@ -119,12 +120,6 @@ Prerequisites To get better understanding of the library one can consult documentation available in the ``doc`` top level directory of the MUSDK sources. - MUSDK must be configured with the following features: - - .. code-block:: console - - --enable-bpool-dma=64 - - DPDK environment Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup @@ -140,6 +135,9 @@ The following options can be modified in the ``config`` file. Toggle compilation of the librte mvpp2 driver. + .. Note:: + + When MVPP2 PMD is enabled ``CONFIG_RTE_LIBRTE_MVNETA_PMD`` must be disabled QoS Configuration ----------------- @@ -314,7 +312,7 @@ Driver needs precompiled MUSDK library during compilation. export CROSS_COMPILE=/bin/aarch64-linux-gnu- ./bootstrap - ./configure --host=aarch64-linux-gnu --enable-bpool-dma=64 + ./configure --host=aarch64-linux-gnu make install MUSDK will be installed to `usr/local` under current directory. @@ -328,7 +326,8 @@ the path to the MUSDK installation directory needs to be exported. export LIBMUSDK_PATH=/usr/local export CROSS=aarch64-linux-gnu- make config T=arm64-armv8a-linuxapp-gcc - sed -ri 's,(MVPP2_PMD=)n,\1y,' build/.config + sed -i "s/MVNETA_PMD=y/MVNETA_PMD=n/" build/.config + sed -i "s/MVPP2_PMD=n/MVPP2_PMD=y/" build/.config make Flow API @@ -500,15 +499,14 @@ Usage Example ------------- MVPP2 PMD requires extra out of tree kernel modules to function properly. -`musdk_uio` and `mv_pp_uio` sources are part of the MUSDK. Please consult +`musdk_cma` sources are part of the MUSDK. Please consult ``doc/musdk_get_started.txt`` for the detailed build instructions. For `mvpp2x_sysfs` please consult ``Documentation/pp22_sysfs.txt`` for the detailed build instructions. .. code-block:: console - insmod musdk_uio.ko - insmod mv_pp_uio.ko + insmod musdk_cma.ko insmod mvpp2x_sysfs.ko Additionally interfaces used by DPDK application need to be put up: diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c b/drivers/crypto/mvsam/rte_mrvl_pmd.c index 73eff75734..6d54c0663e 100644 --- a/drivers/crypto/mvsam/rte_mrvl_pmd.c +++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c @@ -864,7 +864,7 @@ cryptodev_mrvl_crypto_init(struct rte_vdev_device *vdev) .private_data_size = sizeof(struct mrvl_crypto_private), .max_nb_queue_pairs = - sam_get_num_inst() * SAM_HW_RING_NUM, + sam_get_num_inst() * sam_get_num_cios(0), .socket_id = rte_socket_id() }, .max_nb_sessions = MRVL_PMD_DEFAULT_MAX_NB_SESSIONS diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 24bd0a50f0..26497ef4ae 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -54,9 +54,7 @@ #define MRVL_ARP_LENGTH 28 #define MRVL_COOKIE_ADDR_INVALID ~0ULL - -#define MRVL_COOKIE_HIGH_ADDR_SHIFT (sizeof(pp2_cookie_t) * 8) -#define MRVL_COOKIE_HIGH_ADDR_MASK (~0ULL << MRVL_COOKIE_HIGH_ADDR_SHIFT) +#define MRVL_COOKIE_HIGH_ADDR_MASK 0xffffff0000000000 /** Port Rx offload capabilities */ #define MRVL_RX_OFFLOADS (DEV_RX_OFFLOAD_VLAN_FILTER | \ @@ -1534,7 +1532,7 @@ mrvl_fill_bpool(struct mrvl_rxq *rxq, int num) entries[i].buff.addr = rte_mbuf_data_iova_default(mbufs[i]); - entries[i].buff.cookie = (pp2_cookie_t)(uint64_t)mbufs[i]; + entries[i].buff.cookie = (uint64_t)mbufs[i]; entries[i].bpool = bpool; } @@ -2170,7 +2168,7 @@ mrvl_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) if (unlikely(status != PP2_DESC_ERR_OK)) { struct pp2_buff_inf binf = { .addr = rte_mbuf_data_iova_default(mbuf), - .cookie = (pp2_cookie_t)(uint64_t)mbuf, + .cookie = (uint64_t)mbuf, }; pp2_bpool_put_buff(hif, bpool, &binf); @@ -2431,7 +2429,7 @@ mrvl_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) rte_mbuf_prefetch_part2(pref_pkt_hdr); } - sq->ent[sq->head].buff.cookie = (pp2_cookie_t)(uint64_t)mbuf; + sq->ent[sq->head].buff.cookie = (uint64_t)mbuf; sq->ent[sq->head].buff.addr = rte_mbuf_data_iova_default(mbuf); sq->ent[sq->head].bpool = diff --git a/drivers/net/mvpp2/mrvl_flow.c b/drivers/net/mvpp2/mrvl_flow.c index 065b1aacf4..ffd1dab9b5 100644 --- a/drivers/net/mvpp2/mrvl_flow.c +++ b/drivers/net/mvpp2/mrvl_flow.c @@ -2437,7 +2437,8 @@ mrvl_create_cls_table(struct rte_eth_dev *dev, struct rte_flow *first_flow) if (first_flow->pattern & F_IP4_TOS) { key->proto_field[key->num_fields].proto = MV_NET_PROTO_IP4; - key->proto_field[key->num_fields].field.ipv4 = MV_NET_IP4_F_TOS; + key->proto_field[key->num_fields].field.ipv4 = + MV_NET_IP4_F_DSCP; key->key_size += 1; key->num_fields += 1; } diff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c index 5d80c3e84b..7fd970309e 100644 --- a/drivers/net/mvpp2/mrvl_qos.c +++ b/drivers/net/mvpp2/mrvl_qos.c @@ -654,7 +654,7 @@ setup_tc(struct pp2_ppio_tc_params *param, uint8_t inqs, struct pp2_ppio_inq_params *inq_params; param->pkt_offset = MRVL_PKT_OFFS; - param->pools[0] = bpool; + param->pools[0][0] = bpool; param->default_color = color; inq_params = rte_zmalloc_socket("inq_params", -- 2.20.1