From e6a6829f9996b1cf066669ad1721b3d04552c048 Mon Sep 17 00:00:00 2001
From: Michael Baum <michaelba@nvidia.com>
Date: Wed, 17 Nov 2021 12:57:09 +0200
Subject: [PATCH] common/mlx5: fix user mode register access attribute
To detect the timestamp mode configured on the NIC the mlx5 PMD uses the
firmware command ACCESS_REGISTER_USER.
The HCA capability command has an attribute flag checking whether
firmware supports the command.
However, the HCA capability query command read the flag from wrong place
in PRM structure.
This patch move the flag to correct place.
Fixes: 972a1bf8120d ("common/mlx5: fix user mode register access command")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/common/mlx5/mlx5_prm.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 13959575e3..2ded67e85e 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -1370,13 +1370,14 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 reserved_at_bc[0x4];
u8 reserved_at_c0[0x8];
u8 log_max_cq_sz[0x8];
- u8 reserved_at_d0[0xb];
+ u8 reserved_at_d0[0x2];
+ u8 access_register_user[0x1];
+ u8 reserved_at_d3[0x8];
u8 log_max_cq[0x5];
u8 log_max_eq_sz[0x8];
u8 relaxed_ordering_write[0x1];
u8 relaxed_ordering_read[0x1];
- u8 access_register_user[0x1];
- u8 log_max_mkey[0x5];
+ u8 log_max_mkey[0x6];
u8 reserved_at_f0[0x8];
u8 dump_fill_mkey[0x1];
u8 reserved_at_f9[0x3];
--
2.39.5