From f80ae1aa9a61ed3f3de85a964e7494a8256f98b9 Mon Sep 17 00:00:00 2001 From: Pavan Nikhilesh Date: Fri, 13 May 2022 23:57:10 +0530 Subject: [PATCH] hash: unify CRC32 selection for x86 and Arm Merge CRC32 hash calculation public API implementation for x86 and Arm. Select the best available CRC32 algorithm when unsupported algorithm on a given CPU architecture is requested by an application. Previously, if an application directly includes `rte_crc_arm64.h` without including `rte_hash_crc.h` it will fail to compile. Signed-off-by: Pavan Nikhilesh Reviewed-by: Ruifeng Wang --- lib/hash/meson.build | 1 + lib/hash/rte_crc_arm64.h | 107 +++++---------------------------- lib/hash/rte_crc_generic.h | 36 +++++++++++ lib/hash/rte_crc_x86.h | 61 +++++++++++++++++++ lib/hash/rte_hash_crc.h | 119 +++++++++++++++++-------------------- 5 files changed, 166 insertions(+), 158 deletions(-) create mode 100644 lib/hash/rte_crc_generic.h diff --git a/lib/hash/meson.build b/lib/hash/meson.build index c9ad6c9f16..2f757d45f9 100644 --- a/lib/hash/meson.build +++ b/lib/hash/meson.build @@ -11,6 +11,7 @@ headers = files( ) indirect_headers += files( 'rte_crc_arm64.h', + 'rte_crc_generic.h', 'rte_crc_sw.h', 'rte_crc_x86.h', 'rte_thash_x86_gfni.h', diff --git a/lib/hash/rte_crc_arm64.h b/lib/hash/rte_crc_arm64.h index b4628cfc09..c9f5251087 100644 --- a/lib/hash/rte_crc_arm64.h +++ b/lib/hash/rte_crc_arm64.h @@ -5,21 +5,6 @@ #ifndef _RTE_CRC_ARM64_H_ #define _RTE_CRC_ARM64_H_ -/** - * @file - * - * RTE CRC arm64 Hash - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -#include - static inline uint32_t crc32c_arm64_u8(uint8_t data, uint32_t init_val) { @@ -60,49 +45,10 @@ crc32c_arm64_u64(uint64_t data, uint32_t init_val) return init_val; } -/** - * Allow or disallow use of arm64 SIMD instrinsics for CRC32 hash - * calculation. - * - * @param alg - * An OR of following flags: - * - (CRC32_SW) Don't use arm64 crc intrinsics - * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available - * - */ -static inline void -rte_hash_crc_set_alg(uint8_t alg) -{ - switch (alg) { - case CRC32_ARM64: - if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) - alg = CRC32_SW; - /* fall-through */ - case CRC32_SW: - crc32_alg = alg; - /* fall-through */ - default: - break; - } -} - -/* Setting the best available algorithm */ -RTE_INIT(rte_hash_crc_init_alg) -{ - rte_hash_crc_set_alg(CRC32_ARM64); -} - -/** - * Use single crc32 instruction to perform a hash on a 1 byte value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. +/* + * Use single crc32 instruction to perform a hash on a byte value. + * Fall back to software crc32 implementation in case ARM CRC is + * not supported. */ static inline uint32_t rte_hash_crc_1byte(uint8_t data, uint32_t init_val) @@ -113,17 +59,10 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val) return crc32c_1byte(data, init_val); } -/** +/* * Use single crc32 instruction to perform a hash on a 2 bytes value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. + * Fall back to software crc32 implementation in case ARM CRC is + * not supported. */ static inline uint32_t rte_hash_crc_2byte(uint16_t data, uint32_t init_val) @@ -134,17 +73,10 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val) return crc32c_2bytes(data, init_val); } -/** +/* * Use single crc32 instruction to perform a hash on a 4 byte value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. + * Fall back to software crc32 implementation in case ARM CRC is + * not supported. */ static inline uint32_t rte_hash_crc_4byte(uint32_t data, uint32_t init_val) @@ -155,29 +87,18 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) return crc32c_1word(data, init_val); } -/** +/* * Use single crc32 instruction to perform a hash on a 8 byte value. - * Fall back to software crc32 implementation in case arm64 crc intrinsics is - * not supported - * - * @param data - * Data to perform hash on. - * @param init_val - * Value to initialise hash generator. - * @return - * 32bit calculated hash value. + * Fall back to software crc32 implementation in case ARM CRC is + * not supported. */ static inline uint32_t rte_hash_crc_8byte(uint64_t data, uint32_t init_val) { - if (likely(crc32_alg == CRC32_ARM64)) + if (likely(crc32_alg & CRC32_ARM64)) return crc32c_arm64_u64(data, init_val); return crc32c_2words(data, init_val); } -#ifdef __cplusplus -} -#endif - #endif /* _RTE_CRC_ARM64_H_ */ diff --git a/lib/hash/rte_crc_generic.h b/lib/hash/rte_crc_generic.h new file mode 100644 index 0000000000..b6dff50bec --- /dev/null +++ b/lib/hash/rte_crc_generic.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2022 Marvell. + */ + +#ifndef _RTE_CRC_GENERIC_H_ +#define _RTE_CRC_GENERIC_H_ + +/* Software crc32 implementation for 1 byte value. */ +static inline uint32_t +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) +{ + return crc32c_1byte(data, init_val); +} + +/* Software crc32 implementation for 2 byte value. */ +static inline uint32_t +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) +{ + return crc32c_2bytes(data, init_val); +} + +/* Software crc32 implementation for 4 byte value. */ +static inline uint32_t +rte_hash_crc_4byte(uint32_t data, uint32_t init_val) +{ + return crc32c_1word(data, init_val); +} + +/* Software crc32 implementation for 8 byte value. */ +static inline uint32_t +rte_hash_crc_8byte(uint64_t data, uint32_t init_val) +{ + return crc32c_2words(data, init_val); +} + +#endif /* _RTE_CRC_GENERIC_H_ */ diff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h index 49153eddbd..205bc182be 100644 --- a/lib/hash/rte_crc_x86.h +++ b/lib/hash/rte_crc_x86.h @@ -59,4 +59,65 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val) return (uint32_t)init_val; } +/* + * Use single crc32 instruction to perform a hash on a byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported. + */ +static inline uint32_t +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u8(data, init_val); + + return crc32c_1byte(data, init_val); +} + +/* + * Use single crc32 instruction to perform a hash on a 2 bytes value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported. + */ +static inline uint32_t +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u16(data, init_val); + + return crc32c_2bytes(data, init_val); +} + +/* + * Use single crc32 instruction to perform a hash on a 4 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported. + */ +static inline uint32_t +rte_hash_crc_4byte(uint32_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u32(data, init_val); + + return crc32c_1word(data, init_val); +} + +/* + * Use single crc32 instruction to perform a hash on a 8 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported. + */ +static inline uint32_t +rte_hash_crc_8byte(uint64_t data, uint32_t init_val) +{ +#ifdef RTE_ARCH_X86_64 + if (likely(crc32_alg == CRC32_SSE42_x64)) + return crc32c_sse42_u64(data, init_val); +#endif + + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u64_mimic(data, init_val); + + return crc32c_2words(data, init_val); +} + #endif /* _RTE_CRC_X86_H_ */ diff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h index 308fdde414..0249ad16c5 100644 --- a/lib/hash/rte_hash_crc.h +++ b/lib/hash/rte_hash_crc.h @@ -16,10 +16,12 @@ extern "C" { #endif #include -#include -#include + #include #include +#include +#include +#include #include "rte_crc_sw.h" @@ -33,41 +35,71 @@ static uint8_t crc32_alg = CRC32_SW; #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) #include "rte_crc_arm64.h" -#else +#elif defined(RTE_ARCH_X86) #include "rte_crc_x86.h" +#else +#include "rte_crc_generic.h" +#endif /** - * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash + * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash * calculation. * * @param alg * An OR of following flags: - * - (CRC32_SW) Don't use SSE4.2 intrinsics + * - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-[x86/ARMv8]) * - (CRC32_SSE42) Use SSE4.2 intrinsics if available - * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default) + * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86) + * - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8) * */ static inline void rte_hash_crc_set_alg(uint8_t alg) { -#if defined(RTE_ARCH_X86) - if (alg == CRC32_SSE42_x64 && - !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T)) - alg = CRC32_SSE42; + crc32_alg = CRC32_SW; + + if (alg == CRC32_SW) + return; + +#if defined RTE_ARCH_X86 + if (!(alg & CRC32_SSE42_x64)) + RTE_LOG(WARNING, HASH, + "Unsupported CRC32 algorithm requested using CRC32_x64/CRC32_SSE42\n"); + if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T) || alg == CRC32_SSE42) + crc32_alg = CRC32_SSE42; + else + crc32_alg = CRC32_SSE42_x64; +#endif + +#if defined RTE_ARCH_ARM64 + if (!(alg & CRC32_ARM64)) + RTE_LOG(WARNING, HASH, + "Unsupported CRC32 algorithm requested using CRC32_ARM64\n"); + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32)) + crc32_alg = CRC32_ARM64; #endif - crc32_alg = alg; + + if (crc32_alg == CRC32_SW) + RTE_LOG(WARNING, HASH, + "Unsupported CRC32 algorithm requested using CRC32_SW\n"); } /* Setting the best available algorithm */ RTE_INIT(rte_hash_crc_init_alg) { +#if defined(RTE_ARCH_X86) rte_hash_crc_set_alg(CRC32_SSE42_x64); +#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32) + rte_hash_crc_set_alg(CRC32_ARM64); +#else + rte_hash_crc_set_alg(CRC32_SW); +#endif } +#ifdef __DOXYGEN__ + /** - * Use single crc32 instruction to perform a hash on a byte value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported + * Use single CRC32 instruction to perform a hash on a byte value. * * @param data * Data to perform hash on. @@ -77,20 +109,10 @@ RTE_INIT(rte_hash_crc_init_alg) * 32bit calculated hash value. */ static inline uint32_t -rte_hash_crc_1byte(uint8_t data, uint32_t init_val) -{ -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u8(data, init_val); -#endif - - return crc32c_1byte(data, init_val); -} +rte_hash_crc_1byte(uint8_t data, uint32_t init_val); /** - * Use single crc32 instruction to perform a hash on a 2 bytes value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported + * Use single CRC32 instruction to perform a hash on a 2 bytes value. * * @param data * Data to perform hash on. @@ -100,20 +122,10 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val) * 32bit calculated hash value. */ static inline uint32_t -rte_hash_crc_2byte(uint16_t data, uint32_t init_val) -{ -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u16(data, init_val); -#endif - - return crc32c_2bytes(data, init_val); -} +rte_hash_crc_2byte(uint16_t data, uint32_t init_val); /** - * Use single crc32 instruction to perform a hash on a 4 byte value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported + * Use single CRC32 instruction to perform a hash on a 4 bytes value. * * @param data * Data to perform hash on. @@ -123,20 +135,10 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val) * 32bit calculated hash value. */ static inline uint32_t -rte_hash_crc_4byte(uint32_t data, uint32_t init_val) -{ -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u32(data, init_val); -#endif - - return crc32c_1word(data, init_val); -} +rte_hash_crc_4byte(uint32_t data, uint32_t init_val); /** - * Use single crc32 instruction to perform a hash on a 8 byte value. - * Fall back to software crc32 implementation in case SSE4.2 is - * not supported + * Use single CRC32 instruction to perform a hash on a 8 bytes value. * * @param data * Data to perform hash on. @@ -146,22 +148,9 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) * 32bit calculated hash value. */ static inline uint32_t -rte_hash_crc_8byte(uint64_t data, uint32_t init_val) -{ -#ifdef RTE_ARCH_X86_64 - if (likely(crc32_alg == CRC32_SSE42_x64)) - return crc32c_sse42_u64(data, init_val); -#endif - -#if defined RTE_ARCH_X86 - if (likely(crc32_alg & CRC32_SSE42)) - return crc32c_sse42_u64_mimic(data, init_val); -#endif +rte_hash_crc_8byte(uint64_t data, uint32_t init_val); - return crc32c_2words(data, init_val); -} - -#endif +#endif /* __DOXYGEN__ */ /** * Calculate CRC32 hash on user-supplied byte array. -- 2.39.5