From f9fbd2b3ad227555cd7ba06ccbb8b23ae577b89b Mon Sep 17 00:00:00 2001 From: Shahaf Shuler Date: Sun, 27 Aug 2017 09:47:08 +0300 Subject: [PATCH] net/mlx5: replace memory barrier type The reason for the requirement of a barrier between the txq writes and the doorbell record writes is to avoid a case where the device reads the doorbell record's new value before the txq writes are flushed to memory. The current use of rte_wmb is not necessary, and can be replaced by rte_io_wmb which is more relaxed. Replacing the rte_wmb is also expected to improve the throughput. Signed-off-by: Shahaf Shuler Signed-off-by: Yongseok Koh Signed-off-by: Alexander Solganik Signed-off-by: Sagi Grimberg Acked-by: Nelio Laranjeiro --- drivers/net/mlx5/mlx5_rxtx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index c9b165da8d..033e70f252 100644 --- a/drivers/net/mlx5/mlx5_rxtx.h +++ b/drivers/net/mlx5/mlx5_rxtx.h @@ -605,7 +605,7 @@ mlx5_tx_dbrec(struct txq *txq, volatile struct mlx5_wqe *wqe) uint64_t *dst = (uint64_t *)((uintptr_t)txq->bf_reg); volatile uint64_t *src = ((volatile uint64_t *)wqe); - rte_wmb(); + rte_io_wmb(); *txq->qp_db = htonl(txq->wqe_ci); /* Ensure ordering between DB record and BF copy. */ rte_wmb(); -- 2.20.1