new mainboard without xmega
[protos/xbee-elec.git] / atmel.l#2
diff --git a/atmel.l#2 b/atmel.l#2
new file mode 100644 (file)
index 0000000..f925e41
--- /dev/null
+++ b/atmel.l#2
@@ -0,0 +1,20777 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="6.0">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="50" unitdist="mil" unit="mil" style="lines" multiple="2" display="yes" altdistance="5" altunitdist="mil" altunit="mil"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="yes"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
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+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="yes"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="yes"/>
+<layer number="51" name="tDocu" color="6" fill="9" visible="yes" active="yes"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="yes"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
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+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
+</layers>
+<library>
+<description>&lt;b&gt;AVR Devices&lt;/b&gt;&lt;p&gt;
+Configurable logic, microcontrollers, nonvolatile memories&lt;p&gt;
+Based on the following sources:&lt;p&gt;
+&lt;ul&gt;
+&lt;li&gt;www.atmel.com
+&lt;li&gt;CD-ROM : Configurable Logic Microcontroller Nonvolatile Memory
+&lt;li&gt;CadSoft download site, www.cadsoft.de or www.cadsoftusa.com , file at90smcu_v400.zip
+&lt;li&gt;avr.lbr
+&lt;/ul&gt;
+&lt;author&gt;Revised by librarian@cadsoft.de&lt;/author&gt;</description>
+<packages>
+<package name="DIL08">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
+<wire x1="-5.08" y1="-0.635" x2="-5.08" y2="0.635" width="0.1524" layer="21" curve="180"/>
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+<wire x1="-5.08" y1="-2.794" x2="5.08" y2="-2.794" width="0.1524" layer="21"/>
+<wire x1="5.08" y1="-2.794" x2="5.08" y2="2.794" width="0.1524" layer="21"/>
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+<text x="-5.3594" y="-2.54" size="1.27" layer="25" ratio="10" rot="R90">&gt;NAME</text>
+<text x="-3.81" y="-0.9906" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="DIL20">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt;</description>
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+<text x="-10.16" y="-0.762" size="1.778" layer="27" ratio="10">&gt;VALUE</text>
+</package>
+<package name="DIL28-3">
+<description>&lt;B&gt;Dual In Line&lt;/B&gt; 0.3 inch</description>
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+</package>
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+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.&lt;br&gt;
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+Lead Pitch 0.50 mm, 2.6 mm Exposed Pad, Micro Lead Frame Package (MLF)&lt;br&gt;
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+<pin name="GND" x="-17.78" y="-5.08" length="middle" direction="pwr"/>
+</symbol>
+<symbol name="6-I/O-2">
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+<pin name="GND" x="-17.78" y="-7.62" length="middle" direction="pwr"/>
+</symbol>
+<symbol name="5-I/O-1">
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+<pin name="PB4" x="17.78" y="5.08" length="middle" rot="R180"/>
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+<pin name="(SCK)PB2" x="17.78" y="0" length="middle" rot="R180"/>
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+<pin name="(MOSI)PB0" x="17.78" y="-5.08" length="middle" rot="R180"/>
+</symbol>
+<symbol name="6-I/O-3">
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+</symbol>
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+</symbol>
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+<pin name="USCK/SCL/PCINT4/PE4" x="-43.18" y="5.08" length="short"/>
+<pin name="DI/SDA/PCINT5/PE5" x="-43.18" y="2.54" length="short"/>
+<pin name="DO/PCINT6/PE6" x="-43.18" y="0" length="short"/>
+<pin name="CLKO/PCINT7/PE7" x="-43.18" y="-2.54" length="short"/>
+<pin name="!SS!/PCINT8/PB0" x="-43.18" y="-5.08" length="short"/>
+<pin name="SCK/PCINT9/PB1" x="-43.18" y="-7.62" length="short"/>
+<pin name="MOSI/PCINT10/PB2" x="-43.18" y="-10.16" length="short"/>
+<pin name="MISO/PCINT11/PB3" x="-43.18" y="-12.7" length="short"/>
+<pin name="OC0A/PCINT12/PB4" x="-43.18" y="-15.24" length="short"/>
+<pin name="OC1B/PCINT14/PB6" x="-43.18" y="-17.78" length="short"/>
+<pin name="OC1A/PCINT13/PB5" x="-43.18" y="-20.32" length="short"/>
+<pin name="OC2A/PCINT15/PB7" x="-15.24" y="-30.48" length="short" rot="R90"/>
+<pin name="T1/PG3" x="-12.7" y="-30.48" length="short" rot="R90"/>
+<pin name="T0/PG4" x="-10.16" y="-30.48" length="short" rot="R90"/>
+<pin name="!RESET!/PG5" x="-7.62" y="-30.48" length="short" direction="in" rot="R90"/>
+<pin name="VCC" x="-5.08" y="-30.48" length="short" direction="pwr" rot="R90"/>
+<pin name="GND" x="-2.54" y="-30.48" length="short" direction="pwr" rot="R90"/>
+<pin name="TOSC2/XTAL2" x="0" y="-30.48" length="short" direction="out" rot="R90"/>
+<pin name="TOSC1/XTAL1" x="2.54" y="-30.48" length="short" direction="in" rot="R90"/>
+<pin name="ICP1/PD0" x="5.08" y="-30.48" length="short" rot="R90"/>
+<pin name="INT0/PD1" x="7.62" y="-30.48" length="short" rot="R90"/>
+<pin name="PD2" x="10.16" y="-30.48" length="short" rot="R90"/>
+<pin name="PD3" x="12.7" y="-30.48" length="short" rot="R90"/>
+<pin name="PD4" x="15.24" y="-30.48" length="short" rot="R90"/>
+<pin name="PD5" x="17.78" y="-30.48" length="short" rot="R90"/>
+<pin name="PD6" x="20.32" y="-30.48" length="short" rot="R90"/>
+<pin name="PD7" x="22.86" y="-30.48" length="short" rot="R90"/>
+<pin name="PG0" x="45.72" y="-20.32" length="short" rot="R180"/>
+<pin name="PG1" x="45.72" y="-17.78" length="short" rot="R180"/>
+<pin name="PC0" x="45.72" y="-15.24" length="short" rot="R180"/>
+<pin name="PC1" x="45.72" y="-12.7" length="short" rot="R180"/>
+<pin name="PC3" x="45.72" y="-7.62" length="short" rot="R180"/>
+<pin name="PC4" x="45.72" y="-5.08" length="short" rot="R180"/>
+<pin name="PC5" x="45.72" y="-2.54" length="short" rot="R180"/>
+<pin name="PC6" x="45.72" y="0" length="short" rot="R180"/>
+<pin name="PC7" x="45.72" y="2.54" length="short" rot="R180"/>
+<pin name="PG2" x="45.72" y="5.08" length="short" rot="R180"/>
+<pin name="PC2" x="45.72" y="-10.16" length="short" rot="R180"/>
+<pin name="PA7" x="45.72" y="7.62" length="short" rot="R180"/>
+<pin name="PA6" x="45.72" y="10.16" length="short" rot="R180"/>
+<pin name="PA5" x="45.72" y="12.7" length="short" rot="R180"/>
+<pin name="PA4" x="45.72" y="15.24" length="short" rot="R180"/>
+<pin name="PA3" x="45.72" y="17.78" length="short" rot="R180"/>
+<pin name="PA2" x="22.86" y="27.94" length="short" rot="R270"/>
+<pin name="PA1" x="20.32" y="27.94" length="short" rot="R270"/>
+<pin name="PA0" x="17.78" y="27.94" length="short" rot="R270"/>
+<pin name="VCC@1" x="15.24" y="27.94" length="short" direction="pwr" rot="R270"/>
+<pin name="GND@1" x="12.7" y="27.94" length="short" direction="pwr" rot="R270"/>
+<pin name="ADC7/TDI/PF7" x="10.16" y="27.94" length="short" rot="R270"/>
+<pin name="ADC6/TDO/PF6" x="7.62" y="27.94" length="short" rot="R270"/>
+<pin name="ADC5/TMS/PF5" x="5.08" y="27.94" length="short" rot="R270"/>
+<pin name="ADC4/TCK/PF4" x="2.54" y="27.94" length="short" rot="R270"/>
+<pin name="ADC3/PF3" x="0" y="27.94" length="short" rot="R270"/>
+<pin name="ADC2/PF2" x="-2.54" y="27.94" length="short" rot="R270"/>
+<pin name="ADC1/PF1" x="-5.08" y="27.94" length="short" rot="R270"/>
+<pin name="ADC0/PF0" x="-7.62" y="27.94" length="short" rot="R270"/>
+<pin name="AREF" x="-10.16" y="27.94" length="short" direction="in" rot="R270"/>
+<pin name="GND@2" x="-12.7" y="27.94" length="short" direction="pwr" rot="R270"/>
+<pin name="AVCC" x="-15.24" y="27.94" length="short" direction="pwr" rot="R270"/>
+</symbol>
+<symbol name="AT45DB642D">
+<wire x1="-10.16" y1="-15.24" x2="12.7" y2="-15.24" width="0.4064" layer="94"/>
+<wire x1="12.7" y1="-15.24" x2="12.7" y2="15.24" width="0.4064" layer="94"/>
+<wire x1="12.7" y1="15.24" x2="-10.16" y2="15.24" width="0.4064" layer="94"/>
+<wire x1="-10.16" y1="15.24" x2="-10.16" y2="-15.24" width="0.4064" layer="94"/>
+<text x="-10.16" y="16.51" size="1.778" layer="95">&gt;NAME</text>
+<text x="-10.16" y="-17.78" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="SI" x="-12.7" y="-5.08" length="short" direction="in"/>
+<pin name="GND" x="-12.7" y="-12.7" length="short" direction="pwr"/>
+<pin name="VCC" x="-12.7" y="12.7" length="short" direction="pwr"/>
+<pin name="!WP" x="-12.7" y="2.54" length="short" direction="in"/>
+<pin name="!RESET" x="-12.7" y="7.62" length="short" direction="in"/>
+<pin name="RDY/!BUSY" x="-12.7" y="-2.54" length="short" direction="out"/>
+<pin name="I/O3" x="15.24" y="0" length="short" rot="R180"/>
+<pin name="I/O2" x="15.24" y="-2.54" length="short" rot="R180"/>
+<pin name="I/O1" x="15.24" y="-5.08" length="short" rot="R180"/>
+<pin name="I/O0" x="15.24" y="-7.62" length="short" rot="R180"/>
+<pin name="SER/!BYTE" x="15.24" y="-10.16" length="short" direction="in" rot="R180"/>
+<pin name="!CS" x="-12.7" y="0" length="short" direction="in"/>
+<pin name="SCK/CLK" x="-12.7" y="5.08" length="short" direction="in"/>
+<pin name="SO" x="-12.7" y="-7.62" length="short" direction="out"/>
+<pin name="I/O7" x="15.24" y="10.16" length="short" rot="R180"/>
+<pin name="I/O6" x="15.24" y="7.62" length="short" rot="R180"/>
+<pin name="I/O5" x="15.24" y="5.08" length="short" rot="R180"/>
+<pin name="I/O4" x="15.24" y="2.54" length="short" rot="R180"/>
+<pin name="VCCP" x="15.24" y="12.7" length="short" direction="pwr" rot="R180"/>
+<pin name="GNDP" x="15.24" y="-12.7" length="short" direction="pwr" rot="R180"/>
+</symbol>
+<symbol name="ATMEGA644-20PU">
+<wire x1="-27.94" y1="-27.94" x2="27.94" y2="-27.94" width="0.254" layer="94"/>
+<wire x1="27.94" y1="-27.94" x2="27.94" y2="25.4" width="0.254" layer="94"/>
+<wire x1="27.94" y1="25.4" x2="-27.94" y2="25.4" width="0.254" layer="94"/>
+<wire x1="-27.94" y1="25.4" x2="-27.94" y2="-27.94" width="0.254" layer="94"/>
+<text x="-27.94" y="26.67" size="1.778" layer="95">&gt;NAME</text>
+<text x="-27.94" y="-30.48" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="PCINT8/XCK0/T0_PB0" x="-30.48" y="22.86" length="short"/>
+<pin name="PCINT9/CLKO/T1_PB1" x="-30.48" y="20.32" length="short"/>
+<pin name="PCINT10/INT2/AIN0_PB2" x="-30.48" y="17.78" length="short"/>
+<pin name="PCINT11/OC0A/AIN1_PB3" x="-30.48" y="15.24" length="short"/>
+<pin name="PCINT12/OC0B/SS_PB4" x="-30.48" y="12.7" length="short"/>
+<pin name="PCINT13/MOSI_PB5" x="-30.48" y="10.16" length="short"/>
+<pin name="PCINT14/MISO_PB6" x="-30.48" y="7.62" length="short"/>
+<pin name="PCINT15/SCK_PB7" x="-30.48" y="5.08" length="short"/>
+<pin name="!RESET" x="-30.48" y="2.54" length="short" direction="in"/>
+<pin name="VCC" x="-30.48" y="0" length="short" direction="pwr"/>
+<pin name="GND" x="-30.48" y="-2.54" length="short" direction="pwr"/>
+<pin name="XTAL2" x="-30.48" y="-5.08" length="short" direction="out"/>
+<pin name="XTAL1" x="-30.48" y="-7.62" length="short" direction="in"/>
+<pin name="PCINT24/RXD0_PD0" x="-30.48" y="-10.16" length="short"/>
+<pin name="PCINT25/TXD0_PD1" x="-30.48" y="-12.7" length="short"/>
+<pin name="PCINT26/INT0_PD2" x="-30.48" y="-15.24" length="short"/>
+<pin name="PCINT27/INT1_PD3" x="-30.48" y="-17.78" length="short"/>
+<pin name="PCINT28/OC1B_PD4" x="-30.48" y="-20.32" length="short"/>
+<pin name="PCINT29/OC1A_PD5" x="-30.48" y="-22.86" length="short"/>
+<pin name="PCINT30/OC2B/ICP_PD6" x="-30.48" y="-25.4" length="short"/>
+<pin name="PCINT31/OC2A_PD7" x="30.48" y="-25.4" length="short" rot="R180"/>
+<pin name="PCINT16/SCL_PC0" x="30.48" y="-22.86" length="short" rot="R180"/>
+<pin name="PCINT17/SDA_PC1" x="30.48" y="-20.32" length="short" rot="R180"/>
+<pin name="PCINT18/TCK_PC2" x="30.48" y="-17.78" length="short" rot="R180"/>
+<pin name="PCINT19/TMS_PC3" x="30.48" y="-15.24" length="short" rot="R180"/>
+<pin name="PCINT20/TDO_PC4" x="30.48" y="-12.7" length="short" rot="R180"/>
+<pin name="PCINT21/TDI_PC5" x="30.48" y="-10.16" length="short" rot="R180"/>
+<pin name="PCINT22/TOSC1_PC6" x="30.48" y="-7.62" length="short" rot="R180"/>
+<pin name="PCINT23/TOSC2_PC7" x="30.48" y="-5.08" length="short" rot="R180"/>
+<pin name="AVCC" x="30.48" y="-2.54" length="short" direction="pwr" rot="R180"/>
+<pin name="GND@1" x="30.48" y="0" length="short" direction="pwr" rot="R180"/>
+<pin name="AREF" x="30.48" y="2.54" length="short" direction="pas" rot="R180"/>
+<pin name="PCINT7/ADC7_PA7" x="30.48" y="5.08" length="short" rot="R180"/>
+<pin name="PCINT6/ADC6_PA6" x="30.48" y="7.62" length="short" rot="R180"/>
+<pin name="PCINT5/ADC5_PA5" x="30.48" y="10.16" length="short" rot="R180"/>
+<pin name="PCINT4/ADC4_PA4" x="30.48" y="12.7" length="short" rot="R180"/>
+<pin name="PCINT3/ADC3_PA3" x="30.48" y="15.24" length="short" rot="R180"/>
+<pin name="PCINT2/ADC2_PA2" x="30.48" y="17.78" length="short" rot="R180"/>
+<pin name="PCINT1/ADC1_PA1" x="30.48" y="20.32" length="short" rot="R180"/>
+<pin name="PCINT0/ADC0_PA0" x="30.48" y="22.86" length="short" rot="R180"/>
+</symbol>
+<symbol name="AT45DB161D">
+<wire x1="-7.62" y1="7.62" x2="10.16" y2="7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="7.62" x2="10.16" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-10.16" x2="-7.62" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="-7.62" y1="-10.16" x2="-7.62" y2="7.62" width="0.254" layer="94"/>
+<text x="-7.62" y="8.89" size="1.778" layer="95">&gt;NAME</text>
+<text x="-7.62" y="-12.7" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="!CS" x="-10.16" y="-5.08" length="short" direction="in"/>
+<pin name="SCK" x="-10.16" y="-2.54" length="short" direction="in"/>
+<pin name="SI" x="-10.16" y="2.54" length="short" direction="in"/>
+<pin name="SO" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>
+<pin name="!WP" x="-10.16" y="-7.62" length="short" direction="in"/>
+<pin name="RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="RDY/!BUSY" x="12.7" y="0" length="short" direction="out" rot="R180"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="GND" x="12.7" y="-7.62" length="short" direction="pwr" rot="R180"/>
+</symbol>
+<symbol name="AT45DB161VFN8">
+<wire x1="-7.62" y1="7.62" x2="10.16" y2="7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="7.62" x2="10.16" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="10.16" y1="-7.62" x2="-7.62" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="-7.62" y1="-7.62" x2="-7.62" y2="7.62" width="0.254" layer="94"/>
+<text x="-7.62" y="8.89" size="1.778" layer="95">&gt;NAME</text>
+<text x="-7.62" y="-10.16" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="!CS" x="-10.16" y="-5.08" length="short" direction="in"/>
+<pin name="SCK" x="-10.16" y="-2.54" length="short" direction="in"/>
+<pin name="SI" x="-10.16" y="2.54" length="short" direction="in"/>
+<pin name="SO" x="12.7" y="2.54" length="short" direction="out" rot="R180"/>
+<pin name="!RESET" x="-10.16" y="5.08" length="short" direction="in"/>
+<pin name="VCC" x="12.7" y="5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="GND" x="12.7" y="-5.08" length="short" direction="pwr" rot="R180"/>
+<pin name="!WP" x="-10.16" y="0" length="short" direction="in"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="AT90*4434P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*4434" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (LS)&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="44"/>
+<connect gate="G$1" pin="VCC2" pad="11"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC0" pad="22"/>
+<connect gate="G$1" pin="PC1" pad="23"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AGND" pad="34"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="24"/>
+<connect gate="G$1" pin="GND1" pad="1"/>
+<connect gate="G$1" pin="GND2" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="25"/>
+<connect gate="G$1" pin="PC1" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="23"/>
+<connect gate="G$1" pin="VCC1" pad="11"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0" pad="19"/>
+<connect gate="G$1" pin="PC1" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4414" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J1" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J2" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J3" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515-A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="ICP" pad="35"/>
+<connect gate="G$1" pin="NC1" pad="34"/>
+<connect gate="G$1" pin="NC2" pad="23"/>
+<connect gate="G$1" pin="NC3" pad="12"/>
+<connect gate="G$1" pin="NC4" pad="1"/>
+<connect gate="G$1" pin="OC1B" pad="32"/>
+<connect gate="G$1" pin="PD4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="ICP" pad="29"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="OC1B" pad="26"/>
+<connect gate="G$1" pin="PD4" pad="10"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S8515P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes SRAM&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="ICP" pad="31"/>
+<connect gate="G$1" pin="OC1B" pad="29"/>
+<connect gate="G$1" pin="PD4" pad="14"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333A" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="22"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2333P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10-bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S4433" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+4 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+256 bytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+6-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="13"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="14"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="4"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="5"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="17"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="19"/>
+<connect gate="G$1" pin="(SS)PB2" pad="16"/>
+<connect gate="G$1" pin="(T0)PD4" pad="6"/>
+<connect gate="G$1" pin="(T1)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PC0)" pad="23"/>
+<connect gate="G$1" pin="(ADC1)PC1" pad="24"/>
+<connect gate="G$1" pin="(ADC2)PC2" pad="25"/>
+<connect gate="G$1" pin="(ADC3)PC3" pad="26"/>
+<connect gate="G$1" pin="(ADC4)PC4" pad="27"/>
+<connect gate="G$1" pin="(ADC5)PC5" pad="28"/>
+<connect gate="G$1" pin="(AIN0)PD6" pad="10"/>
+<connect gate="G$1" pin="(AIN1)PD7" pad="11"/>
+<connect gate="G$1" pin="(ICP)PB0" pad="12"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="32"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="1"/>
+<connect gate="G$1" pin="(MISO)PB4" pad="16"/>
+<connect gate="G$1" pin="(MOSI)PB3" pad="15"/>
+<connect gate="G$1" pin="(OC1)PB1" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="30"/>
+<connect gate="G$1" pin="(SCK)PB5" pad="17"/>
+<connect gate="G$1" pin="(SS)PB2" pad="14"/>
+<connect gate="G$1" pin="(T0)PD4" pad="2"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="31"/>
+<connect gate="G$1" pin="AGND" pad="21"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="3-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="XTAL1" pad="2"/>
+<connect gate="G$1" pin="XTAL2" pad="3"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90*2343" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="LS">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="S">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S2313" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+128 bytes SRAM&lt;p&gt;
+128 bytes EEPROM&lt;p&gt;
+UART</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="11"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="7"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(OCI)PB3" pad="15"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="(T1)PD5" pad="9"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="3"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90S1200" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Y" package="SSOP20D8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="12"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="13"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="6"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="18"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="17"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="19"/>
+<connect gate="G$1" pin="(T0)PD4" pad="8"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="PB2" pad="14"/>
+<connect gate="G$1" pin="PB3" pad="15"/>
+<connect gate="G$1" pin="PB4" pad="16"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD3" pad="7"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY10" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes ROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY11*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(AIN0)PB0" pad="5"/>
+<connect gate="G$1" pin="(AIN1)PB1" pad="6"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(T0)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="3617970" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY12*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(RESET)PB5" pad="1"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="(XTAL1)PB3" pad="2"/>
+<connect gate="G$1" pin="(XTAL2)PB4" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY22" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1K ROM&lt;p&gt;
+128 bytes RAM&lt;p&gt;
+128 bytes EEPROM</description>
+<gates>
+<gate name="G$1" symbol="5-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(CLOCK)PB3" pad="2"/>
+<connect gate="G$1" pin="(MISO)PB1" pad="6"/>
+<connect gate="G$1" pin="(MOSI)PB0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB2" pad="7"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB4" pad="3"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;br&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+UART&lt;br&gt;
+RTC&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AC+)PE2" pad="4"/>
+<connect gate="G$1" pin="(AC-)PE3" pad="5"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PE1" pad="3"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7)" pad="54"/>
+<connect gate="G$1" pin="RD" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="WR" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT90C8534" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;p&gt;
+512 bytes EEPROM&lt;p&gt;
+256 bytes SRAM&lt;p&gt;
+6-channel&lt;p&gt;
+10-bit A/D</description>
+<gates>
+<gate name="G$1" symbol="15-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP48">
+<connects>
+<connect gate="G$1" pin="ADIN0" pad="1"/>
+<connect gate="G$1" pin="ADIN1" pad="13"/>
+<connect gate="G$1" pin="ADIN2" pad="14"/>
+<connect gate="G$1" pin="ADIN3" pad="15"/>
+<connect gate="G$1" pin="ADIN4" pad="16"/>
+<connect gate="G$1" pin="ADIN5" pad="17"/>
+<connect gate="G$1" pin="AGND" pad="11"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="31"/>
+<connect gate="G$1" pin="INT0" pad="35"/>
+<connect gate="G$1" pin="INT1" pad="34"/>
+<connect gate="G$1" pin="NC1" pad="2"/>
+<connect gate="G$1" pin="NC10" pad="12"/>
+<connect gate="G$1" pin="NC11" pad="19"/>
+<connect gate="G$1" pin="NC12" pad="21"/>
+<connect gate="G$1" pin="NC13" pad="25"/>
+<connect gate="G$1" pin="NC14" pad="26"/>
+<connect gate="G$1" pin="NC15" pad="27"/>
+<connect gate="G$1" pin="NC16" pad="28"/>
+<connect gate="G$1" pin="NC17" pad="29"/>
+<connect gate="G$1" pin="NC18" pad="30"/>
+<connect gate="G$1" pin="NC19" pad="32"/>
+<connect gate="G$1" pin="NC2" pad="3"/>
+<connect gate="G$1" pin="NC20" pad="36"/>
+<connect gate="G$1" pin="NC21" pad="37"/>
+<connect gate="G$1" pin="NC22" pad="40"/>
+<connect gate="G$1" pin="NC23" pad="41"/>
+<connect gate="G$1" pin="NC24" pad="42"/>
+<connect gate="G$1" pin="NC25" pad="43"/>
+<connect gate="G$1" pin="NC26" pad="48"/>
+<connect gate="G$1" pin="NC3" pad="4"/>
+<connect gate="G$1" pin="NC4" pad="5"/>
+<connect gate="G$1" pin="NC5" pad="6"/>
+<connect gate="G$1" pin="NC6" pad="7"/>
+<connect gate="G$1" pin="NC7" pad="8"/>
+<connect gate="G$1" pin="NC8" pad="9"/>
+<connect gate="G$1" pin="NC9" pad="10"/>
+<connect gate="G$1" pin="PA0" pad="47"/>
+<connect gate="G$1" pin="PA1" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="45"/>
+<connect gate="G$1" pin="PA3" pad="44"/>
+<connect gate="G$1" pin="PA4" pad="39"/>
+<connect gate="G$1" pin="PA5" pad="38"/>
+<connect gate="G$1" pin="PA6" pad="33"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="22"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="30"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="31"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="29"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="10"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="3"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="14"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="15"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="11"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="4"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="98M0167" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA161*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+dual UART&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="35-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-S" package="S44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J-SM" package="PLCC-SM44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="33"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="35"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="32"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="11"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="4"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="16"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="17"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="13"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="5"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(ALE)PE1" pad="27"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(INT2)PE0" pad="29"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PE2" pad="26"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD0)PD0" pad="5"/>
+<connect gate="G$1" pin="(RXD1)PB2" pad="42"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PD4" pad="10"/>
+<connect gate="G$1" pin="(TOSC2)PD5" pad="11"/>
+<connect gate="G$1" pin="(TXD0)PD1" pad="7"/>
+<connect gate="G$1" pin="(TXD1)PB3" pad="43"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY15L" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2.7 V&lt;p&gt;
+1 Kbytes FLASH&lt;p&gt;
+64 bytes EEPROM&lt;p&gt;
+4-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="6-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="(ADC0)PB5" pad="1"/>
+<connect gate="G$1" pin="(ADC1)PB2" pad="7"/>
+<connect gate="G$1" pin="(ADC2)PB3" pad="3"/>
+<connect gate="G$1" pin="(ADC3)PB4" pad="2"/>
+<connect gate="G$1" pin="(AREF)PB0" pad="5"/>
+<connect gate="G$1" pin="(OCP)PB1" pad="6"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes &lt;B&gt;EEPROM&lt;/B&gt;&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-5" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA163*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+UART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+hardware multiplier&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-3" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="21"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="14"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="15"/>
+<connect gate="G$1" pin="PB2(T0)" pad="16"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="17"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="18"/>
+<connect gate="G$1" pin="PB5" pad="19"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="2"/>
+<connect gate="G$1" pin="PD1" pad="3"/>
+<connect gate="G$1" pin="PD2" pad="4"/>
+<connect gate="G$1" pin="PD3" pad="5"/>
+<connect gate="G$1" pin="PD4" pad="6"/>
+<connect gate="G$1" pin="PD5" pad="11"/>
+<connect gate="G$1" pin="PD6" pad="12"/>
+<connect gate="G$1" pin="PD7" pad="13"/>
+<connect gate="G$1" pin="RESET" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="7"/>
+<connect gate="G$1" pin="VCC1" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="9"/>
+<connect gate="G$1" pin="XTAL2" pad="10"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY28*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+1.8 V&lt;p&gt;
+2 Kbytes FLASH</description>
+<gates>
+<gate name="G$1" symbol="20-I/O-4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="(IR)PA2" pad="25"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND1" pad="21"/>
+<connect gate="G$1" pin="NC1" pad="3"/>
+<connect gate="G$1" pin="NC2" pad="6"/>
+<connect gate="G$1" pin="NC3" pad="19"/>
+<connect gate="G$1" pin="NC4" pad="20"/>
+<connect gate="G$1" pin="NC5" pad="22"/>
+<connect gate="G$1" pin="PA0" pad="28"/>
+<connect gate="G$1" pin="PA1" pad="27"/>
+<connect gate="G$1" pin="PA3" pad="26"/>
+<connect gate="G$1" pin="PB0(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PB1(AIN1)" pad="13"/>
+<connect gate="G$1" pin="PB2(T0)" pad="14"/>
+<connect gate="G$1" pin="PB3(INT0)" pad="15"/>
+<connect gate="G$1" pin="PB4(INT1)" pad="16"/>
+<connect gate="G$1" pin="PB5" pad="17"/>
+<connect gate="G$1" pin="PB6" pad="23"/>
+<connect gate="G$1" pin="PB7" pad="24"/>
+<connect gate="G$1" pin="PD0" pad="30"/>
+<connect gate="G$1" pin="PD1" pad="31"/>
+<connect gate="G$1" pin="PD2" pad="32"/>
+<connect gate="G$1" pin="PD3" pad="1"/>
+<connect gate="G$1" pin="PD4" pad="2"/>
+<connect gate="G$1" pin="PD5" pad="9"/>
+<connect gate="G$1" pin="PD6" pad="10"/>
+<connect gate="G$1" pin="PD7" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="29"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+<connect gate="G$1" pin="VCC1" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="7"/>
+<connect gate="G$1" pin="XTAL2" pad="8"/>
+</connects>
+<technologies>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="V">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT25*" prefix="IC">
+<description>SPI bus serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="250X0" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS/" pad="1"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="HOLD/" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="6"/>
+<connect gate="G$1" pin="SI" pad="5"/>
+<connect gate="G$1" pin="SO" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP/" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="CAT25040LI-G" constant="no"/>
+<attribute name="OC_FARNELL" value="1718045" constant="no"/>
+<attribute name="OC_NEWARK" value="06R0588" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT24C*" prefix="IC">
+<description>2-wire serial &lt;B&gt;EEPROM&lt;/B&gt;</description>
+<gates>
+<gate name="G$1" symbol="24CXX" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="A0" pad="1"/>
+<connect gate="G$1" pin="A1" pad="2"/>
+<connect gate="G$1" pin="A2" pad="3"/>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="SCL" pad="6"/>
+<connect gate="G$1" pin="SDA" pad="5"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+<connect gate="G$1" pin="WP" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT24C1024BW-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1362646" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2044" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SDE2506" prefix="IC">
+<description>I2C/MicroWire &lt;B&gt;EEPROM&lt;/B&gt; (24xxx)</description>
+<gates>
+<gate name="G$1" symbol="SDE2506" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CE/" pad="2"/>
+<connect gate="G$1" pin="CLK" pad="5"/>
+<connect gate="G$1" pin="D" pad="4"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="TG" pad="8"/>
+<connect gate="G$1" pin="TP" pad="7"/>
+<connect gate="G$1" pin="VCC" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C*6" prefix="IC">
+<description>3-wire serial EEPROM</description>
+<gates>
+<gate name="G$1" symbol="93CX6" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL08">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="ORG" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46D-PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1362666" constant="no"/>
+<attribute name="OC_NEWARK" value="50M3339" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C2051" prefix="IC">
+<description>80C31 &lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+2 Kbytes FLASH&lt;p&gt;
+2.7 V</description>
+<gates>
+<gate name="G$1" symbol="89C2051" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699389" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3687" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SOIC20S">
+<connects>
+<connect gate="G$1" pin="AIN0-P1.0" pad="12"/>
+<connect gate="G$1" pin="AIN1-P1.1" pad="13"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="P1.2" pad="14"/>
+<connect gate="G$1" pin="P1.3" pad="15"/>
+<connect gate="G$1" pin="P1.4" pad="16"/>
+<connect gate="G$1" pin="P1.5" pad="17"/>
+<connect gate="G$1" pin="P1.6" pad="18"/>
+<connect gate="G$1" pin="P1.7" pad="19"/>
+<connect gate="G$1" pin="P3.0-RXD" pad="2"/>
+<connect gate="G$1" pin="P3.1-TXD" pad="3"/>
+<connect gate="G$1" pin="P3.2-INTO/" pad="6"/>
+<connect gate="G$1" pin="P3.3-INT1/" pad="7"/>
+<connect gate="G$1" pin="P3.4-T0" pad="8"/>
+<connect gate="G$1" pin="P3.5-T1" pad="9"/>
+<connect gate="G$1" pin="P3.7" pad="11"/>
+<connect gate="G$1" pin="RST-VPP" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+<connect gate="G$1" pin="XTAL1" pad="5"/>
+<connect gate="G$1" pin="XTAL2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C2051-12SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1699390" constant="no"/>
+<attribute name="OC_NEWARK" value="80P3688" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA103*" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+Low-voltage (L)&lt;p&gt;
+128 Kbytes FLASH&lt;p&gt;
+4 Kbytes SRAM&lt;p&gt;
+2 Kbytes EEPROM&lt;p&gt;
+UART&lt;p&gt;
+RTC&lt;p&gt;
+8-channel 10 bit ADC</description>
+<gates>
+<gate name="G$1" symbol="48-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="01" pad="21"/>
+<connect gate="G$1" pin="02" pad="22"/>
+<connect gate="G$1" pin="A10-PC2" pad="37"/>
+<connect gate="G$1" pin="A11-PC3" pad="38"/>
+<connect gate="G$1" pin="A12-PC4" pad="39"/>
+<connect gate="G$1" pin="A13-PC5" pad="40"/>
+<connect gate="G$1" pin="A14-PC6" pad="41"/>
+<connect gate="G$1" pin="A15-PC7" pad="42"/>
+<connect gate="G$1" pin="A8-PC0" pad="35"/>
+<connect gate="G$1" pin="A9-PC1" pad="36"/>
+<connect gate="G$1" pin="AC+_PE2" pad="4"/>
+<connect gate="G$1" pin="AC-_PE3" pad="5"/>
+<connect gate="G$1" pin="AD0-PA0" pad="51"/>
+<connect gate="G$1" pin="AD1-PA1" pad="50"/>
+<connect gate="G$1" pin="AD2-PA2" pad="49"/>
+<connect gate="G$1" pin="AD3-PA3" pad="48"/>
+<connect gate="G$1" pin="AD4-PA4" pad="47"/>
+<connect gate="G$1" pin="AD5-PA5" pad="46"/>
+<connect gate="G$1" pin="AD6-PA6" pad="45"/>
+<connect gate="G$1" pin="AD7-PA7" pad="44"/>
+<connect gate="G$1" pin="ADC0-PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1-PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2-PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3-PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4-PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5-PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6-PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7-PF7" pad="54"/>
+<connect gate="G$1" pin="AGND" pad="63"/>
+<connect gate="G$1" pin="ALE" pad="43"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="AVREF" pad="62"/>
+<connect gate="G$1" pin="GND" pad="53"/>
+<connect gate="G$1" pin="INT4-PE4" pad="6"/>
+<connect gate="G$1" pin="INT5-PE5" pad="7"/>
+<connect gate="G$1" pin="INT6-PE6" pad="8"/>
+<connect gate="G$1" pin="INT7-PE7" pad="9"/>
+<connect gate="G$1" pin="MISO-PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI-PB2" pad="12"/>
+<connect gate="G$1" pin="OC0-PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A-PB5" pad="15"/>
+<connect gate="G$1" pin="OC1B-PB6" pad="16"/>
+<connect gate="G$1" pin="OC2-PB7" pad="17"/>
+<connect gate="G$1" pin="PD0-INT0" pad="25"/>
+<connect gate="G$1" pin="PD1-INT1" pad="26"/>
+<connect gate="G$1" pin="PD2-INT2" pad="27"/>
+<connect gate="G$1" pin="PD3-INT3" pad="28"/>
+<connect gate="G$1" pin="PD4-IC1" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6-T1" pad="31"/>
+<connect gate="G$1" pin="PD7-T2" pad="32"/>
+<connect gate="G$1" pin="PEN/" pad="1"/>
+<connect gate="G$1" pin="RD/" pad="34"/>
+<connect gate="G$1" pin="RESET/" pad="20"/>
+<connect gate="G$1" pin="RXD-PE0" pad="2"/>
+<connect gate="G$1" pin="SCK-PB1" pad="11"/>
+<connect gate="G$1" pin="SS-PB0" pad="10"/>
+<connect gate="G$1" pin="TOSC1" pad="19"/>
+<connect gate="G$1" pin="TOSC2" pad="18"/>
+<connect gate="G$1" pin="TXD-PE1" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="52"/>
+<connect gate="G$1" pin="WR/" pad="33"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C*52" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH; 2K Bytes EEPROM&lt;br&gt;
+Compatible with MCS-51 Products&lt;br&gt;
+at89s8252.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C52" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="33.02" y="5.08" addlevel="request"/>
+</gates>
+<devices>
+<device name="P6" package="DIL40">
+<connects>
+<connect gate="G$1" pin="ALE" pad="30"/>
+<connect gate="G$1" pin="EA" pad="31"/>
+<connect gate="G$1" pin="P0.0AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0_T2" pad="1"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0" pad="10"/>
+<connect gate="G$1" pin="P3.1" pad="11"/>
+<connect gate="G$1" pin="P3.2" pad="12"/>
+<connect gate="G$1" pin="P3.3" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/RD" pad="17"/>
+<connect gate="G$1" pin="PSEN" pad="29"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="VCC" pad="40"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="33"/>
+<connect gate="G$1" pin="EA" pad="35"/>
+<connect gate="G$1" pin="P0.0AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0_T2" pad="2"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0" pad="11"/>
+<connect gate="G$1" pin="P3.1" pad="13"/>
+<connect gate="G$1" pin="P3.2" pad="14"/>
+<connect gate="G$1" pin="P3.3" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/RD" pad="19"/>
+<connect gate="G$1" pin="PSEN" pad="32"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="VCC" pad="44"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="Q" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="EA" pad="29"/>
+<connect gate="G$1" pin="P0.0AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0_T2" pad="40"/>
+<connect gate="G$1" pin="P1.1_T2EX" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0" pad="5"/>
+<connect gate="G$1" pin="P3.1" pad="7"/>
+<connect gate="G$1" pin="P3.2" pad="8"/>
+<connect gate="G$1" pin="P3.3" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/RD" pad="13"/>
+<connect gate="G$1" pin="PSEN" pad="26"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="38"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="82">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="27C080" prefix="IC">
+<description>&lt;b&gt;8-Megabit (1Mx8) OTP EPROM&lt;/b&gt;</description>
+<gates>
+<gate name="G$1" symbol="27C080" x="0" y="0"/>
+<gate name="P" symbol="VCCGND" x="15.24" y="-10.16" addlevel="request"/>
+</gates>
+<devices>
+<device name="32P6" package="DIL32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455026" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3824" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="SO32X">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC32R">
+<connects>
+<connect gate="G$1" pin="!CE" pad="22"/>
+<connect gate="G$1" pin="!OE!VPP" pad="24"/>
+<connect gate="G$1" pin="A0" pad="12"/>
+<connect gate="G$1" pin="A1" pad="11"/>
+<connect gate="G$1" pin="A10" pad="23"/>
+<connect gate="G$1" pin="A11" pad="25"/>
+<connect gate="G$1" pin="A12" pad="4"/>
+<connect gate="G$1" pin="A13" pad="28"/>
+<connect gate="G$1" pin="A14" pad="29"/>
+<connect gate="G$1" pin="A15" pad="3"/>
+<connect gate="G$1" pin="A16" pad="2"/>
+<connect gate="G$1" pin="A17" pad="30"/>
+<connect gate="G$1" pin="A18" pad="31"/>
+<connect gate="G$1" pin="A19" pad="1"/>
+<connect gate="G$1" pin="A2" pad="10"/>
+<connect gate="G$1" pin="A3" pad="9"/>
+<connect gate="G$1" pin="A4" pad="8"/>
+<connect gate="G$1" pin="A5" pad="7"/>
+<connect gate="G$1" pin="A6" pad="6"/>
+<connect gate="G$1" pin="A7" pad="5"/>
+<connect gate="G$1" pin="A8" pad="27"/>
+<connect gate="G$1" pin="A9" pad="26"/>
+<connect gate="G$1" pin="O0" pad="13"/>
+<connect gate="G$1" pin="O1" pad="14"/>
+<connect gate="G$1" pin="O2" pad="15"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="18"/>
+<connect gate="G$1" pin="O5" pad="19"/>
+<connect gate="G$1" pin="O6" pad="20"/>
+<connect gate="G$1" pin="O7" pad="21"/>
+<connect gate="P" pin="GND" pad="16"/>
+<connect gate="P" pin="VCC" pad="32"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT27C080-90JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455025" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3823" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSOP32">
+<connects>
+<connect gate="G$1" pin="!CE" pad="30"/>
+<connect gate="G$1" pin="!OE!VPP" pad="32"/>
+<connect gate="G$1" pin="A0" pad="20"/>
+<connect gate="G$1" pin="A1" pad="19"/>
+<connect gate="G$1" pin="A10" pad="31"/>
+<connect gate="G$1" pin="A11" pad="1"/>
+<connect gate="G$1" pin="A12" pad="12"/>
+<connect gate="G$1" pin="A13" pad="4"/>
+<connect gate="G$1" pin="A14" pad="5"/>
+<connect gate="G$1" pin="A15" pad="11"/>
+<connect gate="G$1" pin="A16" pad="10"/>
+<connect gate="G$1" pin="A17" pad="6"/>
+<connect gate="G$1" pin="A18" pad="7"/>
+<connect gate="G$1" pin="A19" pad="9"/>
+<connect gate="G$1" pin="A2" pad="18"/>
+<connect gate="G$1" pin="A3" pad="17"/>
+<connect gate="G$1" pin="A4" pad="16"/>
+<connect gate="G$1" pin="A5" pad="15"/>
+<connect gate="G$1" pin="A6" pad="14"/>
+<connect gate="G$1" pin="A7" pad="13"/>
+<connect gate="G$1" pin="A8" pad="3"/>
+<connect gate="G$1" pin="A9" pad="2"/>
+<connect gate="G$1" pin="O0" pad="21"/>
+<connect gate="G$1" pin="O1" pad="22"/>
+<connect gate="G$1" pin="O2" pad="23"/>
+<connect gate="G$1" pin="O3" pad="25"/>
+<connect gate="G$1" pin="O4" pad="26"/>
+<connect gate="G$1" pin="O5" pad="27"/>
+<connect gate="G$1" pin="O6" pad="28"/>
+<connect gate="G$1" pin="O7" pad="29"/>
+<connect gate="P" pin="GND" pad="24"/>
+<connect gate="P" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91R4008" prefix="IC">
+<description>&lt;b&gt;AT91 ARM® Thumb® RISC-Controller&lt;/b&gt;&lt;p&gt;
+Microcontroller AT91R40008</description>
+<gates>
+<gate name="A" symbol="AT91R4008" x="-25.4" y="2.54" addlevel="always"/>
+<gate name="B" symbol="AT91R4008-PARPORT" x="0" y="-7.62" addlevel="always"/>
+<gate name="C" symbol="AT91R4008-ADR" x="27.94" y="-7.62" addlevel="always"/>
+<gate name="D" symbol="D0-15" x="53.34" y="2.54" addlevel="always"/>
+<gate name="P1" symbol="GND" x="-38.1" y="-58.42" addlevel="always"/>
+<gate name="P2" symbol="GND" x="-35.56" y="-58.42" addlevel="always"/>
+<gate name="P3" symbol="GND" x="-33.02" y="-58.42" addlevel="always"/>
+<gate name="P4" symbol="GND" x="-30.48" y="-58.42" addlevel="always"/>
+<gate name="P5" symbol="GND" x="-27.94" y="-58.42" addlevel="always"/>
+<gate name="P15" symbol="VDDIO" x="-38.1" y="-35.56" addlevel="always"/>
+<gate name="P16" symbol="VDDIO" x="-35.56" y="-35.56" addlevel="always"/>
+<gate name="P17" symbol="VDDIO" x="-33.02" y="-35.56" addlevel="always"/>
+<gate name="P6" symbol="GND" x="-25.4" y="-58.42" addlevel="always"/>
+<gate name="P7" symbol="GND" x="-22.86" y="-58.42" addlevel="always"/>
+<gate name="P8" symbol="GND" x="-20.32" y="-58.42" addlevel="always"/>
+<gate name="P9" symbol="GND" x="-17.78" y="-58.42" addlevel="always"/>
+<gate name="P10" symbol="VDDIO" x="-30.48" y="-35.56" addlevel="always"/>
+<gate name="P11" symbol="VDDIO" x="-27.94" y="-35.56" addlevel="always"/>
+<gate name="P12" symbol="VDDCORE" x="-20.32" y="-35.56" addlevel="always"/>
+<gate name="P13" symbol="VDDCORE" x="-17.78" y="-35.56" addlevel="always"/>
+<gate name="P14" symbol="VDDCORE" x="-15.24" y="-35.56" addlevel="always"/>
+<gate name="P18" symbol="VDDIO" x="-25.4" y="-35.56" addlevel="always"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="A" pin="GND" pad="78"/>
+<connect gate="A" pin="MCKI" pad="82"/>
+<connect gate="A" pin="NCS0" pad="97"/>
+<connect gate="A" pin="NCS1" pad="98"/>
+<connect gate="A" pin="NRD/NOE" pad="92"/>
+<connect gate="A" pin="NRST" pad="79"/>
+<connect gate="A" pin="NRW0/NWE" pad="93"/>
+<connect gate="A" pin="NRW1/NUB" pad="77"/>
+<connect gate="A" pin="NWAIT" pad="96"/>
+<connect gate="A" pin="NWDOVF" pad="80"/>
+<connect gate="A" pin="TCK" pad="91"/>
+<connect gate="A" pin="TDI" pad="89"/>
+<connect gate="A" pin="TDO" pad="90"/>
+<connect gate="A" pin="TMS" pad="88"/>
+<connect gate="B" pin="P0/TCLK0" pad="49"/>
+<connect gate="B" pin="P1/TIOA0" pad="50"/>
+<connect gate="B" pin="P10/IRQ1" pad="63"/>
+<connect gate="B" pin="P11/IRQ2" pad="64"/>
+<connect gate="B" pin="P12/FIQ" pad="66"/>
+<connect gate="B" pin="P13/SCK0" pad="67"/>
+<connect gate="B" pin="P14/TXD0" pad="68"/>
+<connect gate="B" pin="P15/RXD0" pad="69"/>
+<connect gate="B" pin="P16" pad="70"/>
+<connect gate="B" pin="P17" pad="71"/>
+<connect gate="B" pin="P18" pad="72"/>
+<connect gate="B" pin="P19" pad="73"/>
+<connect gate="B" pin="P2/TIOB0" pad="51"/>
+<connect gate="B" pin="P20/SCK1" pad="74"/>
+<connect gate="B" pin="P21/TXD1/NTRI" pad="75"/>
+<connect gate="B" pin="P22/RXD1" pad="76"/>
+<connect gate="B" pin="P23" pad="83"/>
+<connect gate="B" pin="P24/BMS" pad="84"/>
+<connect gate="B" pin="P25/MCKO" pad="85"/>
+<connect gate="B" pin="P26/NCS2" pad="99"/>
+<connect gate="B" pin="P27/NCS3" pad="100"/>
+<connect gate="B" pin="P3/TCLK1" pad="54"/>
+<connect gate="B" pin="P4/TIOA1" pad="55"/>
+<connect gate="B" pin="P5/TIOB1" pad="56"/>
+<connect gate="B" pin="P6/TCLK2" pad="57"/>
+<connect gate="B" pin="P7/TIOA2" pad="58"/>
+<connect gate="B" pin="P8/TIOB2" pad="59"/>
+<connect gate="B" pin="P9/IRQ0" pad="60"/>
+<connect gate="C" pin="A1" pad="3"/>
+<connect gate="C" pin="A10" pad="13"/>
+<connect gate="C" pin="A11" pad="14"/>
+<connect gate="C" pin="A12" pad="15"/>
+<connect gate="C" pin="A13" pad="16"/>
+<connect gate="C" pin="A14" pad="17"/>
+<connect gate="C" pin="A15" pad="20"/>
+<connect gate="C" pin="A16" pad="21"/>
+<connect gate="C" pin="A17" pad="22"/>
+<connect gate="C" pin="A18" pad="23"/>
+<connect gate="C" pin="A19" pad="24"/>
+<connect gate="C" pin="A2" pad="4"/>
+<connect gate="C" pin="A3" pad="5"/>
+<connect gate="C" pin="A4" pad="6"/>
+<connect gate="C" pin="A5" pad="7"/>
+<connect gate="C" pin="A6" pad="8"/>
+<connect gate="C" pin="A7" pad="9"/>
+<connect gate="C" pin="A8" pad="11"/>
+<connect gate="C" pin="A9" pad="12"/>
+<connect gate="C" pin="NLB/A0" pad="1"/>
+<connect gate="C" pin="P28/CS7/A20" pad="25"/>
+<connect gate="C" pin="P29/CS6/A21" pad="26"/>
+<connect gate="C" pin="P30/CS5/A22" pad="29"/>
+<connect gate="C" pin="P31/CS4/A23" pad="30"/>
+<connect gate="D" pin="D0" pad="31"/>
+<connect gate="D" pin="D1" pad="32"/>
+<connect gate="D" pin="D10" pad="42"/>
+<connect gate="D" pin="D11" pad="43"/>
+<connect gate="D" pin="D12" pad="45"/>
+<connect gate="D" pin="D13" pad="46"/>
+<connect gate="D" pin="D14" pad="47"/>
+<connect gate="D" pin="D15" pad="48"/>
+<connect gate="D" pin="D2" pad="33"/>
+<connect gate="D" pin="D3" pad="34"/>
+<connect gate="D" pin="D4" pad="35"/>
+<connect gate="D" pin="D5" pad="37"/>
+<connect gate="D" pin="D6" pad="38"/>
+<connect gate="D" pin="D7" pad="39"/>
+<connect gate="D" pin="D8" pad="40"/>
+<connect gate="D" pin="D9" pad="41"/>
+<connect gate="P1" pin="GND" pad="2"/>
+<connect gate="P10" pin="VDDIO" pad="62"/>
+<connect gate="P11" pin="VDDIO" pad="81"/>
+<connect gate="P12" pin="VDDCORE" pad="27"/>
+<connect gate="P13" pin="VDDCORE" pad="61"/>
+<connect gate="P14" pin="VDDCORE" pad="94"/>
+<connect gate="P15" pin="VDDIO" pad="10"/>
+<connect gate="P16" pin="VDDIO" pad="28"/>
+<connect gate="P17" pin="VDDIO" pad="44"/>
+<connect gate="P18" pin="VDDIO" pad="95"/>
+<connect gate="P2" pin="GND" pad="18"/>
+<connect gate="P3" pin="GND" pad="19"/>
+<connect gate="P4" pin="GND" pad="36"/>
+<connect gate="P5" pin="GND" pad="52"/>
+<connect gate="P6" pin="GND" pad="53"/>
+<connect gate="P7" pin="GND" pad="65"/>
+<connect gate="P8" pin="GND" pad="86"/>
+<connect gate="P9" pin="GND" pad="87"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL20">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455146" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3782" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171657" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6920" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="20"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="19"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="10"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="18"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="14"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="13"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="12"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="11"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="9"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="17"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="2"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="1"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="4"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="3"/>
+<connect gate="G$1" pin="AVCC" pad="15"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="16"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY261-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455147" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3783" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY26L-8SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171665" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6921" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="MLF32">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="SAM9708" prefix="SAM9708">
+<description>&lt;b&gt;128-voice Integrated Sound Synthesizer&lt;/b&gt;</description>
+<gates>
+<gate name="A" symbol="SAM9708" x="-45.72" y="17.78" addlevel="always"/>
+<gate name="C" symbol="SAM9708-SND" x="15.24" y="30.48" addlevel="always"/>
+<gate name="B" symbol="D0-15" x="-25.4" y="27.94" addlevel="always"/>
+<gate name="D" symbol="WA27" x="50.8" y="17.78" addlevel="always"/>
+<gate name="E" symbol="WD15" x="68.58" y="30.48" addlevel="always"/>
+<gate name="G1" symbol="GND" x="-27.94" y="-25.4"/>
+<gate name="G2" symbol="GND" x="-25.4" y="-25.4"/>
+<gate name="G3" symbol="GND" x="-22.86" y="-25.4"/>
+<gate name="G4" symbol="GND" x="-20.32" y="-25.4"/>
+<gate name="G5" symbol="GND" x="-17.78" y="-25.4"/>
+<gate name="G6" symbol="GND" x="-15.24" y="-25.4"/>
+<gate name="G7" symbol="GND" x="-12.7" y="-25.4"/>
+<gate name="G8" symbol="GND" x="-10.16" y="-25.4"/>
+<gate name="G9" symbol="GND" x="-7.62" y="-25.4"/>
+<gate name="G10" symbol="GND" x="-5.08" y="-25.4"/>
+<gate name="G11" symbol="GND" x="-2.54" y="-25.4"/>
+<gate name="G12" symbol="GND" x="0" y="-25.4"/>
+<gate name="G13" symbol="GND" x="2.54" y="-25.4"/>
+<gate name="G14" symbol="GND" x="5.08" y="-25.4"/>
+<gate name="G15" symbol="GND" x="7.62" y="-25.4"/>
+<gate name="G16" symbol="GND" x="10.16" y="-25.4"/>
+<gate name="G17" symbol="GND" x="12.7" y="-25.4"/>
+<gate name="G18" symbol="GND" x="15.24" y="-25.4"/>
+<gate name="G19" symbol="GND" x="17.78" y="-25.4"/>
+<gate name="V1" symbol="VCC1" x="-27.94" y="-7.62"/>
+<gate name="V2" symbol="VCC1" x="-25.4" y="-7.62"/>
+<gate name="V3" symbol="VCC1" x="-22.86" y="-7.62"/>
+<gate name="V4" symbol="VCC1" x="-20.32" y="-7.62"/>
+<gate name="V5" symbol="VCC1" x="-17.78" y="-7.62"/>
+<gate name="V6" symbol="VCC2" x="-12.7" y="-7.62"/>
+<gate name="V7" symbol="VCC2" x="-10.16" y="-7.62"/>
+<gate name="V8" symbol="VCC2" x="-7.62" y="-7.62"/>
+<gate name="V9" symbol="VCC2" x="-5.08" y="-7.62"/>
+<gate name="V10" symbol="VCC2" x="-2.54" y="-7.62"/>
+<gate name="V11" symbol="VC3" x="2.54" y="-7.62"/>
+<gate name="V12" symbol="VC3" x="5.08" y="-7.62"/>
+<gate name="V13" symbol="VC3" x="7.62" y="-7.62"/>
+<gate name="V14" symbol="VC3" x="10.16" y="-7.62"/>
+<gate name="V15" symbol="VC3" x="12.7" y="-7.62"/>
+<gate name="V16" symbol="VC3" x="15.24" y="-7.62"/>
+<gate name="V17" symbol="VC3" x="17.78" y="-7.62"/>
+<gate name="V18" symbol="VC3" x="20.32" y="-7.62"/>
+</gates>
+<devices>
+<device name="" package="TQFP144">
+<connects>
+<connect gate="A" pin="!CAS" pad="104"/>
+<connect gate="A" pin="!CS" pad="16"/>
+<connect gate="A" pin="!IO16" pad="4"/>
+<connect gate="A" pin="!PWDN" pad="137"/>
+<connect gate="A" pin="!RAS" pad="103"/>
+<connect gate="A" pin="!RD" pad="10"/>
+<connect gate="A" pin="!REFRESH" pad="105"/>
+<connect gate="A" pin="!RESET" pad="134"/>
+<connect gate="A" pin="!WR" pad="11"/>
+<connect gate="A" pin="A0" pad="12"/>
+<connect gate="A" pin="A1" pad="13"/>
+<connect gate="A" pin="A2" pad="15"/>
+<connect gate="A" pin="CK_OUT" pad="91"/>
+<connect gate="A" pin="IRQ" pad="14"/>
+<connect gate="A" pin="LDTEST" pad="136"/>
+<connect gate="A" pin="OVCK-OUT" pad="47"/>
+<connect gate="A" pin="RBS" pad="92"/>
+<connect gate="A" pin="READY" pad="7"/>
+<connect gate="A" pin="TEST" pad="135"/>
+<connect gate="A" pin="X1" pad="61"/>
+<connect gate="A" pin="X2" pad="62"/>
+<connect gate="B" pin="D0" pad="19"/>
+<connect gate="B" pin="D1" pad="22"/>
+<connect gate="B" pin="D10" pad="1"/>
+<connect gate="B" pin="D11" pad="144"/>
+<connect gate="B" pin="D12" pad="141"/>
+<connect gate="B" pin="D13" pad="140"/>
+<connect gate="B" pin="D14" pad="139"/>
+<connect gate="B" pin="D15" pad="138"/>
+<connect gate="B" pin="D2" pad="23"/>
+<connect gate="B" pin="D3" pad="24"/>
+<connect gate="B" pin="D4" pad="25"/>
+<connect gate="B" pin="D5" pad="26"/>
+<connect gate="B" pin="D6" pad="27"/>
+<connect gate="B" pin="D7" pad="28"/>
+<connect gate="B" pin="D8" pad="3"/>
+<connect gate="B" pin="D9" pad="2"/>
+<connect gate="C" pin="!WCS0" pad="89"/>
+<connect gate="C" pin="!WCS1" pad="90"/>
+<connect gate="C" pin="!WOE" pad="88"/>
+<connect gate="C" pin="!WWE" pad="87"/>
+<connect gate="C" pin="BCK-OUT" pad="46"/>
+<connect gate="C" pin="LFT" pad="60"/>
+<connect gate="C" pin="MIDI1_IN" pad="29"/>
+<connect gate="C" pin="MIDI1_OUT" pad="31"/>
+<connect gate="C" pin="MIDI2_IN" pad="30"/>
+<connect gate="C" pin="MIDI2_OUT" pad="32"/>
+<connect gate="C" pin="SD-IN0" pad="33"/>
+<connect gate="C" pin="SD-IN1" pad="34"/>
+<connect gate="C" pin="SD-IN2" pad="37"/>
+<connect gate="C" pin="SD-IN3" pad="38"/>
+<connect gate="C" pin="SD-IN4" pad="48"/>
+<connect gate="C" pin="SD-IN5" pad="49"/>
+<connect gate="C" pin="SD-IN6" pad="50"/>
+<connect gate="C" pin="SD-IN7" pad="53"/>
+<connect gate="C" pin="SD-OUT0" pad="39"/>
+<connect gate="C" pin="SD-OUT1" pad="40"/>
+<connect gate="C" pin="SD-OUT2" pad="43"/>
+<connect gate="C" pin="SD-OUT3" pad="44"/>
+<connect gate="C" pin="SD-OUT4" pad="54"/>
+<connect gate="C" pin="SD-OUT5" pad="55"/>
+<connect gate="C" pin="SD-OUT6" pad="56"/>
+<connect gate="C" pin="SD-OUT7" pad="57"/>
+<connect gate="C" pin="WS-OUT" pad="45"/>
+<connect gate="D" pin="WA0" pad="93"/>
+<connect gate="D" pin="WA1" pad="94"/>
+<connect gate="D" pin="WA10" pad="114"/>
+<connect gate="D" pin="WA11" pad="115"/>
+<connect gate="D" pin="WA12" pad="116"/>
+<connect gate="D" pin="WA13" pad="117"/>
+<connect gate="D" pin="WA14" pad="118"/>
+<connect gate="D" pin="WA15" pad="119"/>
+<connect gate="D" pin="WA16" pad="120"/>
+<connect gate="D" pin="WA17" pad="121"/>
+<connect gate="D" pin="WA18" pad="122"/>
+<connect gate="D" pin="WA19" pad="123"/>
+<connect gate="D" pin="WA2" pad="95"/>
+<connect gate="D" pin="WA20" pad="126"/>
+<connect gate="D" pin="WA21" pad="127"/>
+<connect gate="D" pin="WA22" pad="128"/>
+<connect gate="D" pin="WA23" pad="129"/>
+<connect gate="D" pin="WA24" pad="130"/>
+<connect gate="D" pin="WA25" pad="131"/>
+<connect gate="D" pin="WA26" pad="132"/>
+<connect gate="D" pin="WA3" pad="96"/>
+<connect gate="D" pin="WA4" pad="101"/>
+<connect gate="D" pin="WA5" pad="102"/>
+<connect gate="D" pin="WA6" pad="106"/>
+<connect gate="D" pin="WA7" pad="107"/>
+<connect gate="D" pin="WA8" pad="108"/>
+<connect gate="D" pin="WA9" pad="111"/>
+<connect gate="E" pin="WD0" pad="86"/>
+<connect gate="E" pin="WD1" pad="85"/>
+<connect gate="E" pin="WD10" pad="72"/>
+<connect gate="E" pin="WD11" pad="71"/>
+<connect gate="E" pin="WD12" pad="68"/>
+<connect gate="E" pin="WD13" pad="67"/>
+<connect gate="E" pin="WD14" pad="66"/>
+<connect gate="E" pin="WD15" pad="65"/>
+<connect gate="E" pin="WD2" pad="84"/>
+<connect gate="E" pin="WD3" pad="79"/>
+<connect gate="E" pin="WD4" pad="78"/>
+<connect gate="E" pin="WD5" pad="77"/>
+<connect gate="E" pin="WD6" pad="76"/>
+<connect gate="E" pin="WD7" pad="75"/>
+<connect gate="E" pin="WD8" pad="74"/>
+<connect gate="E" pin="WD9" pad="73"/>
+<connect gate="G1" pin="GND" pad="6"/>
+<connect gate="G10" pin="GND" pad="70"/>
+<connect gate="G11" pin="GND" pad="82"/>
+<connect gate="G12" pin="GND" pad="83"/>
+<connect gate="G13" pin="GND" pad="98"/>
+<connect gate="G14" pin="GND" pad="100"/>
+<connect gate="G15" pin="GND" pad="110"/>
+<connect gate="G16" pin="GND" pad="113"/>
+<connect gate="G17" pin="GND" pad="125"/>
+<connect gate="G18" pin="GND" pad="133"/>
+<connect gate="G19" pin="GND" pad="143"/>
+<connect gate="G2" pin="GND" pad="9"/>
+<connect gate="G3" pin="GND" pad="18"/>
+<connect gate="G4" pin="GND" pad="21"/>
+<connect gate="G5" pin="GND" pad="36"/>
+<connect gate="G6" pin="GND" pad="42"/>
+<connect gate="G7" pin="GND" pad="51"/>
+<connect gate="G8" pin="GND" pad="59"/>
+<connect gate="G9" pin="GND" pad="64"/>
+<connect gate="V1" pin="VCC1" pad="5"/>
+<connect gate="V10" pin="VCC2" pad="124"/>
+<connect gate="V11" pin="VC3" pad="8"/>
+<connect gate="V12" pin="VC3" pad="17"/>
+<connect gate="V13" pin="VC3" pad="41"/>
+<connect gate="V14" pin="VC3" pad="58"/>
+<connect gate="V15" pin="VC3" pad="63"/>
+<connect gate="V16" pin="VC3" pad="80"/>
+<connect gate="V17" pin="VC3" pad="99"/>
+<connect gate="V18" pin="VC3" pad="112"/>
+<connect gate="V2" pin="VCC1" pad="20"/>
+<connect gate="V3" pin="VCC1" pad="35"/>
+<connect gate="V4" pin="VCC1" pad="52"/>
+<connect gate="V5" pin="VCC1" pad="142"/>
+<connect gate="V6" pin="VCC2" pad="69"/>
+<connect gate="V7" pin="VCC2" pad="81"/>
+<connect gate="V8" pin="VCC2" pad="97"/>
+<connect gate="V9" pin="VCC2" pad="109"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8*C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: Uploaded by Heiko Künzel &lt;heiko.kuenzel@atg-gera.de&gt; from ATG Automatisierungstechnik Gera&lt;br&gt;
+Mon Mar 10 13:32:48 2003 Atmel-Library mit zusätzlich T83C5121-Prozessor im SSOP24-Package.</description>
+<gates>
+<gate name="G$1" symbol="T8XC5121" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SSOP24">
+<connects>
+<connect gate="G$1" pin="CVCC" pad="3"/>
+<connect gate="G$1" pin="CVSS" pad="1"/>
+<connect gate="G$1" pin="DVCC" pad="22"/>
+<connect gate="G$1" pin="EVCC" pad="23"/>
+<connect gate="G$1" pin="LI" pad="2"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="9"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="8"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="7"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="6"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="5"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="4"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="19"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="16"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="18"/>
+<connect gate="G$1" pin="P3.4/T0" pad="17"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="15"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="14"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="13"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VSS" pad="21"/>
+<connect gate="G$1" pin="XTAL1" pad="12"/>
+<connect gate="G$1" pin="XTAL2" pad="11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T8?C5121" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with Multiprotocol Smart Card Interface&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/...doc4164.pdf</description>
+<gates>
+<gate name="G$1" symbol="T8X5121-PLCC52" x="0" y="0"/>
+</gates>
+<devices>
+<device name="3" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="5" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="9" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!RST" pad="20"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="CVCC" pad="6"/>
+<connect gate="G$1" pin="CVSS" pad="2"/>
+<connect gate="G$1" pin="DVCC" pad="46"/>
+<connect gate="G$1" pin="EA" pad="10"/>
+<connect gate="G$1" pin="EVCC" pad="51"/>
+<connect gate="G$1" pin="LI" pad="3"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="42"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="41"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="40"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="39"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="21"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="38"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0/CIO" pad="18"/>
+<connect gate="G$1" pin="P1.1/CC8" pad="17"/>
+<connect gate="G$1" pin="P1.2/CPRES" pad="16"/>
+<connect gate="G$1" pin="P1.3/CC4" pad="9"/>
+<connect gate="G$1" pin="P1.4/CCLK" pad="8"/>
+<connect gate="G$1" pin="P1.5/CRST" pad="7"/>
+<connect gate="G$1" pin="P2.0/A8" pad="29"/>
+<connect gate="G$1" pin="P2.1/A9" pad="28"/>
+<connect gate="G$1" pin="P2.2/A10" pad="27"/>
+<connect gate="G$1" pin="P2.3/A11" pad="26"/>
+<connect gate="G$1" pin="P2.4/A12" pad="19"/>
+<connect gate="G$1" pin="P2.5/A13" pad="15"/>
+<connect gate="G$1" pin="P2.6/A14" pad="14"/>
+<connect gate="G$1" pin="P2.7/A15" pad="13"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="44"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="43"/>
+<connect gate="G$1" pin="P3.2/INT0" pad="35"/>
+<connect gate="G$1" pin="P3.3/INT1" pad="37"/>
+<connect gate="G$1" pin="P3.4/T0" pad="36"/>
+<connect gate="G$1" pin="P3.5/CIO1" pad="34"/>
+<connect gate="G$1" pin="P3.6/CCLK1/LED0" pad="32"/>
+<connect gate="G$1" pin="P3.7/CRST1/LED1" pad="31"/>
+<connect gate="G$1" pin="PSEN" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="24"/>
+<connect gate="G$1" pin="VCC@1" pad="1"/>
+<connect gate="G$1" pin="VSS" pad="25"/>
+<connect gate="G$1" pin="VSS@1" pad="45"/>
+<connect gate="G$1" pin="XTAL1" pad="23"/>
+<connect gate="G$1" pin="XTAL2" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT8*C51SND1C" prefix="IC">
+<description>&lt;b&gt;Single-Chip Flash Microcontroller&lt;/b&gt;&lt;p&gt;
+with MP3 Decoder and Human Interface&lt;br&gt;
+Source: www.atmel.com .. doc4109.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C51SND1C" x="0" y="0"/>
+<gate name="P" symbol="P-AT89C51SND1C" x="40.64" y="-7.62" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DESL" pad="58"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0/A8" pad="78"/>
+<connect gate="G$1" pin="P2.1/A9" pad="77"/>
+<connect gate="G$1" pin="P2.2/A10" pad="71"/>
+<connect gate="G$1" pin="P2.3/A11" pad="70"/>
+<connect gate="G$1" pin="P2.4/A12" pad="69"/>
+<connect gate="G$1" pin="P2.5/A13" pad="68"/>
+<connect gate="G$1" pin="P2.6/A14" pad="67"/>
+<connect gate="G$1" pin="P2.7/A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+<connect gate="P" pin="PVDD" pad="23"/>
+<connect gate="P" pin="PVSS" pad="25"/>
+<connect gate="P" pin="UVDD" pad="31"/>
+<connect gate="P" pin="UVSS" pad="32"/>
+<connect gate="P" pin="VDD@1" pad="1"/>
+<connect gate="P" pin="VDD@2" pad="22"/>
+<connect gate="P" pin="VDD@3" pad="35"/>
+<connect gate="P" pin="VDD@4" pad="54"/>
+<connect gate="P" pin="VDD@5" pad="64"/>
+<connect gate="P" pin="VSS@1" pad="2"/>
+<connect gate="P" pin="VSS@2" pad="26"/>
+<connect gate="P" pin="VSS@3" pad="36"/>
+<connect gate="P" pin="VSS@4" pad="55"/>
+<connect gate="P" pin="VSS@5" pad="65"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-RO" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DESL" pad="45"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0/A8" pad="64"/>
+<connect gate="G$1" pin="P2.1/A9" pad="63"/>
+<connect gate="G$1" pin="P2.2/A10" pad="58"/>
+<connect gate="G$1" pin="P2.3/A11" pad="57"/>
+<connect gate="G$1" pin="P2.4/A12" pad="56"/>
+<connect gate="G$1" pin="P2.5/A13" pad="55"/>
+<connect gate="G$1" pin="P2.6/A14" pad="54"/>
+<connect gate="G$1" pin="P2.7/A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+<connect gate="P" pin="PVDD" pad="51"/>
+<connect gate="P" pin="PVSS" pad="14"/>
+<connect gate="P" pin="UVDD" pad="19"/>
+<connect gate="P" pin="UVSS" pad="20"/>
+<connect gate="P" pin="VDD@1" pad="11"/>
+<connect gate="P" pin="VDD@2" pad="12"/>
+<connect gate="P" pin="VDD@3" pad="23"/>
+<connect gate="P" pin="VDD@4" pad="41"/>
+<connect gate="P" pin="VDD@5" pad="71"/>
+<connect gate="P" pin="VSS@1" pad="15"/>
+<connect gate="P" pin="VSS@2" pad="24"/>
+<connect gate="P" pin="VSS@3" pad="42"/>
+<connect gate="P" pin="VSS@4" pad="52"/>
+<connect gate="P" pin="VSS@5" pad="72"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095728" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-7H" package="BGA81">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="B2"/>
+<connect gate="G$1" pin="!TST" pad="G2"/>
+<connect gate="G$1" pin="AIN0" pad="H5"/>
+<connect gate="G$1" pin="AIN1" pad="H7"/>
+<connect gate="G$1" pin="ALE" pad="A1"/>
+<connect gate="G$1" pin="AREFN" pad="J6"/>
+<connect gate="G$1" pin="AREFP" pad="J7"/>
+<connect gate="G$1" pin="AVDD" pad="F5"/>
+<connect gate="G$1" pin="AVSS" pad="H6"/>
+<connect gate="G$1" pin="D+" pad="J1"/>
+<connect gate="G$1" pin="D-" pad="H2"/>
+<connect gate="G$1" pin="DCLK" pad="H9"/>
+<connect gate="G$1" pin="DESL" pad="G9"/>
+<connect gate="G$1" pin="DOUT" pad="G7"/>
+<connect gate="G$1" pin="FILT" pad="E4"/>
+<connect gate="G$1" pin="MCLK" pad="F7"/>
+<connect gate="G$1" pin="MCMD" pad="F8"/>
+<connect gate="G$1" pin="MDAT" pad="F6"/>
+<connect gate="G$1" pin="P0.0/AD0" pad="B3"/>
+<connect gate="G$1" pin="P0.1/AD1" pad="B5"/>
+<connect gate="G$1" pin="P0.2/AD2" pad="A4"/>
+<connect gate="G$1" pin="P0.3/AD3" pad="A3"/>
+<connect gate="G$1" pin="P0.4/AD4" pad="B4"/>
+<connect gate="G$1" pin="P0.5/AD5" pad="D5"/>
+<connect gate="G$1" pin="P0.6/AD6" pad="C6"/>
+<connect gate="G$1" pin="P0.7/AD7" pad="D6"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="C3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="B1"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="C1"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="C2"/>
+<connect gate="G$1" pin="P1.4" pad="D1"/>
+<connect gate="G$1" pin="P1.5" pad="D2"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="D4"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="D3"/>
+<connect gate="G$1" pin="P2.0/A8" pad="A8"/>
+<connect gate="G$1" pin="P2.1/A9" pad="C7"/>
+<connect gate="G$1" pin="P2.2/A10" pad="C8"/>
+<connect gate="G$1" pin="P2.3/A11" pad="E8"/>
+<connect gate="G$1" pin="P2.4/A12" pad="D9"/>
+<connect gate="G$1" pin="P2.5/A13" pad="C9"/>
+<connect gate="G$1" pin="P2.6/A14" pad="D8"/>
+<connect gate="G$1" pin="P2.7/A15" pad="E6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="J3"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="H3"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="J4"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="H4"/>
+<connect gate="G$1" pin="P3.4/T0" pad="F4"/>
+<connect gate="G$1" pin="P3.5/T1" pad="G4"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="J5"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="G5"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="A7"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="B7"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="A6"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="B6"/>
+<connect gate="G$1" pin="P4.4" pad="B9"/>
+<connect gate="G$1" pin="P4.5" pad="D7"/>
+<connect gate="G$1" pin="P4.6" pad="A9"/>
+<connect gate="G$1" pin="P4.7" pad="B8"/>
+<connect gate="G$1" pin="P5.0" pad="A2"/>
+<connect gate="G$1" pin="P5.1" pad="C4"/>
+<connect gate="G$1" pin="P5.2" pad="J8"/>
+<connect gate="G$1" pin="P5.3" pad="G6"/>
+<connect gate="G$1" pin="RST" pad="F9"/>
+<connect gate="G$1" pin="SCLK" pad="G8"/>
+<connect gate="G$1" pin="X1" pad="E2"/>
+<connect gate="G$1" pin="X2" pad="F1"/>
+<connect gate="P" pin="PVDD" pad="E3"/>
+<connect gate="P" pin="PVSS" pad="F2"/>
+<connect gate="P" pin="UVDD" pad="H1"/>
+<connect gate="P" pin="UVSS" pad="F3"/>
+<connect gate="P" pin="VDD@1" pad="A5"/>
+<connect gate="P" pin="VDD@2" pad="E1"/>
+<connect gate="P" pin="VDD@3" pad="E9"/>
+<connect gate="P" pin="VDD@4" pad="G3"/>
+<connect gate="P" pin="VDD@5" pad="J9"/>
+<connect gate="P" pin="VSS@1" pad="C5"/>
+<connect gate="P" pin="VSS@2" pad="E7"/>
+<connect gate="P" pin="VSS@3" pad="G1"/>
+<connect gate="P" pin="VSS@4" pad="H8"/>
+<connect gate="P" pin="VSS@5" pad="J2"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="9">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PC" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="31"/>
+<connect gate="G$1" pin="!PSEN" pad="29"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="30"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="39"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="38"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="37"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="36"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="35"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="34"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="33"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="32"/>
+<connect gate="G$1" pin="P1.0" pad="1"/>
+<connect gate="G$1" pin="P1.1" pad="2"/>
+<connect gate="G$1" pin="P1.2" pad="3"/>
+<connect gate="G$1" pin="P1.3" pad="4"/>
+<connect gate="G$1" pin="P1.4" pad="5"/>
+<connect gate="G$1" pin="P1.5" pad="6"/>
+<connect gate="G$1" pin="P1.6" pad="7"/>
+<connect gate="G$1" pin="P1.7" pad="8"/>
+<connect gate="G$1" pin="P2.0_A8" pad="21"/>
+<connect gate="G$1" pin="P2.1_A9" pad="22"/>
+<connect gate="G$1" pin="P2.2_A10" pad="23"/>
+<connect gate="G$1" pin="P2.3_A11" pad="24"/>
+<connect gate="G$1" pin="P2.4_A12" pad="25"/>
+<connect gate="G$1" pin="P2.5_A13" pad="26"/>
+<connect gate="G$1" pin="P2.6_A14" pad="27"/>
+<connect gate="G$1" pin="P2.7_A15" pad="28"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="10"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="11"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="13"/>
+<connect gate="G$1" pin="P3.4/T0" pad="14"/>
+<connect gate="G$1" pin="P3.5/T1" pad="15"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="16"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="17"/>
+<connect gate="G$1" pin="RST" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="JC" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="35"/>
+<connect gate="G$1" pin="!PSEN" pad="32"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="33"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="43"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="42"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="41"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="40"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="39"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0" pad="2"/>
+<connect gate="G$1" pin="P1.1" pad="3"/>
+<connect gate="G$1" pin="P1.2" pad="4"/>
+<connect gate="G$1" pin="P1.3" pad="5"/>
+<connect gate="G$1" pin="P1.4" pad="6"/>
+<connect gate="G$1" pin="P1.5" pad="7"/>
+<connect gate="G$1" pin="P1.6" pad="8"/>
+<connect gate="G$1" pin="P1.7" pad="9"/>
+<connect gate="G$1" pin="P2.0_A8" pad="24"/>
+<connect gate="G$1" pin="P2.1_A9" pad="25"/>
+<connect gate="G$1" pin="P2.2_A10" pad="26"/>
+<connect gate="G$1" pin="P2.3_A11" pad="27"/>
+<connect gate="G$1" pin="P2.4_A12" pad="28"/>
+<connect gate="G$1" pin="P2.5_A13" pad="29"/>
+<connect gate="G$1" pin="P2.6_A14" pad="30"/>
+<connect gate="G$1" pin="P2.7_A15" pad="31"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="14"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="15"/>
+<connect gate="G$1" pin="P3.4/T0" pad="16"/>
+<connect gate="G$1" pin="P3.5/T1" pad="17"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="18"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="19"/>
+<connect gate="G$1" pin="RST" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+<technology name="16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51RE2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1455062" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3857" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-RLTUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095726" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1802" constant="no"/>
+</technology>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C51ED2-SLSUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095722" constant="no"/>
+<attribute name="OC_NEWARK" value="78K5790" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C51?*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K Bytes Flash&lt;/b&gt;&lt;p&gt;
+&lt;font color="red"&gt;Not Recommended for New Designs. Use AT89S51.&lt;/font&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc0265.</description>
+<gates>
+<gate name="G$1" symbol="AT89C51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="always"/>
+</gates>
+<devices>
+<device name="AC" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="QC" package="PQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5" pad="1"/>
+<connect gate="G$1" pin="P1.6" pad="2"/>
+<connect gate="G$1" pin="P1.7" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-12">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-16">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51-*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="P" symbol="AT89S51" x="0" y="0"/>
+</gates>
+<devices>
+<device name="P" package="DIL40">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="31"/>
+<connect gate="P" pin="!PSEN" pad="29"/>
+<connect gate="P" pin="ALE/!PROG" pad="30"/>
+<connect gate="P" pin="GND" pad="20"/>
+<connect gate="P" pin="P0.0_AD0" pad="39"/>
+<connect gate="P" pin="P0.1_AD1" pad="38"/>
+<connect gate="P" pin="P0.2_AD2" pad="37"/>
+<connect gate="P" pin="P0.3_AD3" pad="36"/>
+<connect gate="P" pin="P0.4_AD4" pad="35"/>
+<connect gate="P" pin="P0.5_AD5" pad="34"/>
+<connect gate="P" pin="P0.6_AD6" pad="33"/>
+<connect gate="P" pin="P0.7_AD7" pad="32"/>
+<connect gate="P" pin="P1.0" pad="1"/>
+<connect gate="P" pin="P1.1" pad="2"/>
+<connect gate="P" pin="P1.2" pad="3"/>
+<connect gate="P" pin="P1.3" pad="4"/>
+<connect gate="P" pin="P1.4" pad="5"/>
+<connect gate="P" pin="P1.5_MOSI" pad="6"/>
+<connect gate="P" pin="P1.6_MISO" pad="7"/>
+<connect gate="P" pin="P1.7_SCK" pad="8"/>
+<connect gate="P" pin="P2.0_A8" pad="21"/>
+<connect gate="P" pin="P2.1_A9" pad="22"/>
+<connect gate="P" pin="P2.2_A10" pad="23"/>
+<connect gate="P" pin="P2.3_A11" pad="24"/>
+<connect gate="P" pin="P2.4_A12" pad="25"/>
+<connect gate="P" pin="P2.5_A13" pad="26"/>
+<connect gate="P" pin="P2.6_A14" pad="27"/>
+<connect gate="P" pin="P2.7_A15" pad="28"/>
+<connect gate="P" pin="P3.0/RXD" pad="10"/>
+<connect gate="P" pin="P3.1/TXD" pad="11"/>
+<connect gate="P" pin="P3.2/!INT0" pad="12"/>
+<connect gate="P" pin="P3.3/!INT1" pad="13"/>
+<connect gate="P" pin="P3.4/T0" pad="14"/>
+<connect gate="P" pin="P3.5/T1" pad="15"/>
+<connect gate="P" pin="P3.6/!WR" pad="16"/>
+<connect gate="P" pin="P3.7/!RD" pad="17"/>
+<connect gate="P" pin="RST" pad="9"/>
+<connect gate="P" pin="VCC" pad="40"/>
+<connect gate="P" pin="XTAL1" pad="19"/>
+<connect gate="P" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095739" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6578" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89S51-24JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6577" constant="no"/>
+</technology>
+<technology name="33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1095738" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="S44">
+<connects>
+<connect gate="P" pin="!EA!/VPP" pad="35"/>
+<connect gate="P" pin="!PSEN" pad="32"/>
+<connect gate="P" pin="ALE/!PROG" pad="33"/>
+<connect gate="P" pin="GND" pad="22"/>
+<connect gate="P" pin="P0.0_AD0" pad="43"/>
+<connect gate="P" pin="P0.1_AD1" pad="42"/>
+<connect gate="P" pin="P0.2_AD2" pad="41"/>
+<connect gate="P" pin="P0.3_AD3" pad="40"/>
+<connect gate="P" pin="P0.4_AD4" pad="39"/>
+<connect gate="P" pin="P0.5_AD5" pad="38"/>
+<connect gate="P" pin="P0.6_AD6" pad="37"/>
+<connect gate="P" pin="P0.7_AD7" pad="36"/>
+<connect gate="P" pin="P1.0" pad="2"/>
+<connect gate="P" pin="P1.1" pad="3"/>
+<connect gate="P" pin="P1.2" pad="4"/>
+<connect gate="P" pin="P1.3" pad="5"/>
+<connect gate="P" pin="P1.4" pad="6"/>
+<connect gate="P" pin="P1.5_MOSI" pad="7"/>
+<connect gate="P" pin="P1.6_MISO" pad="8"/>
+<connect gate="P" pin="P1.7_SCK" pad="9"/>
+<connect gate="P" pin="P2.0_A8" pad="24"/>
+<connect gate="P" pin="P2.1_A9" pad="25"/>
+<connect gate="P" pin="P2.2_A10" pad="26"/>
+<connect gate="P" pin="P2.3_A11" pad="27"/>
+<connect gate="P" pin="P2.4_A12" pad="28"/>
+<connect gate="P" pin="P2.5_A13" pad="29"/>
+<connect gate="P" pin="P2.6_A14" pad="30"/>
+<connect gate="P" pin="P2.7_A15" pad="31"/>
+<connect gate="P" pin="P3.0/RXD" pad="11"/>
+<connect gate="P" pin="P3.1/TXD" pad="13"/>
+<connect gate="P" pin="P3.2/!INT0" pad="14"/>
+<connect gate="P" pin="P3.3/!INT1" pad="15"/>
+<connect gate="P" pin="P3.4/T0" pad="16"/>
+<connect gate="P" pin="P3.5/T1" pad="17"/>
+<connect gate="P" pin="P3.6/!WR" pad="18"/>
+<connect gate="P" pin="P3.7/!RD" pad="19"/>
+<connect gate="P" pin="RST" pad="10"/>
+<connect gate="P" pin="VCC" pad="44"/>
+<connect gate="P" pin="XTAL1" pad="21"/>
+<connect gate="P" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89S51*P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 4K BytesIn-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2487.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89S51" x="0" y="0"/>
+<gate name="P" symbol="GND" x="2.54" y="-33.02" addlevel="request"/>
+</gates>
+<devices>
+<device name="" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="29"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="ALE/!PROG" pad="27"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="37"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="36"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="35"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="34"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="33"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="32"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="31"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="30"/>
+<connect gate="G$1" pin="P1.0" pad="40"/>
+<connect gate="G$1" pin="P1.1" pad="41"/>
+<connect gate="G$1" pin="P1.2" pad="42"/>
+<connect gate="G$1" pin="P1.3" pad="43"/>
+<connect gate="G$1" pin="P1.4" pad="44"/>
+<connect gate="G$1" pin="P1.5_MOSI" pad="1"/>
+<connect gate="G$1" pin="P1.6_MISO" pad="2"/>
+<connect gate="G$1" pin="P1.7_SCK" pad="3"/>
+<connect gate="G$1" pin="P2.0_A8" pad="18"/>
+<connect gate="G$1" pin="P2.1_A9" pad="19"/>
+<connect gate="G$1" pin="P2.2_A10" pad="20"/>
+<connect gate="G$1" pin="P2.3_A11" pad="21"/>
+<connect gate="G$1" pin="P2.4_A12" pad="22"/>
+<connect gate="G$1" pin="P2.5_A13" pad="23"/>
+<connect gate="G$1" pin="P2.6_A14" pad="24"/>
+<connect gate="G$1" pin="P2.7_A15" pad="25"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="5"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="7"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="8"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="9"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="11"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="12"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="13"/>
+<connect gate="G$1" pin="RST" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+<connect gate="P" pin="GND" pad="17"/>
+</connects>
+<technologies>
+<technology name="-24">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="-33">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-?IM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02" x="0" y="0"/>
+</gates>
+<devices>
+<device name="TIS" package="SO28W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/SOIC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9134" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SIS" package="PLCC28">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="28"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="27"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="26"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="25"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="24"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="23"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="22"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="21"/>
+<connect gate="G$1" pin="P2.0" pad="20"/>
+<connect gate="G$1" pin="P2.1" pad="6"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="13"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="12"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="11"/>
+<connect gate="G$1" pin="P3.4/T0" pad="10"/>
+<connect gate="G$1" pin="P3.5/T1" pad="9"/>
+<connect gate="G$1" pin="P3.6" pad="8"/>
+<connect gate="G$1" pin="P3.7" pad="7"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="19"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="17"/>
+<connect gate="G$1" pin="VSS" pad="18"/>
+<connect gate="G$1" pin="XTAL1" pad="16"/>
+<connect gate="G$1" pin="XTAL2" pad="15"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="DIL40/PLCC28ZIFAWM-1" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="89M9105" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="RAT" package="VQFP32">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="27"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="26"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="25"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="24"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="23"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="22"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="21"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="20"/>
+<connect gate="G$1" pin="P2.0" pad="19"/>
+<connect gate="G$1" pin="P2.1" pad="2"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="6"/>
+<connect gate="G$1" pin="P3.5/T1" pad="5"/>
+<connect gate="G$1" pin="P3.6" pad="4"/>
+<connect gate="G$1" pin="P3.7" pad="3"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="1"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="32"/>
+<connect gate="G$1" pin="RST" pad="17"/>
+<connect gate="G$1" pin="VAGND" pad="29"/>
+<connect gate="G$1" pin="VAREF" pad="28"/>
+<connect gate="G$1" pin="VAVCC" pad="31"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="G$1" pin="VSS" pad="16"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T89C51CC02*-TDSIM" prefix="IC">
+<description>&lt;b&gt;Enhanced 8-bit Microcontroller with CAN Controller and Flash&lt;/b&gt; 80C51 Core Architecture&lt;p&gt; 
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4126.</description>
+<gates>
+<gate name="G$1" symbol="T89C51CC02-SO24" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SO24W">
+<connects>
+<connect gate="G$1" pin="P1.0/AN0/T2" pad="24"/>
+<connect gate="G$1" pin="P1.1/AN1/T2EX" pad="23"/>
+<connect gate="G$1" pin="P1.2/AN2/ECI" pad="22"/>
+<connect gate="G$1" pin="P1.3/AN3/CEX0" pad="21"/>
+<connect gate="G$1" pin="P1.4/AN4/CEX1" pad="20"/>
+<connect gate="G$1" pin="P1.5/AN5" pad="19"/>
+<connect gate="G$1" pin="P1.6/AN6" pad="18"/>
+<connect gate="G$1" pin="P1.7/AN7" pad="17"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="11"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="10"/>
+<connect gate="G$1" pin="P3.2/!INT" pad="9"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="8"/>
+<connect gate="G$1" pin="P3.4/T0" pad="7"/>
+<connect gate="G$1" pin="P3.5/T1" pad="6"/>
+<connect gate="G$1" pin="P4.0/RXDC" pad="5"/>
+<connect gate="G$1" pin="P4.1/TXDC" pad="4"/>
+<connect gate="G$1" pin="RST" pad="16"/>
+<connect gate="G$1" pin="VAGND" pad="2"/>
+<connect gate="G$1" pin="VAREF" pad="1"/>
+<connect gate="G$1" pin="VAVCC" pad="3"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="CA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="UA">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91RM9200" prefix="IC">
+<description>Auto generated by &lt;b&gt;make-symbol-device-package(bsdl).ulp&lt;/b&gt;&lt;p&gt;
+Source: at91rm9200_bga.bsd</description>
+<gates>
+<gate name="G$1" symbol="AT91RM9200_BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LFBGA256_A_291X326">
+<connects>
+<connect gate="G$1" pin="A10_SDRAM" pad="N6"/>
+<connect gate="G$1" pin="A16_BA0" pad="U3"/>
+<connect gate="G$1" pin="A17_BA1" pad="T3"/>
+<connect gate="G$1" pin="A1_DQM2" pad="M4"/>
+<connect gate="G$1" pin="A_10" pad="M5"/>
+<connect gate="G$1" pin="A_11" pad="P5"/>
+<connect gate="G$1" pin="A_12" pad="P3"/>
+<connect gate="G$1" pin="A_13" pad="P2"/>
+<connect gate="G$1" pin="A_14" pad="N5"/>
+<connect gate="G$1" pin="A_15" pad="T1"/>
+<connect gate="G$1" pin="A_18" pad="R3"/>
+<connect gate="G$1" pin="A_19" pad="U4"/>
+<connect gate="G$1" pin="A_2" pad="M6"/>
+<connect gate="G$1" pin="A_20" pad="R4"/>
+<connect gate="G$1" pin="A_21" pad="N8"/>
+<connect gate="G$1" pin="A_22" pad="P6"/>
+<connect gate="G$1" pin="A_3" pad="M3"/>
+<connect gate="G$1" pin="A_4" pad="N4"/>
+<connect gate="G$1" pin="A_5" pad="N2"/>
+<connect gate="G$1" pin="A_6" pad="L4"/>
+<connect gate="G$1" pin="A_7" pad="P1"/>
+<connect gate="G$1" pin="A_8" pad="N7"/>
+<connect gate="G$1" pin="A_9" pad="N3"/>
+<connect gate="G$1" pin="CAS" pad="U8"/>
+<connect gate="G$1" pin="DM" pad="K2"/>
+<connect gate="G$1" pin="DP" pad="K5"/>
+<connect gate="G$1" pin="D_0" pad="R9"/>
+<connect gate="G$1" pin="D_1" pad="P10"/>
+<connect gate="G$1" pin="D_10" pad="P12"/>
+<connect gate="G$1" pin="D_11" pad="U12"/>
+<connect gate="G$1" pin="D_12" pad="T12"/>
+<connect gate="G$1" pin="D_13" pad="R12"/>
+<connect gate="G$1" pin="D_14" pad="U13"/>
+<connect gate="G$1" pin="D_15" pad="P13"/>
+<connect gate="G$1" pin="D_2" pad="N11"/>
+<connect gate="G$1" pin="D_3" pad="U9"/>
+<connect gate="G$1" pin="D_4" pad="M11"/>
+<connect gate="G$1" pin="D_5" pad="P11"/>
+<connect gate="G$1" pin="D_6" pad="U10"/>
+<connect gate="G$1" pin="D_7" pad="U11"/>
+<connect gate="G$1" pin="D_8" pad="R11"/>
+<connect gate="G$1" pin="D_9" pad="T11"/>
+<connect gate="G$1" pin="HDMA" pad="K3"/>
+<connect gate="G$1" pin="HDMB" pad="L3"/>
+<connect gate="G$1" pin="HDPA" pad="K1"/>
+<connect gate="G$1" pin="HDPB" pad="L2"/>
+<connect gate="G$1" pin="ICETCK" pad="E5"/>
+<connect gate="G$1" pin="ICETDI" pad="A1"/>
+<connect gate="G$1" pin="ICETDO" pad="B1"/>
+<connect gate="G$1" pin="ICETMS" pad="C1"/>
+<connect gate="G$1" pin="JTAGSEL" pad="A2"/>
+<connect gate="G$1" pin="MIX33VDD@1" pad="P16"/>
+<connect gate="G$1" pin="MIX33VDD@10" pad="D5"/>
+<connect gate="G$1" pin="MIX33VDD@11" pad="D2"/>
+<connect gate="G$1" pin="MIX33VDD@12" pad="D3"/>
+<connect gate="G$1" pin="MIX33VDD@13" pad="H5"/>
+<connect gate="G$1" pin="MIX33VDD@14" pad="K4"/>
+<connect gate="G$1" pin="MIX33VDD@15" pad="L6"/>
+<connect gate="G$1" pin="MIX33VDD@16" pad="M1"/>
+<connect gate="G$1" pin="MIX33VDD@17" pad="P4"/>
+<connect gate="G$1" pin="MIX33VDD@18" pad="R6"/>
+<connect gate="G$1" pin="MIX33VDD@19" pad="T5"/>
+<connect gate="G$1" pin="MIX33VDD@2" pad="R17"/>
+<connect gate="G$1" pin="MIX33VDD@20" pad="R10"/>
+<connect gate="G$1" pin="MIX33VDD@21" pad="R14"/>
+<connect gate="G$1" pin="MIX33VDD@3" pad="K16"/>
+<connect gate="G$1" pin="MIX33VDD@4" pad="H14"/>
+<connect gate="G$1" pin="MIX33VDD@5" pad="A16"/>
+<connect gate="G$1" pin="MIX33VDD@6" pad="A11"/>
+<connect gate="G$1" pin="MIX33VDD@7" pad="B11"/>
+<connect gate="G$1" pin="MIX33VDD@8" pad="D8"/>
+<connect gate="G$1" pin="MIX33VDD@9" pad="A7"/>
+<connect gate="G$1" pin="MIX33VSS@1" pad="M12"/>
+<connect gate="G$1" pin="MIX33VSS@10" pad="E6"/>
+<connect gate="G$1" pin="MIX33VSS@11" pad="D4"/>
+<connect gate="G$1" pin="MIX33VSS@12" pad="E3"/>
+<connect gate="G$1" pin="MIX33VSS@13" pad="G3"/>
+<connect gate="G$1" pin="MIX33VSS@14" pad="L1"/>
+<connect gate="G$1" pin="MIX33VSS@15" pad="L5"/>
+<connect gate="G$1" pin="MIX33VSS@16" pad="M2"/>
+<connect gate="G$1" pin="MIX33VSS@17" pad="R1"/>
+<connect gate="G$1" pin="MIX33VSS@18" pad="M7"/>
+<connect gate="G$1" pin="MIX33VSS@19" pad="U5"/>
+<connect gate="G$1" pin="MIX33VSS@2" pad="P17"/>
+<connect gate="G$1" pin="MIX33VSS@20" pad="T9"/>
+<connect gate="G$1" pin="MIX33VSS@21" pad="T13"/>
+<connect gate="G$1" pin="MIX33VSS@3" pad="J12"/>
+<connect gate="G$1" pin="MIX33VSS@4" pad="H16"/>
+<connect gate="G$1" pin="MIX33VSS@5" pad="C15"/>
+<connect gate="G$1" pin="MIX33VSS@6" pad="C11"/>
+<connect gate="G$1" pin="MIX33VSS@7" pad="D11"/>
+<connect gate="G$1" pin="MIX33VSS@8" pad="B7"/>
+<connect gate="G$1" pin="MIX33VSS@9" pad="E8"/>
+<connect gate="G$1" pin="NBS3" pad="R8"/>
+<connect gate="G$1" pin="NCS0_BFCS" pad="U6"/>
+<connect gate="G$1" pin="NCS1_SDCS" pad="M9"/>
+<connect gate="G$1" pin="NCS2" pad="T6"/>
+<connect gate="G$1" pin="NCS3" pad="R7"/>
+<connect gate="G$1" pin="NLBA0_DQM0" pad="N1"/>
+<connect gate="G$1" pin="NRDNOE" pad="N9"/>
+<connect gate="G$1" pin="NRST" pad="E1"/>
+<connect gate="G$1" pin="NRW0NWE" pad="P8"/>
+<connect gate="G$1" pin="NRW1_NUB_DQM1" pad="T7"/>
+<connect gate="G$1" pin="NTRST" pad="E2"/>
+<connect gate="G$1" pin="OSC32K_XIN" pad="G17"/>
+<connect gate="G$1" pin="OSC32K_XOUT" pad="H17"/>
+<connect gate="G$1" pin="OSC9M_XIN" pad="J17"/>
+<connect gate="G$1" pin="OSC9M_XOUT" pad="K17"/>
+<connect gate="G$1" pin="PA0" pad="G13"/>
+<connect gate="G$1" pin="PA1" pad="G14"/>
+<connect gate="G$1" pin="PA10" pad="D15"/>
+<connect gate="G$1" pin="PA11" pad="B15"/>
+<connect gate="G$1" pin="PA12" pad="B16"/>
+<connect gate="G$1" pin="PA13" pad="A17"/>
+<connect gate="G$1" pin="PA14" pad="A15"/>
+<connect gate="G$1" pin="PA15" pad="B14"/>
+<connect gate="G$1" pin="PA16" pad="D14"/>
+<connect gate="G$1" pin="PA17" pad="B13"/>
+<connect gate="G$1" pin="PA18" pad="C13"/>
+<connect gate="G$1" pin="PA19" pad="A13"/>
+<connect gate="G$1" pin="PA2" pad="G15"/>
+<connect gate="G$1" pin="PA20" pad="C12"/>
+<connect gate="G$1" pin="PA21" pad="D13"/>
+<connect gate="G$1" pin="PA22" pad="D12"/>
+<connect gate="G$1" pin="PA23" pad="A12"/>
+<connect gate="G$1" pin="PA24" pad="B12"/>
+<connect gate="G$1" pin="PA25" pad="E13"/>
+<connect gate="G$1" pin="PA26" pad="E12"/>
+<connect gate="G$1" pin="PA27" pad="G12"/>
+<connect gate="G$1" pin="PA28" pad="F12"/>
+<connect gate="G$1" pin="PA29" pad="E11"/>
+<connect gate="G$1" pin="PA3" pad="G16"/>
+<connect gate="G$1" pin="PA30" pad="F11"/>
+<connect gate="G$1" pin="PA31" pad="A10"/>
+<connect gate="G$1" pin="PA4" pad="F13"/>
+<connect gate="G$1" pin="PA5" pad="F16"/>
+<connect gate="G$1" pin="PA6" pad="E15"/>
+<connect gate="G$1" pin="PA7" pad="B17"/>
+<connect gate="G$1" pin="PA8" pad="C16"/>
+<connect gate="G$1" pin="PA9" pad="E14"/>
+<connect gate="G$1" pin="PB0" pad="B10"/>
+<connect gate="G$1" pin="PB1" pad="C10"/>
+<connect gate="G$1" pin="PB10" pad="B8"/>
+<connect gate="G$1" pin="PB11" pad="F9"/>
+<connect gate="G$1" pin="PB12" pad="C8"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="D7"/>
+<connect gate="G$1" pin="PB15" pad="E7"/>
+<connect gate="G$1" pin="PB16" pad="F7"/>
+<connect gate="G$1" pin="PB17" pad="A4"/>
+<connect gate="G$1" pin="PB18" pad="B3"/>
+<connect gate="G$1" pin="PB19" pad="C5"/>
+<connect gate="G$1" pin="PB2" pad="D10"/>
+<connect gate="G$1" pin="PB20" pad="A3"/>
+<connect gate="G$1" pin="PB21" pad="B4"/>
+<connect gate="G$1" pin="PB22" pad="C4"/>
+<connect gate="G$1" pin="PB23" pad="F3"/>
+<connect gate="G$1" pin="PB24" pad="F5"/>
+<connect gate="G$1" pin="PB25" pad="F4"/>
+<connect gate="G$1" pin="PB26" pad="G4"/>
+<connect gate="G$1" pin="PB27" pad="G6"/>
+<connect gate="G$1" pin="PB28" pad="J5"/>
+<connect gate="G$1" pin="PB29" pad="J6"/>
+<connect gate="G$1" pin="PB3" pad="E10"/>
+<connect gate="G$1" pin="PB4" pad="A9"/>
+<connect gate="G$1" pin="PB5" pad="B9"/>
+<connect gate="G$1" pin="PB6" pad="C9"/>
+<connect gate="G$1" pin="PB7" pad="E9"/>
+<connect gate="G$1" pin="PB8" pad="D9"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PC0" pad="M15"/>
+<connect gate="G$1" pin="PC1" pad="M14"/>
+<connect gate="G$1" pin="PC10" pad="L12"/>
+<connect gate="G$1" pin="PC11" pad="N16"/>
+<connect gate="G$1" pin="PC12" pad="N17"/>
+<connect gate="G$1" pin="PC13" pad="M13"/>
+<connect gate="G$1" pin="PC14" pad="M17"/>
+<connect gate="G$1" pin="PC15" pad="L13"/>
+<connect gate="G$1" pin="PC16" pad="U14"/>
+<connect gate="G$1" pin="PC17" pad="R13"/>
+<connect gate="G$1" pin="PC18" pad="U15"/>
+<connect gate="G$1" pin="PC19" pad="T14"/>
+<connect gate="G$1" pin="PC2" pad="L14"/>
+<connect gate="G$1" pin="PC20" pad="U16"/>
+<connect gate="G$1" pin="PC21" pad="T15"/>
+<connect gate="G$1" pin="PC22" pad="U17"/>
+<connect gate="G$1" pin="PC23" pad="T16"/>
+<connect gate="G$1" pin="PC24" pad="R15"/>
+<connect gate="G$1" pin="PC25" pad="T17"/>
+<connect gate="G$1" pin="PC26" pad="P14"/>
+<connect gate="G$1" pin="PC27" pad="P15"/>
+<connect gate="G$1" pin="PC28" pad="N13"/>
+<connect gate="G$1" pin="PC29" pad="R16"/>
+<connect gate="G$1" pin="PC3" pad="L15"/>
+<connect gate="G$1" pin="PC30" pad="N15"/>
+<connect gate="G$1" pin="PC31" pad="N14"/>
+<connect gate="G$1" pin="PC4" pad="K14"/>
+<connect gate="G$1" pin="PC5" pad="K13"/>
+<connect gate="G$1" pin="PC6" pad="K15"/>
+<connect gate="G$1" pin="PC7" pad="T4"/>
+<connect gate="G$1" pin="PC8" pad="R5"/>
+<connect gate="G$1" pin="PC9" pad="P7"/>
+<connect gate="G$1" pin="PD0" pad="E17"/>
+<connect gate="G$1" pin="PD1" pad="F15"/>
+<connect gate="G$1" pin="PD10" pad="C6"/>
+<connect gate="G$1" pin="PD11" pad="A5"/>
+<connect gate="G$1" pin="PD12" pad="B5"/>
+<connect gate="G$1" pin="PD13" pad="B2"/>
+<connect gate="G$1" pin="PD14" pad="C3"/>
+<connect gate="G$1" pin="PD15" pad="C2"/>
+<connect gate="G$1" pin="PD16" pad="F1"/>
+<connect gate="G$1" pin="PD17" pad="G2"/>
+<connect gate="G$1" pin="PD18" pad="G5"/>
+<connect gate="G$1" pin="PD19" pad="G1"/>
+<connect gate="G$1" pin="PD2" pad="F14"/>
+<connect gate="G$1" pin="PD20" pad="H2"/>
+<connect gate="G$1" pin="PD21" pad="H4"/>
+<connect gate="G$1" pin="PD22" pad="H3"/>
+<connect gate="G$1" pin="PD23" pad="H1"/>
+<connect gate="G$1" pin="PD24" pad="J3"/>
+<connect gate="G$1" pin="PD25" pad="J1"/>
+<connect gate="G$1" pin="PD26" pad="J4"/>
+<connect gate="G$1" pin="PD27" pad="J2"/>
+<connect gate="G$1" pin="PD3" pad="E16"/>
+<connect gate="G$1" pin="PD4" pad="D17"/>
+<connect gate="G$1" pin="PD5" pad="C17"/>
+<connect gate="G$1" pin="PD6" pad="D16"/>
+<connect gate="G$1" pin="PD7" pad="D6"/>
+<connect gate="G$1" pin="PD8" pad="A6"/>
+<connect gate="G$1" pin="PD9" pad="B6"/>
+<connect gate="G$1" pin="PLL_A_RC" pad="L17"/>
+<connect gate="G$1" pin="PLL_B_RC" pad="F17"/>
+<connect gate="G$1" pin="RAS" pad="N10"/>
+<connect gate="G$1" pin="SDRAMCKE" pad="P9"/>
+<connect gate="G$1" pin="SDRAMCLK" pad="U7"/>
+<connect gate="G$1" pin="TST0" pad="E4"/>
+<connect gate="G$1" pin="TST1" pad="D1"/>
+<connect gate="G$1" pin="VDDI@1" pad="L16"/>
+<connect gate="G$1" pin="VDDI@2" pad="C14"/>
+<connect gate="G$1" pin="VDDI@3" pad="F6"/>
+<connect gate="G$1" pin="VDDI@4" pad="U1"/>
+<connect gate="G$1" pin="VDDI@5" pad="T2"/>
+<connect gate="G$1" pin="VDDI@6" pad="T10"/>
+<connect gate="G$1" pin="VDDI@7" pad="J15"/>
+<connect gate="G$1" pin="VDDI@8" pad="J14"/>
+<connect gate="G$1" pin="VDDI@9" pad="H13"/>
+<connect gate="G$1" pin="VSSI@1" pad="M16"/>
+<connect gate="G$1" pin="VSSI@2" pad="A14"/>
+<connect gate="G$1" pin="VSSI@3" pad="F2"/>
+<connect gate="G$1" pin="VSSI@4" pad="U2"/>
+<connect gate="G$1" pin="VSSI@5" pad="R2"/>
+<connect gate="G$1" pin="VSSI@6" pad="N12"/>
+<connect gate="G$1" pin="VSSI@7" pad="J16"/>
+<connect gate="G$1" pin="VSSI@8" pad="J13"/>
+<connect gate="G$1" pin="VSSI@9" pad="H15"/>
+<connect gate="G$1" pin="WE" pad="T8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91RM9200-EK" constant="no"/>
+<attribute name="OC_FARNELL" value="1629536" constant="no"/>
+<attribute name="OC_NEWARK" value="02P6234" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATF16V8B" prefix="IC">
+<description>&lt;b&gt;High perfomance CMOS (electrically erasable) programmable logic device (PLD)&lt;/b&gt;&lt;p&gt;
+ABLE-Atmel-ABEL - P18V8R, P16V8C, P16V8AS, P17V8&lt;br&gt;
+COPL Atmel-WinCUPL - G16V8MS, G16V8MA, G16V8AS, G16V8&lt;br&gt;
+LOG/IC - GAL16V8_R, GAL16V8_G7, GAL16V8_C), GAL16V8&lt;br&gt;
+Tango-PLD - G16V8R, G16V8C, G16V8AS, G16V8&lt;br&gt;
+
+
+Source: http://www.atmel.com/dyn/resources/prod_documents/DOC0364.PDF</description>
+<gates>
+<gate name="G$1" symbol="ATF16V8B" x="0" y="0"/>
+</gates>
+<devices>
+<device name="X" package="TSSOP20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="J" package="PLCC20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551767" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6253" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="P3" package="DIL20">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATF16V8CZ-15PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1551768" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6254" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="S" package="SO20L">
+<connects>
+<connect gate="G$1" pin="CLK" pad="1"/>
+<connect gate="G$1" pin="GND" pad="10"/>
+<connect gate="G$1" pin="I1" pad="2"/>
+<connect gate="G$1" pin="I2" pad="3"/>
+<connect gate="G$1" pin="I3" pad="4"/>
+<connect gate="G$1" pin="I4" pad="5"/>
+<connect gate="G$1" pin="I5" pad="6"/>
+<connect gate="G$1" pin="I6" pad="7"/>
+<connect gate="G$1" pin="I7" pad="8"/>
+<connect gate="G$1" pin="I8" pad="9"/>
+<connect gate="G$1" pin="O1" pad="19"/>
+<connect gate="G$1" pin="O2" pad="18"/>
+<connect gate="G$1" pin="O3" pad="17"/>
+<connect gate="G$1" pin="O4" pad="16"/>
+<connect gate="G$1" pin="O5" pad="15"/>
+<connect gate="G$1" pin="O6" pad="14"/>
+<connect gate="G$1" pin="O7" pad="13"/>
+<connect gate="G$1" pin="O8" pad="12"/>
+<connect gate="G$1" pin="OE" pad="11"/>
+<connect gate="G$1" pin="VCC" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="-MI" package="MLF32">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-AI" package="TQFP32-08">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171371" constant="no"/>
+<attribute name="OC_NEWARK" value="73M8863" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 4-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O-2" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL28-3">
+<connects>
+<connect gate="G$1" pin="AREF" pad="21"/>
+<connect gate="G$1" pin="AVCC" pad="20"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="8"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="14"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="15"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="16"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="17"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="18"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="19"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="9"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="10"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="1"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="2"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="3"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="4"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="5"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="6"/>
+<connect gate="G$1" pin="PD5(T1)" pad="11"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="12"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="13"/>
+<connect gate="G$1" pin="VCC@1" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455107" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171134" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6515" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171142" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6885" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171274" constant="no"/>
+<attribute name="OC_NEWARK" value="69K6677" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1661729" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1794" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171355" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6899" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171118" constant="no"/>
+<attribute name="OC_NEWARK" value="95K7364" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-A" package="TQFP64">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA169PV-8AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1617046" constant="no"/>
+<attribute name="OC_NEWARK" value="03P4011" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA1284" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+16 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA1284" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AGND" pad="28"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA323-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA323" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="24"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="27"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="26"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="25"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AGND" pad="31"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171410" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6904" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="26"/>
+<connect gate="G$1" pin="(A11)PC3" pad="27"/>
+<connect gate="G$1" pin="(A12)PC4" pad="28"/>
+<connect gate="G$1" pin="(A13)PC5" pad="29"/>
+<connect gate="G$1" pin="(A14)PC6" pad="30"/>
+<connect gate="G$1" pin="(A15)PC7" pad="31"/>
+<connect gate="G$1" pin="(A8)PC0" pad="24"/>
+<connect gate="G$1" pin="(A9)PC1" pad="25"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="43"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="42"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="41"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="40"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="39"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="38"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="37"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="5"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="14"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="15"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="17"/>
+<connect gate="G$1" pin="(RD)PD7" pad="19"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="11"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="13"/>
+<connect gate="G$1" pin="(WR)PD6" pad="18"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="16"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="NC1" pad="1"/>
+<connect gate="G$1" pin="NC2" pad="12"/>
+<connect gate="G$1" pin="NC3" pad="23"/>
+<connect gate="G$1" pin="NC4" pad="34"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="35"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="33"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="32"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="21"/>
+<connect gate="G$1" pin="XTAL2" pad="20"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562625" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6261" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-7" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="23"/>
+<connect gate="G$1" pin="(A11)PC3" pad="24"/>
+<connect gate="G$1" pin="(A12)PC4" pad="25"/>
+<connect gate="G$1" pin="(A13)PC5" pad="26"/>
+<connect gate="G$1" pin="(A14)PC6" pad="27"/>
+<connect gate="G$1" pin="(A15)PC7" pad="28"/>
+<connect gate="G$1" pin="(A8)PC0" pad="21"/>
+<connect gate="G$1" pin="(A9)PC1" pad="22"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="39"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="38"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="37"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="36"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="35"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="34"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="33"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="32"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="4"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="12"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="13"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="15"/>
+<connect gate="G$1" pin="(RD)PD7" pad="17"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="10"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="11"/>
+<connect gate="G$1" pin="(WR)PD6" pad="16"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="14"/>
+<connect gate="G$1" pin="GND" pad="20"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="31"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="30"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="29"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="40"/>
+<connect gate="G$1" pin="XTAL1" pad="19"/>
+<connect gate="G$1" pin="XTAL2" pad="18"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8515-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171401" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6905" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1528437" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6908" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-M" package="MLF44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-J" package="PLCC44">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="43"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="42"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="41"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="40"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="39"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="38"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="37"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="36"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="4"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="5"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="21"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="17"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="18"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="8"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="7"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="20"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="19"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="22"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="15"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="9"/>
+<connect gate="G$1" pin="(SS)PB4" pad="6"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="2"/>
+<connect gate="G$1" pin="(T1)PB1" pad="3"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="31"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="32"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="16"/>
+<connect gate="G$1" pin="AREF" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="33"/>
+<connect gate="G$1" pin="GND" pad="1"/>
+<connect gate="G$1" pin="GND1" pad="12"/>
+<connect gate="G$1" pin="GND2" pad="24"/>
+<connect gate="G$1" pin="GND@1" pad="34"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="25"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="26"/>
+<connect gate="G$1" pin="PC2" pad="27"/>
+<connect gate="G$1" pin="PC3" pad="28"/>
+<connect gate="G$1" pin="PC4" pad="29"/>
+<connect gate="G$1" pin="PC5" pad="30"/>
+<connect gate="G$1" pin="RESET" pad="10"/>
+<connect gate="G$1" pin="VCC" pad="11"/>
+<connect gate="G$1" pin="VCC1" pad="23"/>
+<connect gate="G$1" pin="VCC2" pad="44"/>
+<connect gate="G$1" pin="XTAL1" pad="14"/>
+<connect gate="G$1" pin="XTAL2" pad="13"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16JU" constant="no"/>
+<attribute name="OC_FARNELL" value="1562626" constant="no"/>
+<attribute name="OC_NEWARK" value="94M6263" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535-P" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="40"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="39"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="38"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="37"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="36"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="35"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="34"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="33"/>
+<connect gate="G$1" pin="(AIN0/OC0)PB2" pad="3"/>
+<connect gate="G$1" pin="(AIN1/INT2)PB3" pad="4"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="20"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="16"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="17"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="7"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="6"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="19"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="18"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="21"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="14"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="8"/>
+<connect gate="G$1" pin="(SCL)PC0" pad="22"/>
+<connect gate="G$1" pin="(SDA)PC1" pad="23"/>
+<connect gate="G$1" pin="(SS)PB4" pad="5"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="1"/>
+<connect gate="G$1" pin="(T1)PB1" pad="2"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="28"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="29"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="15"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PC2" pad="24"/>
+<connect gate="G$1" pin="PC3" pad="25"/>
+<connect gate="G$1" pin="PC4" pad="26"/>
+<connect gate="G$1" pin="PC5" pad="27"/>
+<connect gate="G$1" pin="RESET" pad="9"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA8535-16PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171444" constant="no"/>
+<attribute name="OC_NEWARK" value="01M6909" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C513*-" prefix="IC">
+<description>&lt;b&gt;8-bit Flash Microcontroller with Full Speed USB Device&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4136.pdf&lt;p&gt;
+&lt;b&gt;&lt;i&gt;Data sheet mistake:&lt;/i&gt; &lt;/b&gt;define Packge type pin description for MLF48 but Order Number for QFN32 !?</description>
+<gates>
+<gate name="G$1" symbol="AT89C5131" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="PLCC52">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="26"/>
+<connect gate="G$1" pin="!PSEN" pad="28"/>
+<connect gate="G$1" pin="!RST" pad="43"/>
+<connect gate="G$1" pin="ALE" pad="27"/>
+<connect gate="G$1" pin="AVDD" pad="17"/>
+<connect gate="G$1" pin="AVSS" pad="19"/>
+<connect gate="G$1" pin="D+" pad="23"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="FREV" pad="24"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="52"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="45"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="44"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="42"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="47"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="48"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="49"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="50"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="51"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="4"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="5"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="6"/>
+<connect gate="G$1" pin="P2.0_A8" pad="1"/>
+<connect gate="G$1" pin="P2.1_A9" pad="2"/>
+<connect gate="G$1" pin="P2.2_A10" pad="3"/>
+<connect gate="G$1" pin="P2.3_A11" pad="9"/>
+<connect gate="G$1" pin="P2.4_A12" pad="10"/>
+<connect gate="G$1" pin="P2.5_A13" pad="11"/>
+<connect gate="G$1" pin="P2.6_A14" pad="14"/>
+<connect gate="G$1" pin="P2.7_A15" pad="15"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="20"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="29"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="30"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="31"/>
+<connect gate="G$1" pin="P3.4/T0" pad="32"/>
+<connect gate="G$1" pin="P3.5/T1" pad="33"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="7"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="8"/>
+<connect gate="G$1" pin="PLLF" pad="21"/>
+<connect gate="G$1" pin="VDD" pad="16"/>
+<connect gate="G$1" pin="VSS" pad="41"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT89C5131A-S3SUM" constant="no"/>
+<attribute name="OC_FARNELL" value="1095721" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6570" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="R" package="VQFP64">
+<connects>
+<connect gate="G$1" pin="!EA!/VPP" pad="24"/>
+<connect gate="G$1" pin="!PSEN" pad="26"/>
+<connect gate="G$1" pin="!RST" pad="44"/>
+<connect gate="G$1" pin="ALE" pad="25"/>
+<connect gate="G$1" pin="AVDD" pad="10"/>
+<connect gate="G$1" pin="AVSS" pad="12"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="20"/>
+<connect gate="G$1" pin="FREV" pad="22"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="55"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="46"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="45"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="43"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="40"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="38"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="37"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="36"/>
+<connect gate="G$1" pin="P1.0/T2/KIN0" pad="50"/>
+<connect gate="G$1" pin="P1.1/T2EX/KIN1/SS" pad="51"/>
+<connect gate="G$1" pin="P1.2/ECI/KIN2" pad="52"/>
+<connect gate="G$1" pin="P1.3/CEX0/KIN3" pad="53"/>
+<connect gate="G$1" pin="P1.4/CEX1/KIN4" pad="54"/>
+<connect gate="G$1" pin="P1.5/CEX2/KIN5/MISO" pad="59"/>
+<connect gate="G$1" pin="P1.6/CEX3/KIN6/SCK" pad="60"/>
+<connect gate="G$1" pin="P1.7/CEX4/KIN7/MOSI" pad="61"/>
+<connect gate="G$1" pin="P2.0_A8" pad="56"/>
+<connect gate="G$1" pin="P2.1_A9" pad="57"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="2"/>
+<connect gate="G$1" pin="P2.4_A12" pad="3"/>
+<connect gate="G$1" pin="P2.5_A13" pad="4"/>
+<connect gate="G$1" pin="P2.6_A14" pad="7"/>
+<connect gate="G$1" pin="P2.7_A15" pad="8"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="14"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="27"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="28"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="29"/>
+<connect gate="G$1" pin="P3.4/T0" pad="30"/>
+<connect gate="G$1" pin="P3.5/T1" pad="31"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="35"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="39"/>
+<connect gate="G$1" pin="P4.0/SCL" pad="62"/>
+<connect gate="G$1" pin="P4.1/SDA" pad="63"/>
+<connect gate="G$1" pin="PLLF" pad="19"/>
+<connect gate="G$1" pin="VDD" pad="9"/>
+<connect gate="G$1" pin="VSS" pad="42"/>
+<connect gate="G$1" pin="XTAL1" pad="6"/>
+<connect gate="G$1" pin="XTAL2" pad="5"/>
+</connects>
+<technologies>
+<technology name="0">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT89C5132" prefix="IC">
+<description>&lt;b&gt;USB Microcontroller with 64K Bytes Flash Memory&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4173.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT89C5132" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP80">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="2"/>
+<connect gate="G$1" pin="!TST" pad="18"/>
+<connect gate="G$1" pin="AIN0" pad="37"/>
+<connect gate="G$1" pin="AIN1" pad="38"/>
+<connect gate="G$1" pin="ALE" pad="1"/>
+<connect gate="G$1" pin="AREFN" pad="36"/>
+<connect gate="G$1" pin="AREFP" pad="35"/>
+<connect gate="G$1" pin="AVDD" pad="33"/>
+<connect gate="G$1" pin="AVSS" pad="34"/>
+<connect gate="G$1" pin="D+" pad="21"/>
+<connect gate="G$1" pin="D-" pad="22"/>
+<connect gate="G$1" pin="DCLK" pad="44"/>
+<connect gate="G$1" pin="DOUT" pad="43"/>
+<connect gate="G$1" pin="DSEL" pad="45"/>
+<connect gate="G$1" pin="FILT" pad="13"/>
+<connect gate="G$1" pin="MCLK" pad="50"/>
+<connect gate="G$1" pin="MCMD" pad="48"/>
+<connect gate="G$1" pin="MDAT" pad="49"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="78"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="77"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="76"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="75"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="74"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="73"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="70"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="69"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="3"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="4"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="5"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="6"/>
+<connect gate="G$1" pin="P1.4" pad="7"/>
+<connect gate="G$1" pin="P1.5" pad="8"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="9"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="10"/>
+<connect gate="G$1" pin="P2.0_A8" pad="64"/>
+<connect gate="G$1" pin="P2.1_A9" pad="63"/>
+<connect gate="G$1" pin="P2.2_A10" pad="58"/>
+<connect gate="G$1" pin="P2.3_A11" pad="57"/>
+<connect gate="G$1" pin="P2.4_A12" pad="56"/>
+<connect gate="G$1" pin="P2.5_A13" pad="55"/>
+<connect gate="G$1" pin="P2.6_A14" pad="54"/>
+<connect gate="G$1" pin="P2.7_A15" pad="53"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="25"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="26"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="27"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="28"/>
+<connect gate="G$1" pin="P3.4/T0" pad="29"/>
+<connect gate="G$1" pin="P3.5/T1" pad="30"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="31"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="32"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="65"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="66"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="67"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="68"/>
+<connect gate="G$1" pin="P4.4" pad="59"/>
+<connect gate="G$1" pin="P4.5" pad="60"/>
+<connect gate="G$1" pin="P4.6" pad="61"/>
+<connect gate="G$1" pin="P4.7" pad="62"/>
+<connect gate="G$1" pin="P5.0" pad="79"/>
+<connect gate="G$1" pin="P5.1" pad="80"/>
+<connect gate="G$1" pin="P5.2" pad="39"/>
+<connect gate="G$1" pin="P5.3" pad="40"/>
+<connect gate="G$1" pin="PVDD" pad="12"/>
+<connect gate="G$1" pin="PVSS" pad="14"/>
+<connect gate="G$1" pin="RST" pad="47"/>
+<connect gate="G$1" pin="SCLK" pad="46"/>
+<connect gate="G$1" pin="UVDD" pad="19"/>
+<connect gate="G$1" pin="UVSS" pad="20"/>
+<connect gate="G$1" pin="VDD" pad="11"/>
+<connect gate="G$1" pin="VDD@1" pad="23"/>
+<connect gate="G$1" pin="VDD@2" pad="41"/>
+<connect gate="G$1" pin="VDD@3" pad="51"/>
+<connect gate="G$1" pin="VDD@4" pad="71"/>
+<connect gate="G$1" pin="VSS" pad="15"/>
+<connect gate="G$1" pin="VSS@1" pad="24"/>
+<connect gate="G$1" pin="VSS@2" pad="42"/>
+<connect gate="G$1" pin="VSS@3" pad="52"/>
+<connect gate="G$1" pin="VSS@4" pad="72"/>
+<connect gate="G$1" pin="X1" pad="17"/>
+<connect gate="G$1" pin="X2" pad="16"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="DEVELOP" package="PLCC84">
+<connects>
+<connect gate="G$1" pin="!ISP" pad="13"/>
+<connect gate="G$1" pin="!TST" pad="30"/>
+<connect gate="G$1" pin="AIN0" pad="49"/>
+<connect gate="G$1" pin="AIN1" pad="50"/>
+<connect gate="G$1" pin="ALE" pad="12"/>
+<connect gate="G$1" pin="AREFN" pad="48"/>
+<connect gate="G$1" pin="AREFP" pad="47"/>
+<connect gate="G$1" pin="AVDD" pad="45"/>
+<connect gate="G$1" pin="AVSS" pad="46"/>
+<connect gate="G$1" pin="D+" pad="33"/>
+<connect gate="G$1" pin="D-" pad="34"/>
+<connect gate="G$1" pin="DCLK" pad="57"/>
+<connect gate="G$1" pin="DOUT" pad="56"/>
+<connect gate="G$1" pin="DSEL" pad="58"/>
+<connect gate="G$1" pin="FILT" pad="24"/>
+<connect gate="G$1" pin="MCLK" pad="63"/>
+<connect gate="G$1" pin="MCMD" pad="61"/>
+<connect gate="G$1" pin="MDAT" pad="62"/>
+<connect gate="G$1" pin="P0.0_AD0" pad="8"/>
+<connect gate="G$1" pin="P0.1_AD1" pad="7"/>
+<connect gate="G$1" pin="P0.2_AD2" pad="6"/>
+<connect gate="G$1" pin="P0.3_AD3" pad="5"/>
+<connect gate="G$1" pin="P0.4_AD4" pad="4"/>
+<connect gate="G$1" pin="P0.5_AD5" pad="3"/>
+<connect gate="G$1" pin="P0.6_AD6" pad="84"/>
+<connect gate="G$1" pin="P0.7_AD7" pad="83"/>
+<connect gate="G$1" pin="P1.0/KIN0" pad="14"/>
+<connect gate="G$1" pin="P1.1/KIN1" pad="15"/>
+<connect gate="G$1" pin="P1.2/KIN2" pad="16"/>
+<connect gate="G$1" pin="P1.3/KIN3" pad="17"/>
+<connect gate="G$1" pin="P1.4" pad="18"/>
+<connect gate="G$1" pin="P1.5" pad="19"/>
+<connect gate="G$1" pin="P1.6/SCL" pad="20"/>
+<connect gate="G$1" pin="P1.7/SDA" pad="21"/>
+<connect gate="G$1" pin="P2.0_A8" pad="78"/>
+<connect gate="G$1" pin="P2.1_A9" pad="77"/>
+<connect gate="G$1" pin="P2.2_A10" pad="71"/>
+<connect gate="G$1" pin="P2.3_A11" pad="70"/>
+<connect gate="G$1" pin="P2.4_A12" pad="69"/>
+<connect gate="G$1" pin="P2.5_A13" pad="68"/>
+<connect gate="G$1" pin="P2.6_A14" pad="67"/>
+<connect gate="G$1" pin="P2.7_A15" pad="66"/>
+<connect gate="G$1" pin="P3.0/RXD" pad="37"/>
+<connect gate="G$1" pin="P3.1/TXD" pad="38"/>
+<connect gate="G$1" pin="P3.2/!INT0" pad="39"/>
+<connect gate="G$1" pin="P3.3/!INT1" pad="40"/>
+<connect gate="G$1" pin="P3.4/T0" pad="41"/>
+<connect gate="G$1" pin="P3.5/T1" pad="42"/>
+<connect gate="G$1" pin="P3.6/!WR" pad="43"/>
+<connect gate="G$1" pin="P3.7/!RD" pad="44"/>
+<connect gate="G$1" pin="P4.0/MISO" pad="79"/>
+<connect gate="G$1" pin="P4.1/MOSI" pad="80"/>
+<connect gate="G$1" pin="P4.2/SCK" pad="81"/>
+<connect gate="G$1" pin="P4.3/!SS" pad="82"/>
+<connect gate="G$1" pin="P4.4" pad="72"/>
+<connect gate="G$1" pin="P4.5" pad="73"/>
+<connect gate="G$1" pin="P4.6" pad="75"/>
+<connect gate="G$1" pin="P4.7" pad="76"/>
+<connect gate="G$1" pin="P5.0" pad="9"/>
+<connect gate="G$1" pin="P5.1" pad="10"/>
+<connect gate="G$1" pin="P5.2" pad="51"/>
+<connect gate="G$1" pin="P5.3" pad="52"/>
+<connect gate="G$1" pin="PVDD" pad="23"/>
+<connect gate="G$1" pin="PVSS" pad="25"/>
+<connect gate="G$1" pin="RST" pad="60"/>
+<connect gate="G$1" pin="SCLK" pad="59"/>
+<connect gate="G$1" pin="UVDD" pad="31"/>
+<connect gate="G$1" pin="UVSS" pad="32"/>
+<connect gate="G$1" pin="VDD" pad="1"/>
+<connect gate="G$1" pin="VDD@1" pad="22"/>
+<connect gate="G$1" pin="VDD@2" pad="35"/>
+<connect gate="G$1" pin="VDD@3" pad="54"/>
+<connect gate="G$1" pin="VDD@4" pad="64"/>
+<connect gate="G$1" pin="VSS" pad="2"/>
+<connect gate="G$1" pin="VSS@1" pad="26"/>
+<connect gate="G$1" pin="VSS@2" pad="36"/>
+<connect gate="G$1" pin="VSS@3" pad="55"/>
+<connect gate="G$1" pin="VSS@4" pad="65"/>
+<connect gate="G$1" pin="X1" pad="29"/>
+<connect gate="G$1" pin="X2" pad="27"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8-MI" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH, 1 kbytes SRAM, 512 bytes EEPROM, USART, 6-channel 10 bit ADC, 2-channel 8 bit ADC&lt;br&gt;
+Pin compatible with Atmega48, ATMega88, ATMega168&lt;br&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="23-I/O_MI" x="0" y="2.54"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="ADC6" pad="19"/>
+<connect gate="G$1" pin="ADC7" pad="22"/>
+<connect gate="G$1" pin="AREF" pad="20"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="GND@1" pad="3"/>
+<connect gate="G$1" pin="GND@2" pad="5"/>
+<connect gate="G$1" pin="PB0(ICP)" pad="12"/>
+<connect gate="G$1" pin="PB1(OC1A)" pad="13"/>
+<connect gate="G$1" pin="PB2(SS/OC1B)" pad="14"/>
+<connect gate="G$1" pin="PB3(MOSI/OC2)" pad="15"/>
+<connect gate="G$1" pin="PB4(MISO)" pad="16"/>
+<connect gate="G$1" pin="PB5(SCK)" pad="17"/>
+<connect gate="G$1" pin="PB6(XTAL1/TOSC1)" pad="7"/>
+<connect gate="G$1" pin="PB7(XTAL2/TOSC2)" pad="8"/>
+<connect gate="G$1" pin="PC0(ADC0)" pad="23"/>
+<connect gate="G$1" pin="PC1(ADC1)" pad="24"/>
+<connect gate="G$1" pin="PC2(ADC2)" pad="25"/>
+<connect gate="G$1" pin="PC3(ADC3)" pad="26"/>
+<connect gate="G$1" pin="PC4(ADC4/SDA)" pad="27"/>
+<connect gate="G$1" pin="PC5(ADC5/SCL)" pad="28"/>
+<connect gate="G$1" pin="PC6(/RESET)" pad="29"/>
+<connect gate="G$1" pin="PD0(RXD)" pad="30"/>
+<connect gate="G$1" pin="PD1(TXD)" pad="31"/>
+<connect gate="G$1" pin="PD2(INT0)" pad="32"/>
+<connect gate="G$1" pin="PD3(INT1)" pad="1"/>
+<connect gate="G$1" pin="PD4(XCK/T0)" pad="2"/>
+<connect gate="G$1" pin="PD5(T1)" pad="9"/>
+<connect gate="G$1" pin="PD6(AIN0)" pad="10"/>
+<connect gate="G$1" pin="PD7(AIN1)" pad="11"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC@1" pad="4"/>
+<connect gate="G$1" pin="VCC@2" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA88PA-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715491" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0272" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA16-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M16-A_M" x="-2.54" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA16-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455097" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3723" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA32-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+32 Kbytes FLASH&lt;br&gt;
+2 Kbytes SRAM&lt;br&gt;
+1 Kbytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+Source: www.atmel.com .. doc2503.pdf</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M32-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA32-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455108" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3733" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA64-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+64 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+2 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA64-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA64-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455120" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3742" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA128-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+128 Kbytes FLASH&lt;br&gt;
+4 Kbytes SRAM&lt;br&gt;
+4 Kbytes EEPROM&lt;br&gt;
+DUAL USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA128-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="37"/>
+<connect gate="G$1" pin="(A11)PC3" pad="38"/>
+<connect gate="G$1" pin="(A12)PC4" pad="39"/>
+<connect gate="G$1" pin="(A13)PC5" pad="40"/>
+<connect gate="G$1" pin="(A14)PC6" pad="41"/>
+<connect gate="G$1" pin="(A15)PC7" pad="42"/>
+<connect gate="G$1" pin="(A8)PC0" pad="35"/>
+<connect gate="G$1" pin="(A9)PC1" pad="36"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="51"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="50"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="49"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="48"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="47"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="46"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="45"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="44"/>
+<connect gate="G$1" pin="(IC1)PD4" pad="29"/>
+<connect gate="G$1" pin="(IC3/INT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2/OC1C)PB7" pad="17"/>
+<connect gate="G$1" pin="(OC3A/AIN1)PE3" pad="5"/>
+<connect gate="G$1" pin="(OC3B/INT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(OC3C/INT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(RXD/PDI)PE0" pad="2"/>
+<connect gate="G$1" pin="(RXD1/INT2)PD2" pad="27"/>
+<connect gate="G$1" pin="(SCK)PB1" pad="11"/>
+<connect gate="G$1" pin="(SCL/INT0)PD0" pad="25"/>
+<connect gate="G$1" pin="(SDA/INT1)PD1" pad="26"/>
+<connect gate="G$1" pin="(SS)PB0" pad="10"/>
+<connect gate="G$1" pin="(T1)PD6" pad="31"/>
+<connect gate="G$1" pin="(T2)PD7" pad="32"/>
+<connect gate="G$1" pin="(T3/INT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(TXD/PDO)PE1" pad="3"/>
+<connect gate="G$1" pin="(TXD1/INT3)PD3" pad="28"/>
+<connect gate="G$1" pin="(XCK0/AIN0)PE2" pad="4"/>
+<connect gate="G$1" pin="(XCK1)PD5" pad="30"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="PEN" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(WR)" pad="33"/>
+<connect gate="G$1" pin="PG1(RD)" pad="34"/>
+<connect gate="G$1" pin="PG2(ALE)" pad="43"/>
+<connect gate="G$1" pin="PG3(TOSC2)" pad="18"/>
+<connect gate="G$1" pin="PG4(TOSC1)" pad="19"/>
+<connect gate="G$1" pin="RESET" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1" pad="24"/>
+<connect gate="G$1" pin="XTAL2" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA128-16MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455093" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3717" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA169-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+16 Kbytes FLASH&lt;br&gt;
+1 Kbytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;br&gt;
+4x25 Segment LCD Driver&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="MEGA169-M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF64-TH">
+<connects>
+<connect gate="G$1" pin="(AIN1/PCINT3)PE3" pad="5"/>
+<connect gate="G$1" pin="(CLKO/PCINT7)PE7" pad="9"/>
+<connect gate="G$1" pin="(COM0)PA0" pad="51"/>
+<connect gate="G$1" pin="(COM1)PA1" pad="50"/>
+<connect gate="G$1" pin="(COM2)PA2" pad="49"/>
+<connect gate="G$1" pin="(COM3)PA3" pad="48"/>
+<connect gate="G$1" pin="(DI/SDA/PCINT5)PE5" pad="7"/>
+<connect gate="G$1" pin="(DO/PCINT6)PE6" pad="8"/>
+<connect gate="G$1" pin="(MISO/PCINT11)PB3" pad="13"/>
+<connect gate="G$1" pin="(MOSI/PCINT10)PB2" pad="12"/>
+<connect gate="G$1" pin="(OC0A/PCINT12)PB4" pad="14"/>
+<connect gate="G$1" pin="(OC1A/PCINT13)PB5" pad="15"/>
+<connect gate="G$1" pin="(OC1B/PCINT14)PB6" pad="16"/>
+<connect gate="G$1" pin="(OC2A/PCINT15)PB7" pad="17"/>
+<connect gate="G$1" pin="(RXD/PCINT0)PE0" pad="2"/>
+<connect gate="G$1" pin="(SCK/PCINT9)PB1" pad="11"/>
+<connect gate="G$1" pin="(SEG0)PA4" pad="47"/>
+<connect gate="G$1" pin="(SEG1)PA5" pad="46"/>
+<connect gate="G$1" pin="(SEG10)PC2" pad="37"/>
+<connect gate="G$1" pin="(SEG11)PC1" pad="36"/>
+<connect gate="G$1" pin="(SEG12)PC0" pad="35"/>
+<connect gate="G$1" pin="(SEG15)PD7" pad="32"/>
+<connect gate="G$1" pin="(SEG16)PD6" pad="31"/>
+<connect gate="G$1" pin="(SEG17)PD5" pad="30"/>
+<connect gate="G$1" pin="(SEG18)PD4" pad="29"/>
+<connect gate="G$1" pin="(SEG19)PD3" pad="28"/>
+<connect gate="G$1" pin="(SEG2)PA6" pad="45"/>
+<connect gate="G$1" pin="(SEG20)PD2" pad="27"/>
+<connect gate="G$1" pin="(SEG21/INT0)PD1" pad="26"/>
+<connect gate="G$1" pin="(SEG22/ICP)PD0" pad="25"/>
+<connect gate="G$1" pin="(SEG3)PA7" pad="44"/>
+<connect gate="G$1" pin="(SEG5)PC7" pad="42"/>
+<connect gate="G$1" pin="(SEG6)PC6" pad="41"/>
+<connect gate="G$1" pin="(SEG7)PC5" pad="40"/>
+<connect gate="G$1" pin="(SEG8)PC4" pad="39"/>
+<connect gate="G$1" pin="(SEG9)PC3" pad="38"/>
+<connect gate="G$1" pin="(SS/PCINT8)PB0" pad="10"/>
+<connect gate="G$1" pin="(TXD/PCINT1)PE1" pad="3"/>
+<connect gate="G$1" pin="(USCK/SCL/PCINT4)PE4" pad="6"/>
+<connect gate="G$1" pin="(XCK0/AIN0/PCINT2)PE2" pad="4"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="63"/>
+<connect gate="G$1" pin="GND@2" pad="53"/>
+<connect gate="G$1" pin="LCDCAP" pad="1"/>
+<connect gate="G$1" pin="PF0(ADC0)" pad="61"/>
+<connect gate="G$1" pin="PF1(ADC1)" pad="60"/>
+<connect gate="G$1" pin="PF2(ADC2)" pad="59"/>
+<connect gate="G$1" pin="PF3(ADC3)" pad="58"/>
+<connect gate="G$1" pin="PF4(ADC4/TCK)" pad="57"/>
+<connect gate="G$1" pin="PF5(ADC5/TMS)" pad="56"/>
+<connect gate="G$1" pin="PF6(ADC6/TDO)" pad="55"/>
+<connect gate="G$1" pin="PF7(ADC7/TDI)" pad="54"/>
+<connect gate="G$1" pin="PG0(SEG14)" pad="33"/>
+<connect gate="G$1" pin="PG1(SEG13)" pad="34"/>
+<connect gate="G$1" pin="PG2(SEG4)" pad="43"/>
+<connect gate="G$1" pin="PG3(T1/SEG24)" pad="18"/>
+<connect gate="G$1" pin="PG4(T0/SEG23)" pad="19"/>
+<connect gate="G$1" pin="PG5(RESET)" pad="20"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XTAL1(TOSC1)" pad="24"/>
+<connect gate="G$1" pin="XTAL2(TOSC2)" pad="23"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8515-M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8515-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(A10)PC2" pad="20"/>
+<connect gate="G$1" pin="(A11)PC3" pad="21"/>
+<connect gate="G$1" pin="(A12)PC4" pad="22"/>
+<connect gate="G$1" pin="(A13)PC5" pad="23"/>
+<connect gate="G$1" pin="(A14)PC6" pad="24"/>
+<connect gate="G$1" pin="(A15)PC7" pad="25"/>
+<connect gate="G$1" pin="(A8)PC0" pad="18"/>
+<connect gate="G$1" pin="(A9)PC1" pad="19"/>
+<connect gate="G$1" pin="(AD0)PA0" pad="37"/>
+<connect gate="G$1" pin="(AD1)PA1" pad="36"/>
+<connect gate="G$1" pin="(AD2)PA2" pad="35"/>
+<connect gate="G$1" pin="(AD3)PA3" pad="34"/>
+<connect gate="G$1" pin="(AD4)PA4" pad="33"/>
+<connect gate="G$1" pin="(AD5)PA5" pad="32"/>
+<connect gate="G$1" pin="(AD6)PA6" pad="31"/>
+<connect gate="G$1" pin="(AD7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="8"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="9"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="11"/>
+<connect gate="G$1" pin="(RD)PD7" pad="13"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="5"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/OC0)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="7"/>
+<connect gate="G$1" pin="(WR)PD6" pad="12"/>
+<connect gate="G$1" pin="(XCK)PD4" pad="10"/>
+<connect gate="G$1" pin="GND" pad="16"/>
+<connect gate="G$1" pin="NC1" pad="6"/>
+<connect gate="G$1" pin="NC2" pad="17"/>
+<connect gate="G$1" pin="NC3" pad="28"/>
+<connect gate="G$1" pin="NC4" pad="39"/>
+<connect gate="G$1" pin="PE0(ICP/INT2)" pad="29"/>
+<connect gate="G$1" pin="PE1(ALE)" pad="27"/>
+<connect gate="G$1" pin="PE2(OC1B)" pad="26"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="15"/>
+<connect gate="G$1" pin="XTAL2" pad="14"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="MEGA8535_M" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;&lt;p&gt;
+8 Kbytes FLASH&lt;br&gt;
+512 bytes SRAM&lt;br&gt;
+512 bytes EEPROM&lt;br&gt;
+USART&lt;br&gt;
+8-channel 10 bit ADC&lt;p&gt;
+Source: avr.lbr</description>
+<gates>
+<gate name="G$1" symbol="32-I/O-M8535-A_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(AIN0/INT2)PB2" pad="42"/>
+<connect gate="G$1" pin="(AIN1/OC0)PB3" pad="43"/>
+<connect gate="G$1" pin="(ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(OC2)PD7" pad="16"/>
+<connect gate="G$1" pin="(RXD)PD0" pad="9"/>
+<connect gate="G$1" pin="(SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(SS)PB4" pad="44"/>
+<connect gate="G$1" pin="(T0/XCK)PB0" pad="40"/>
+<connect gate="G$1" pin="(T1)PB1" pad="41"/>
+<connect gate="G$1" pin="(TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(TXD)PD1" pad="10"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="39"/>
+<connect gate="G$1" pin="GND@1" pad="28"/>
+<connect gate="G$1" pin="PC0(SCL)" pad="19"/>
+<connect gate="G$1" pin="PC1(SDA)" pad="20"/>
+<connect gate="G$1" pin="PC2" pad="21"/>
+<connect gate="G$1" pin="PC3" pad="22"/>
+<connect gate="G$1" pin="PC4" pad="23"/>
+<connect gate="G$1" pin="PC5" pad="24"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC1" pad="17"/>
+<connect gate="G$1" pin="VCC2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY26*-M" prefix="IC">
+<description>&lt;b&gt;8-bit AVR Microcontroller with 2K Bytes Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc1477.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY26_M" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF32-TH">
+<connects>
+<connect gate="G$1" pin="(ADC0)PA0" pad="26"/>
+<connect gate="G$1" pin="(ADC1)PA1" pad="25"/>
+<connect gate="G$1" pin="(ADC10/!RESET!)PB7" pad="11"/>
+<connect gate="G$1" pin="(ADC2)PA2" pad="23"/>
+<connect gate="G$1" pin="(ADC3)PA4" pad="17"/>
+<connect gate="G$1" pin="(ADC4)PA5" pad="15"/>
+<connect gate="G$1" pin="(ADC5/AIN0)PA6" pad="14"/>
+<connect gate="G$1" pin="(ADC6/AIN1)PA7" pad="13"/>
+<connect gate="G$1" pin="(ADC7/XTAL1)PB4" pad="7"/>
+<connect gate="G$1" pin="(ADC8/XTAL2)PB5" pad="8"/>
+<connect gate="G$1" pin="(ADC9/INT0/T0)PB6" pad="10"/>
+<connect gate="G$1" pin="(AREF)PA3" pad="22"/>
+<connect gate="G$1" pin="(MISO/DO/OC1A)PB1" pad="31"/>
+<connect gate="G$1" pin="(MOSI/DI/SDA/!OC1A!)PB0" pad="30"/>
+<connect gate="G$1" pin="(OC1B)PB3" pad="2"/>
+<connect gate="G$1" pin="(SCK/SCL/!OC1B!)PB2" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="18"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="GND@1" pad="21"/>
+<connect gate="G$1" pin="THERMAL" pad="TH"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455123" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3748" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M" package="QFN44ML8X8">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644PV-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748529" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5637" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644*" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller&lt;/b&gt; with 64K Bytes In-System Programmable Flash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644E" x="0" y="0"/>
+</gates>
+<devices>
+<device name="M" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="(PCINT0/ADC0)PA0" pad="37"/>
+<connect gate="G$1" pin="(PCINT1/ADC1)PA1" pad="36"/>
+<connect gate="G$1" pin="(PCINT10/INT2/AIN0)PB2" pad="42"/>
+<connect gate="G$1" pin="(PCINT11/OC0A/AIN1)PB3" pad="43"/>
+<connect gate="G$1" pin="(PCINT12/OC0B/!SS!)PB4" pad="44"/>
+<connect gate="G$1" pin="(PCINT13/MOSI)PB5" pad="1"/>
+<connect gate="G$1" pin="(PCINT14/MISO)PB6" pad="2"/>
+<connect gate="G$1" pin="(PCINT15/SCK)PB7" pad="3"/>
+<connect gate="G$1" pin="(PCINT16/SCL)PC0" pad="19"/>
+<connect gate="G$1" pin="(PCINT17/SDA)PC1" pad="20"/>
+<connect gate="G$1" pin="(PCINT18/TCK)PC2" pad="21"/>
+<connect gate="G$1" pin="(PCINT19/TMS)PC3" pad="22"/>
+<connect gate="G$1" pin="(PCINT2/ADC2)PA2" pad="35"/>
+<connect gate="G$1" pin="(PCINT20/TDO)PC4" pad="23"/>
+<connect gate="G$1" pin="(PCINT21/TDI)PC5" pad="24"/>
+<connect gate="G$1" pin="(PCINT22/TOSC1)PC6" pad="25"/>
+<connect gate="G$1" pin="(PCINT23/TOSC2)PC7" pad="26"/>
+<connect gate="G$1" pin="(PCINT24/RXD0)PD0" pad="9"/>
+<connect gate="G$1" pin="(PCINT25/TXD0)PD1" pad="10"/>
+<connect gate="G$1" pin="(PCINT26/INT0)PD2" pad="11"/>
+<connect gate="G$1" pin="(PCINT27/INT1)PD3" pad="12"/>
+<connect gate="G$1" pin="(PCINT28/OC1B)PD4" pad="13"/>
+<connect gate="G$1" pin="(PCINT29/OC1A)PD5" pad="14"/>
+<connect gate="G$1" pin="(PCINT3/ADC3)PA3" pad="34"/>
+<connect gate="G$1" pin="(PCINT30/OC2B/ICP)PD6" pad="15"/>
+<connect gate="G$1" pin="(PCINT31/OC2A)PD7" pad="16"/>
+<connect gate="G$1" pin="(PCINT4/ADC4)PA4" pad="33"/>
+<connect gate="G$1" pin="(PCINT5/ADC5)PA5" pad="32"/>
+<connect gate="G$1" pin="(PCINT6/ADC6)PA6" pad="31"/>
+<connect gate="G$1" pin="(PCINT7/ADC7)PA7" pad="30"/>
+<connect gate="G$1" pin="(PCINT8/XCK0/T0)PB0" pad="40"/>
+<connect gate="G$1" pin="(PCINT9/CLKO/T1)PB1" pad="41"/>
+<connect gate="G$1" pin="AREF" pad="29"/>
+<connect gate="G$1" pin="AVCC" pad="27"/>
+<connect gate="G$1" pin="EXP" pad="TH"/>
+<connect gate="G$1" pin="GND" pad="6"/>
+<connect gate="G$1" pin="GND@1" pad="18"/>
+<connect gate="G$1" pin="GND@2" pad="28"/>
+<connect gate="G$1" pin="GND@3" pad="39"/>
+<connect gate="G$1" pin="RESET" pad="4"/>
+<connect gate="G$1" pin="VCC" pad="5"/>
+<connect gate="G$1" pin="VCC@1" pad="17"/>
+<connect gate="G$1" pin="VCC@2" pad="38"/>
+<connect gate="G$1" pin="XTAL1" pad="8"/>
+<connect gate="G$1" pin="XTAL2" pad="7"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644P-20MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1748528" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5636" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-AU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="LQFP100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="3"/>
+<connect gate="G$1" pin="AD5" pad="4"/>
+<connect gate="G$1" pin="AD6" pad="5"/>
+<connect gate="G$1" pin="AD7" pad="6"/>
+<connect gate="G$1" pin="ADVREF" pad="1"/>
+<connect gate="G$1" pin="DDM" pad="93"/>
+<connect gate="G$1" pin="DDP" pad="94"/>
+<connect gate="G$1" pin="ERASE" pad="92"/>
+<connect gate="G$1" pin="GND@1" pad="2"/>
+<connect gate="G$1" pin="GND@2" pad="16"/>
+<connect gate="G$1" pin="GND@3" pad="32"/>
+<connect gate="G$1" pin="GND@4" pad="52"/>
+<connect gate="G$1" pin="GND@5" pad="68"/>
+<connect gate="G$1" pin="GND@6" pad="83"/>
+<connect gate="G$1" pin="GND@7" pad="96"/>
+<connect gate="G$1" pin="JTAGSEL" pad="77"/>
+<connect gate="G$1" pin="NRST" pad="57"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="81"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="82"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="18"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="19"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="20"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="21"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="22"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="23"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="24"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="25"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="26"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="46"/>
+<connect gate="G$1" pin="PA2" pad="86"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="47"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="49"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="50"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="55"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="56"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="59"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="60"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="73"/>
+<connect gate="G$1" pin="PA28" pad="74"/>
+<connect gate="G$1" pin="PA29" pad="75"/>
+<connect gate="G$1" pin="PA3" pad="85"/>
+<connect gate="G$1" pin="PA30" pad="80"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="88"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="89"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="90"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="91"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="13"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="14"/>
+<connect gate="G$1" pin="PB0" pad="40"/>
+<connect gate="G$1" pin="PB1" pad="41"/>
+<connect gate="G$1" pin="PB10" pad="44"/>
+<connect gate="G$1" pin="PB11" pad="45"/>
+<connect gate="G$1" pin="PB12" pad="39"/>
+<connect gate="G$1" pin="PB13" pad="30"/>
+<connect gate="G$1" pin="PB14" pad="29"/>
+<connect gate="G$1" pin="PB15" pad="35"/>
+<connect gate="G$1" pin="PB16" pad="53"/>
+<connect gate="G$1" pin="PB17" pad="36"/>
+<connect gate="G$1" pin="PB18" pad="63"/>
+<connect gate="G$1" pin="PB19" pad="64"/>
+<connect gate="G$1" pin="PB2" pad="42"/>
+<connect gate="G$1" pin="PB20" pad="65"/>
+<connect gate="G$1" pin="PB21" pad="66"/>
+<connect gate="G$1" pin="PB22" pad="67"/>
+<connect gate="G$1" pin="PB23" pad="69"/>
+<connect gate="G$1" pin="PB24" pad="70"/>
+<connect gate="G$1" pin="PB25" pad="71"/>
+<connect gate="G$1" pin="PB26" pad="72"/>
+<connect gate="G$1" pin="PB27/AD0" pad="9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="10"/>
+<connect gate="G$1" pin="PB29/AD2" pad="11"/>
+<connect gate="G$1" pin="PB3" pad="43"/>
+<connect gate="G$1" pin="PB30/AD3" pad="12"/>
+<connect gate="G$1" pin="PB4" pad="54"/>
+<connect gate="G$1" pin="PB5" pad="34"/>
+<connect gate="G$1" pin="PB6" pad="31"/>
+<connect gate="G$1" pin="PB7" pad="38"/>
+<connect gate="G$1" pin="PB8" pad="28"/>
+<connect gate="G$1" pin="PB9" pad="27"/>
+<connect gate="G$1" pin="PLLRC" pad="99"/>
+<connect gate="G$1" pin="TCK" pad="79"/>
+<connect gate="G$1" pin="TDI" pad="51"/>
+<connect gate="G$1" pin="TDO" pad="76"/>
+<connect gate="G$1" pin="TMS" pad="78"/>
+<connect gate="G$1" pin="TST" pad="58"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="15"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="37"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="62"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="87"/>
+<connect gate="G$1" pin="VDDFLASH" pad="95"/>
+<connect gate="G$1" pin="VDDIN@1" pad="8"/>
+<connect gate="G$1" pin="VDDIO@1" pad="17"/>
+<connect gate="G$1" pin="VDDIO@2" pad="33"/>
+<connect gate="G$1" pin="VDDIO@3" pad="48"/>
+<connect gate="G$1" pin="VDDIO@4" pad="61"/>
+<connect gate="G$1" pin="VDDIO@5" pad="84"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="7"/>
+<connect gate="G$1" pin="VDDPLL" pad="100"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="97"/>
+<connect gate="G$1" pin="XOUT" pad="98"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X128B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288326" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5682" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X256B-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288327" constant="no"/>
+<attribute name="OC_NEWARK" value="26R5683" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT91SAM7X512-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288328" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5090" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT91SAM7X*-CU" prefix="IC">
+<description>&lt;b&gt;Highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor&lt;/b&gt;&lt;p&gt;
+512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/6120s.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT91SAM7X-BGA" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TFBGA100">
+<connects>
+<connect gate="G$1" pin="AD4" pad="K9"/>
+<connect gate="G$1" pin="AD5" pad="K8"/>
+<connect gate="G$1" pin="AD6" pad="K7"/>
+<connect gate="G$1" pin="AD7" pad="K6"/>
+<connect gate="G$1" pin="ADVREF" pad="K10"/>
+<connect gate="G$1" pin="DDM" pad="K4"/>
+<connect gate="G$1" pin="DDP" pad="K3"/>
+<connect gate="G$1" pin="ERASE" pad="F7"/>
+<connect gate="G$1" pin="GND@1" pad="E6"/>
+<connect gate="G$1" pin="GND@2" pad="E10"/>
+<connect gate="G$1" pin="GND@3" pad="F9"/>
+<connect gate="G$1" pin="GND@4" pad="G8"/>
+<connect gate="G$1" pin="GND@5" pad="J6"/>
+<connect gate="G$1" pin="GND@6" pad="J9"/>
+<connect gate="G$1" pin="GND@7" pad="K5"/>
+<connect gate="G$1" pin="JTAGSEL" pad="H3"/>
+<connect gate="G$1" pin="NRST" pad="D3"/>
+<connect gate="G$1" pin="PA0/PGMEN0" pad="J3"/>
+<connect gate="G$1" pin="PA1/PGMEN1" pad="J4"/>
+<connect gate="G$1" pin="PA10/PGMM2" pad="D7"/>
+<connect gate="G$1" pin="PA11/PGMM3" pad="D10"/>
+<connect gate="G$1" pin="PA12/PGMD0" pad="C9"/>
+<connect gate="G$1" pin="PA13/PGMD1" pad="C8"/>
+<connect gate="G$1" pin="PA14/PGMD2" pad="B8"/>
+<connect gate="G$1" pin="PA15/PGMD3" pad="C10"/>
+<connect gate="G$1" pin="PA16/PGMD4" pad="B9"/>
+<connect gate="G$1" pin="PA17/PGMD5" pad="B10"/>
+<connect gate="G$1" pin="PA18/PGMD6" pad="A9"/>
+<connect gate="G$1" pin="PA19/PGMD7" pad="B2"/>
+<connect gate="G$1" pin="PA2" pad="G5"/>
+<connect gate="G$1" pin="PA20/PGMD8" pad="A3"/>
+<connect gate="G$1" pin="PA21/PGMD9" pad="A2"/>
+<connect gate="G$1" pin="PA22/PGMD10" pad="A1"/>
+<connect gate="G$1" pin="PA23/PGMD11" pad="D1"/>
+<connect gate="G$1" pin="PA24/PGMD12" pad="D2"/>
+<connect gate="G$1" pin="PA25/PGMD13" pad="E1"/>
+<connect gate="G$1" pin="PA26/PGMD14" pad="E2"/>
+<connect gate="G$1" pin="PA27/PGMD15" pad="G3"/>
+<connect gate="G$1" pin="PA28" pad="H2"/>
+<connect gate="G$1" pin="PA29" pad="J1"/>
+<connect gate="G$1" pin="PA3" pad="H4"/>
+<connect gate="G$1" pin="PA30" pad="J2"/>
+<connect gate="G$1" pin="PA4/PGMNCMD" pad="H5"/>
+<connect gate="G$1" pin="PA5/PGMRDY" pad="G6"/>
+<connect gate="G$1" pin="PA6/PGMNOE" pad="F6"/>
+<connect gate="G$1" pin="PA7/PGMNVALID" pad="H6"/>
+<connect gate="G$1" pin="PA8/PGMM0" pad="H8"/>
+<connect gate="G$1" pin="PA9/PGMM1" pad="H7"/>
+<connect gate="G$1" pin="PB0" pad="C5"/>
+<connect gate="G$1" pin="PB1" pad="A4"/>
+<connect gate="G$1" pin="PB10" pad="C3"/>
+<connect gate="G$1" pin="PB11" pad="B3"/>
+<connect gate="G$1" pin="PB12" pad="B5"/>
+<connect gate="G$1" pin="PB13" pad="C7"/>
+<connect gate="G$1" pin="PB14" pad="B7"/>
+<connect gate="G$1" pin="PB15" pad="B6"/>
+<connect gate="G$1" pin="PB16" pad="C1"/>
+<connect gate="G$1" pin="PB17" pad="C6"/>
+<connect gate="G$1" pin="PB18" pad="E3"/>
+<connect gate="G$1" pin="PB19" pad="D5"/>
+<connect gate="G$1" pin="PB2" pad="B4"/>
+<connect gate="G$1" pin="PB20" pad="E4"/>
+<connect gate="G$1" pin="PB21" pad="F1"/>
+<connect gate="G$1" pin="PB22" pad="G1"/>
+<connect gate="G$1" pin="PB23" pad="F2"/>
+<connect gate="G$1" pin="PB24" pad="G2"/>
+<connect gate="G$1" pin="PB25" pad="F3"/>
+<connect gate="G$1" pin="PB26" pad="F4"/>
+<connect gate="G$1" pin="PB27/AD0" pad="D9"/>
+<connect gate="G$1" pin="PB28/AD1" pad="E8"/>
+<connect gate="G$1" pin="PB29/AD2" pad="H9"/>
+<connect gate="G$1" pin="PB3" pad="C4"/>
+<connect gate="G$1" pin="PB30/AD3" pad="G9"/>
+<connect gate="G$1" pin="PB4" pad="C2"/>
+<connect gate="G$1" pin="PB5" pad="A6"/>
+<connect gate="G$1" pin="PB6" pad="D6"/>
+<connect gate="G$1" pin="PB7" pad="A5"/>
+<connect gate="G$1" pin="PB8" pad="A7"/>
+<connect gate="G$1" pin="PB9" pad="A8"/>
+<connect gate="G$1" pin="PLLRC" pad="H10"/>
+<connect gate="G$1" pin="TCK" pad="F5"/>
+<connect gate="G$1" pin="TDI" pad="B1"/>
+<connect gate="G$1" pin="TDO" pad="G4"/>
+<connect gate="G$1" pin="TMS" pad="E5"/>
+<connect gate="G$1" pin="TST" pad="D4"/>
+<connect gate="G$1" pin="VDDCORE@1" pad="F8"/>
+<connect gate="G$1" pin="VDDCORE@2" pad="G7"/>
+<connect gate="G$1" pin="VDDCORE@3" pad="H1"/>
+<connect gate="G$1" pin="VDDCORE@4" pad="K1"/>
+<connect gate="G$1" pin="VDDCORE@5" pad="K2"/>
+<connect gate="G$1" pin="VDDFLASH" pad="J5"/>
+<connect gate="G$1" pin="VDDIN@1" pad="F10"/>
+<connect gate="G$1" pin="VDDIO@1" pad="A10"/>
+<connect gate="G$1" pin="VDDIO@2" pad="D8"/>
+<connect gate="G$1" pin="VDDIO@3" pad="E7"/>
+<connect gate="G$1" pin="VDDIO@4" pad="E9"/>
+<connect gate="G$1" pin="VDDOUT@1" pad="G10"/>
+<connect gate="G$1" pin="VDDPLL" pad="J10"/>
+<connect gate="G$1" pin="XIN/PGMCK" pad="J7"/>
+<connect gate="G$1" pin="XOUT" pad="J8"/>
+</connects>
+<technologies>
+<technology name="128">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="256">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="512">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT93C46A-10?Q-2.7" prefix="IC">
+<description>&lt;b&gt;Three-wire Automotive Temperature Serial EEPROM&lt;/b&gt; 1K (64 x 16)&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc5089.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT93C46A" x="0" y="0"/>
+</gates>
+<devices>
+<device name="S" package="SOIC8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT93C46DN-SH-B" constant="no"/>
+<attribute name="OC_FARNELL" value="1455086" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3879" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="T" package="TSSOP8">
+<connects>
+<connect gate="G$1" pin="CS" pad="1"/>
+<connect gate="G$1" pin="DC" pad="7"/>
+<connect gate="G$1" pin="DI" pad="3"/>
+<connect gate="G$1" pin="DO" pad="4"/>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="NC" pad="6"/>
+<connect gate="G$1" pin="SK" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+</gates>
+<devices>
+<device name="PU" package="DIL08">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171550" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6521" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171576" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6523" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SSU" package="8S1">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455133" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3771" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SSU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455135" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3773" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="GND" pad="4"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="5"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="6"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="7"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="3"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13-20SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171568" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6522" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10SU" constant="no"/>
+<attribute name="OC_FARNELL" value="9171584" constant="no"/>
+<attribute name="OC_NEWARK" value="96K6524" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="TINY13*" prefix="IC">
+<description>&lt;b&gt; 8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/2535S.pdf</description>
+<gates>
+<gate name="G$1" symbol="TINY13" x="0" y="0"/>
+<gate name="P" symbol="GND" x="35.56" y="0" addlevel="request"/>
+</gates>
+<devices>
+<device name="MM0" package="10M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="5"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="6"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="7"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="9"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="4"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="P" pin="GND" pad="11"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MMU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715516" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0298" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="MU" package="20M1">
+<connects>
+<connect gate="G$1" pin="GND" pad="21"/>
+<connect gate="G$1" pin="PB0/PCINT0/AIN0/OC0A/MOSI" pad="11"/>
+<connect gate="G$1" pin="PB1/PCINT1/AIN1/OC0B/INT0/MISO" pad="12"/>
+<connect gate="G$1" pin="PB2/PCINT2/SCK/ADC1/T0" pad="14"/>
+<connect gate="G$1" pin="PB3/PCINT3/CLKI/ADC3" pad="2"/>
+<connect gate="G$1" pin="PB4/PCINT4/ADC2" pad="5"/>
+<connect gate="G$1" pin="PB5/PCINT5/!RESET!/ADC0/DW" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="15"/>
+<connect gate="P" pin="GND" pad="8"/>
+</connects>
+<technologies>
+<technology name="-20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13A-MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1715517" constant="no"/>
+<attribute name="OC_NEWARK" value="15R0299" constant="no"/>
+</technology>
+<technology name="V-10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATTINY13V-10MU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455134" constant="no"/>
+<attribute name="OC_NEWARK" value="58M3772" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="T7024" prefix="IC">
+<description>&lt;b&gt;Bluetooth/ISM 2.4-GHz Front-End IC&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc4533.pdf</description>
+<gates>
+<gate name="G$1" symbol="T7024" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="MLF20-5X5-TH">
+<connects>
+<connect gate="G$1" pin="EXP" pad="EXP"/>
+<connect gate="G$1" pin="GND@1" pad="6"/>
+<connect gate="G$1" pin="GND@2" pad="8"/>
+<connect gate="G$1" pin="GND@3" pad="10"/>
+<connect gate="G$1" pin="GND@4" pad="14"/>
+<connect gate="G$1" pin="GND@5" pad="18"/>
+<connect gate="G$1" pin="LNA_IN" pad="7"/>
+<connect gate="G$1" pin="LNA_OUT" pad="1"/>
+<connect gate="G$1" pin="PA_IN" pad="20"/>
+<connect gate="G$1" pin="PU" pad="3"/>
+<connect gate="G$1" pin="RAMP" pad="15"/>
+<connect gate="G$1" pin="RX_ON" pad="2"/>
+<connect gate="G$1" pin="R_SWITCH" pad="4"/>
+<connect gate="G$1" pin="SWITCH_OUT" pad="5"/>
+<connect gate="G$1" pin="V1_PA" pad="19"/>
+<connect gate="G$1" pin="V2_PA@1" pad="16"/>
+<connect gate="G$1" pin="V2_PA@2" pad="17"/>
+<connect gate="G$1" pin="V3_PA_OUT@1" pad="11"/>
+<connect gate="G$1" pin="V3_PA_OUT@2" pad="12"/>
+<connect gate="G$1" pin="V3_PA_OUT@3" pad="13"/>
+<connect gate="G$1" pin="VS_LNA" pad="9"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA16A4" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt; High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 16 KB - 128 KB of In-System Self-Programmable Flash&lt;br&gt;
+- 4 KB - 8 KB Boot Code Section with Independent Lock Bits&lt;br&gt;
+- 1 KB - 2 KB EEPROM&lt;br&gt;
+- 2 KB - 8 KB Internal SRAM
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Five 16-bit Timer/Counters
+&lt;ul&gt;Three Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Two Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extensions on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on one Timer/Counter&lt;/ul&gt;
+- Five USARTs
+&lt;ul&gt;IrDA Extension on one USART&lt;/ul&gt;
+- Two Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Two SPIs (Serial Peripheral Interfaces) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with Separate Oscillator&lt;br&gt;
+- One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter&lt;br&gt;
+- One Two-channel, 12-bit, 1 Msps Digital to Analog Converter&lt;br&gt;
+- Two Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;&lt;br&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;PDI (Program and Debug Interface) for programming, test and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 34 Programmable I/O Lines&lt;br&gt;
+- 44 - lead TQFP&lt;br&gt;
+- 44 - pad VQFN/QFN&lt;br&gt;
+- 49 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA16A4" x="0" y="0"/>
+</gates>
+<devices>
+<device name="A" package="TQFP44">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="M1" package="MLF44-TH">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="35"/>
+<connect gate="G$1" pin="AVCC" pad="39"/>
+<connect gate="G$1" pin="GND" pad="8"/>
+<connect gate="G$1" pin="GND1" pad="18"/>
+<connect gate="G$1" pin="GND2" pad="30"/>
+<connect gate="G$1" pin="GND3" pad="38"/>
+<connect gate="G$1" pin="PA0" pad="40"/>
+<connect gate="G$1" pin="PA1" pad="41"/>
+<connect gate="G$1" pin="PA2" pad="42"/>
+<connect gate="G$1" pin="PA3" pad="43"/>
+<connect gate="G$1" pin="PA4" pad="44"/>
+<connect gate="G$1" pin="PA5" pad="1"/>
+<connect gate="G$1" pin="PA6" pad="2"/>
+<connect gate="G$1" pin="PA7" pad="3"/>
+<connect gate="G$1" pin="PB0" pad="4"/>
+<connect gate="G$1" pin="PB1" pad="5"/>
+<connect gate="G$1" pin="PB2" pad="6"/>
+<connect gate="G$1" pin="PB3" pad="7"/>
+<connect gate="G$1" pin="PC0" pad="10"/>
+<connect gate="G$1" pin="PC1" pad="11"/>
+<connect gate="G$1" pin="PC2" pad="12"/>
+<connect gate="G$1" pin="PC3" pad="13"/>
+<connect gate="G$1" pin="PC4" pad="14"/>
+<connect gate="G$1" pin="PC5" pad="15"/>
+<connect gate="G$1" pin="PC6" pad="16"/>
+<connect gate="G$1" pin="PC7" pad="17"/>
+<connect gate="G$1" pin="PD0" pad="20"/>
+<connect gate="G$1" pin="PD1" pad="21"/>
+<connect gate="G$1" pin="PD2" pad="22"/>
+<connect gate="G$1" pin="PD3" pad="23"/>
+<connect gate="G$1" pin="PD4" pad="24"/>
+<connect gate="G$1" pin="PD5" pad="25"/>
+<connect gate="G$1" pin="PD6" pad="26"/>
+<connect gate="G$1" pin="PD7" pad="27"/>
+<connect gate="G$1" pin="PDI_DATA" pad="34"/>
+<connect gate="G$1" pin="PE0" pad="28"/>
+<connect gate="G$1" pin="PE1" pad="29"/>
+<connect gate="G$1" pin="PE2" pad="32"/>
+<connect gate="G$1" pin="PE3" pad="33"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="36"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="37"/>
+<connect gate="G$1" pin="VCC" pad="9"/>
+<connect gate="G$1" pin="VCC1" pad="19"/>
+<connect gate="G$1" pin="VCC2" pad="31"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="XMEGA128A1" prefix="IC">
+<description>&lt;b&gt;MICROCONTROLLER&lt;/b&gt;
+&lt;h2&gt;Features&lt;/h2&gt;
+&lt;ul&gt;&lt;li&gt;High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller&lt;/li&gt;
+&lt;li&gt; Non-Volatile Program and Data Memories&lt;/li&gt;
+- 64K - 384K Bytes of In-System Self-Programmable Flash&lt;br&gt;
+- 4K - 8K Bytes Boot Section with Independent Lock Bits&lt;br&gt;
+- 2 KB - 4 KB EEPROM&lt;br&gt;
+- 4 KB - 32 KB Internal SRAM
+&lt;ul&gt;External Bus Interface for up to 16M bytes SRAM&lt;/ul&gt;
+&lt;ul&gt;External Bus Interface for up to 128M bit SDRAM&lt;/ul&gt;
+&lt;li&gt; Peripheral Features&lt;/li&gt;
+- Four-channel DMA Controller with support for external requests&lt;br&gt;
+- Eight-channel Event System&lt;br&gt;
+- Eight 16-bit Timer/Counters
+&lt;ul&gt;Four Timer/Counters with 4 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;Four Timer/Counters with 2 Output Compare or Input Capture channels&lt;/ul&gt;
+&lt;ul&gt;High-Resolution Extension on all Timer/Counters&lt;/ul&gt;
+&lt;ul&gt;Advanced Waveform Extension on two Timer/Counters&lt;/ul&gt;
+- Eight USARTs
+&lt;ul&gt;IrDA modulation/demodulation for one USART&lt;/ul&gt;
+- Four Two-Wire Interfaces with dual address match (I2C and SMBus compatible)&lt;br&gt;
+- Four SPI (Serial Peripheral Interface) peripherals&lt;br&gt;
+- AES and DES Crypto Engine&lt;br&gt;
+- 16-bit Real Time Counter with separate Oscillator&lt;br&gt;
+- Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters&lt;br&gt;
+- Two Two-channel, 12-bit, 1 Msps Digital to Analog Converters&lt;br&gt;
+- Four Analog Comparators with Window compare function&lt;br&gt;
+- External Interrupts on all General Purpose I/O pins&lt;br&gt;
+- Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
+&lt;li&gt; Special Microcontroller Features&lt;/li&gt;
+- Power-on Reset and Programmable Brown-out Detection&lt;br&gt;
+- Internal and External Clock Options with PLL and Prescaler&lt;br&gt;
+- Programmable Multi-level Interrupt Controller&lt;br&gt;
+- Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby&lt;br&gt;
+- Advanced Programming, Test and Debugging Interfaces
+&lt;ul&gt;JTAG (IEEE 1149.1 Compliant) Interface for programming, test and debugging&lt;/ul&gt;
+&lt;ul&gt;PDI (Program and Debug Interface) for programming and debugging&lt;/ul&gt;
+&lt;li&gt; I/O and Packages&lt;/li&gt;
+- 78 Programmable I/O Lines&lt;br&gt;
+- 100 - lead TQFP&lt;br&gt;
+- 100 - ball CBGA&lt;br&gt;
+- 100 - ball VFBGA
+&lt;li&gt; Operating Voltage&lt;/li&gt;
+- 1.6 - 3.6V
+&lt;li&gt; Speed performance&lt;/li&gt;
+- 0 - 12 MHz @ 1.6 - 3.6V&lt;br&gt;
+- 0 - 32 MHz @ 2.7 - 3.6V&lt;br&gt;&lt;/ul&gt;
+&lt;p&gt;&lt;author&gt;Drawn by Dipl.-Ing. (FH) Robert Siegler&lt;/author&gt;&lt;/p&gt;
+Created: 27.05.09</description>
+<gates>
+<gate name="G$1" symbol="XMEGA128A1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="TQFP100">
+<connects>
+<connect gate="G$1" pin="!RESET!/PDI_CLK" pad="90"/>
+<connect gate="G$1" pin="AVCC" pad="4"/>
+<connect gate="G$1" pin="AVCC1" pad="94"/>
+<connect gate="G$1" pin="GND" pad="3"/>
+<connect gate="G$1" pin="GND1" pad="13"/>
+<connect gate="G$1" pin="GND2" pad="23"/>
+<connect gate="G$1" pin="GND3" pad="33"/>
+<connect gate="G$1" pin="GND4" pad="43"/>
+<connect gate="G$1" pin="GND5" pad="53"/>
+<connect gate="G$1" pin="GND6" pad="63"/>
+<connect gate="G$1" pin="GND7" pad="73"/>
+<connect gate="G$1" pin="GND8" pad="84"/>
+<connect gate="G$1" pin="GND9" pad="93"/>
+<connect gate="G$1" pin="PA0" pad="95"/>
+<connect gate="G$1" pin="PA1" pad="96"/>
+<connect gate="G$1" pin="PA2" pad="97"/>
+<connect gate="G$1" pin="PA3" pad="98"/>
+<connect gate="G$1" pin="PA4" pad="99"/>
+<connect gate="G$1" pin="PA5" pad="100"/>
+<connect gate="G$1" pin="PA6" pad="1"/>
+<connect gate="G$1" pin="PA7" pad="2"/>
+<connect gate="G$1" pin="PB0" pad="5"/>
+<connect gate="G$1" pin="PB1" pad="6"/>
+<connect gate="G$1" pin="PB2" pad="7"/>
+<connect gate="G$1" pin="PB3" pad="8"/>
+<connect gate="G$1" pin="PB4" pad="9"/>
+<connect gate="G$1" pin="PB5" pad="10"/>
+<connect gate="G$1" pin="PB6" pad="11"/>
+<connect gate="G$1" pin="PB7" pad="12"/>
+<connect gate="G$1" pin="PC0" pad="15"/>
+<connect gate="G$1" pin="PC1" pad="16"/>
+<connect gate="G$1" pin="PC2" pad="17"/>
+<connect gate="G$1" pin="PC3" pad="18"/>
+<connect gate="G$1" pin="PC4" pad="19"/>
+<connect gate="G$1" pin="PC5" pad="20"/>
+<connect gate="G$1" pin="PC6" pad="21"/>
+<connect gate="G$1" pin="PC7" pad="22"/>
+<connect gate="G$1" pin="PD0" pad="25"/>
+<connect gate="G$1" pin="PD1" pad="26"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PDI_DATA" pad="89"/>
+<connect gate="G$1" pin="PE0" pad="35"/>
+<connect gate="G$1" pin="PE1" pad="36"/>
+<connect gate="G$1" pin="PE2" pad="37"/>
+<connect gate="G$1" pin="PE3" pad="38"/>
+<connect gate="G$1" pin="PE4" pad="39"/>
+<connect gate="G$1" pin="PE5" pad="40"/>
+<connect gate="G$1" pin="PE6" pad="41"/>
+<connect gate="G$1" pin="PE7" pad="42"/>
+<connect gate="G$1" pin="PF0" pad="45"/>
+<connect gate="G$1" pin="PF1" pad="46"/>
+<connect gate="G$1" pin="PF2" pad="47"/>
+<connect gate="G$1" pin="PF3" pad="48"/>
+<connect gate="G$1" pin="PF4" pad="49"/>
+<connect gate="G$1" pin="PF5" pad="50"/>
+<connect gate="G$1" pin="PF6" pad="51"/>
+<connect gate="G$1" pin="PF7" pad="52"/>
+<connect gate="G$1" pin="PH0" pad="55"/>
+<connect gate="G$1" pin="PH1" pad="56"/>
+<connect gate="G$1" pin="PH2" pad="57"/>
+<connect gate="G$1" pin="PH3" pad="58"/>
+<connect gate="G$1" pin="PH4" pad="59"/>
+<connect gate="G$1" pin="PH5" pad="60"/>
+<connect gate="G$1" pin="PH6" pad="61"/>
+<connect gate="G$1" pin="PH7" pad="62"/>
+<connect gate="G$1" pin="PJ0" pad="65"/>
+<connect gate="G$1" pin="PJ1" pad="66"/>
+<connect gate="G$1" pin="PJ2" pad="67"/>
+<connect gate="G$1" pin="PJ3" pad="68"/>
+<connect gate="G$1" pin="PJ4" pad="69"/>
+<connect gate="G$1" pin="PJ5" pad="70"/>
+<connect gate="G$1" pin="PJ6" pad="71"/>
+<connect gate="G$1" pin="PJ7" pad="72"/>
+<connect gate="G$1" pin="PK0" pad="75"/>
+<connect gate="G$1" pin="PK1" pad="76"/>
+<connect gate="G$1" pin="PK2" pad="77"/>
+<connect gate="G$1" pin="PK3" pad="78"/>
+<connect gate="G$1" pin="PK4" pad="79"/>
+<connect gate="G$1" pin="PK5" pad="80"/>
+<connect gate="G$1" pin="PK6" pad="81"/>
+<connect gate="G$1" pin="PK7" pad="82"/>
+<connect gate="G$1" pin="PQ0" pad="85"/>
+<connect gate="G$1" pin="PQ1" pad="86"/>
+<connect gate="G$1" pin="PQ2" pad="87"/>
+<connect gate="G$1" pin="PQ3" pad="88"/>
+<connect gate="G$1" pin="PR0(XT2)" pad="91"/>
+<connect gate="G$1" pin="PR1(XT1)" pad="92"/>
+<connect gate="G$1" pin="VCC" pad="14"/>
+<connect gate="G$1" pin="VCC1" pad="24"/>
+<connect gate="G$1" pin="VCC2" pad="34"/>
+<connect gate="G$1" pin="VCC3" pad="44"/>
+<connect gate="G$1" pin="VCC4" pad="54"/>
+<connect gate="G$1" pin="VCC5" pad="64"/>
+<connect gate="G$1" pin="VCC6" pad="74"/>
+<connect gate="G$1" pin="VCC7" pad="83"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA325P" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 32K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com .. doc8023.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA325P" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="64M1">
+<connects>
+<connect gate="G$1" pin="!RESET!/PG5" pad="20"/>
+<connect gate="G$1" pin="!SS!/PCINT8/PB0" pad="10"/>
+<connect gate="G$1" pin="ADC0/PF0" pad="61"/>
+<connect gate="G$1" pin="ADC1/PF1" pad="60"/>
+<connect gate="G$1" pin="ADC2/PF2" pad="59"/>
+<connect gate="G$1" pin="ADC3/PF3" pad="58"/>
+<connect gate="G$1" pin="ADC4/TCK/PF4" pad="57"/>
+<connect gate="G$1" pin="ADC5/TMS/PF5" pad="56"/>
+<connect gate="G$1" pin="ADC6/TDO/PF6" pad="55"/>
+<connect gate="G$1" pin="ADC7/TDI/PF7" pad="54"/>
+<connect gate="G$1" pin="AIN1/PCINT3/PE3" pad="5"/>
+<connect gate="G$1" pin="AREF" pad="62"/>
+<connect gate="G$1" pin="AVCC" pad="64"/>
+<connect gate="G$1" pin="CLKO/PCINT7/PE7" pad="9"/>
+<connect gate="G$1" pin="DI/SDA/PCINT5/PE5" pad="7"/>
+<connect gate="G$1" pin="DNC" pad="1"/>
+<connect gate="G$1" pin="DO/PCINT6/PE6" pad="8"/>
+<connect gate="G$1" pin="GND" pad="22"/>
+<connect gate="G$1" pin="GND@1" pad="53"/>
+<connect gate="G$1" pin="GND@2" pad="63"/>
+<connect gate="G$1" pin="ICP1/PD0" pad="25"/>
+<connect gate="G$1" pin="INT0/PD1" pad="26"/>
+<connect gate="G$1" pin="MISO/PCINT11/PB3" pad="13"/>
+<connect gate="G$1" pin="MOSI/PCINT10/PB2" pad="12"/>
+<connect gate="G$1" pin="OC0A/PCINT12/PB4" pad="14"/>
+<connect gate="G$1" pin="OC1A/PCINT13/PB5" pad="16"/>
+<connect gate="G$1" pin="OC1B/PCINT14/PB6" pad="15"/>
+<connect gate="G$1" pin="OC2A/PCINT15/PB7" pad="17"/>
+<connect gate="G$1" pin="PA0" pad="51"/>
+<connect gate="G$1" pin="PA1" pad="50"/>
+<connect gate="G$1" pin="PA2" pad="49"/>
+<connect gate="G$1" pin="PA3" pad="48"/>
+<connect gate="G$1" pin="PA4" pad="47"/>
+<connect gate="G$1" pin="PA5" pad="46"/>
+<connect gate="G$1" pin="PA6" pad="45"/>
+<connect gate="G$1" pin="PA7" pad="44"/>
+<connect gate="G$1" pin="PC0" pad="35"/>
+<connect gate="G$1" pin="PC1" pad="36"/>
+<connect gate="G$1" pin="PC2" pad="37"/>
+<connect gate="G$1" pin="PC3" pad="38"/>
+<connect gate="G$1" pin="PC4" pad="39"/>
+<connect gate="G$1" pin="PC5" pad="40"/>
+<connect gate="G$1" pin="PC6" pad="41"/>
+<connect gate="G$1" pin="PC7" pad="42"/>
+<connect gate="G$1" pin="PD2" pad="27"/>
+<connect gate="G$1" pin="PD3" pad="28"/>
+<connect gate="G$1" pin="PD4" pad="29"/>
+<connect gate="G$1" pin="PD5" pad="30"/>
+<connect gate="G$1" pin="PD6" pad="31"/>
+<connect gate="G$1" pin="PD7" pad="32"/>
+<connect gate="G$1" pin="PG0" pad="33"/>
+<connect gate="G$1" pin="PG1" pad="34"/>
+<connect gate="G$1" pin="PG2" pad="43"/>
+<connect gate="G$1" pin="RXD/PCINT0/PE0" pad="2"/>
+<connect gate="G$1" pin="SCK/PCINT9/PB1" pad="11"/>
+<connect gate="G$1" pin="T0/PG4" pad="19"/>
+<connect gate="G$1" pin="T1/PG3" pad="18"/>
+<connect gate="G$1" pin="TOSC1/XTAL1" pad="24"/>
+<connect gate="G$1" pin="TOSC2/XTAL2" pad="23"/>
+<connect gate="G$1" pin="TXD/PCINT1/PE1" pad="3"/>
+<connect gate="G$1" pin="USCK/SCL/PCINT4/PE4" pad="6"/>
+<connect gate="G$1" pin="VCC" pad="21"/>
+<connect gate="G$1" pin="VCC@1" pad="52"/>
+<connect gate="G$1" pin="XCK/AIN0/PCINT2/PE2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA325PV-10AU" constant="no"/>
+<attribute name="OC_FARNELL" value="1636939" constant="no"/>
+<attribute name="OC_NEWARK" value="03P2025" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB642D" prefix="IC">
+<description>&lt;b&gt;Flash-Memory 64-Megabit&lt;/b&gt; 2 .7-volt, Dual-interface, DataFlash&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3542.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB642D" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="28T-TSOP-1">
+<connects>
+<connect gate="G$1" pin="!CS" pad="11"/>
+<connect gate="G$1" pin="!RESET" pad="2"/>
+<connect gate="G$1" pin="!WP" pad="3"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="GNDP" pad="21"/>
+<connect gate="G$1" pin="I/O0" pad="17"/>
+<connect gate="G$1" pin="I/O1" pad="18"/>
+<connect gate="G$1" pin="I/O2" pad="19"/>
+<connect gate="G$1" pin="I/O3" pad="20"/>
+<connect gate="G$1" pin="I/O4" pad="23"/>
+<connect gate="G$1" pin="I/O5" pad="24"/>
+<connect gate="G$1" pin="I/O6" pad="25"/>
+<connect gate="G$1" pin="I/O7" pad="26"/>
+<connect gate="G$1" pin="RDY/!BUSY" pad="1"/>
+<connect gate="G$1" pin="SCK/CLK" pad="12"/>
+<connect gate="G$1" pin="SER/!BYTE" pad="16"/>
+<connect gate="G$1" pin="SI" pad="13"/>
+<connect gate="G$1" pin="SO" pad="14"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+<connect gate="G$1" pin="VCCP" pad="22"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="AT45DB642D-TU" constant="no"/>
+<attribute name="OC_FARNELL" value="1095799" constant="no"/>
+<attribute name="OC_NEWARK" value="51P1801" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ATMEGA644-*PU" prefix="IC">
+<description>&lt;b&gt;8-bit Microcontroller with 64K Bytes In-System Programmable Flash&lt;/b&gt;&lt;p&gt;
+Auto generated by &lt;i&gt;make-symbol-device-package-bsdl.ulp Rev. 34&lt;/i&gt;&lt;br&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc2593.pdf</description>
+<gates>
+<gate name="G$1" symbol="ATMEGA644-20PU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="DIL40">
+<connects>
+<connect gate="G$1" pin="!RESET" pad="9"/>
+<connect gate="G$1" pin="AREF" pad="32"/>
+<connect gate="G$1" pin="AVCC" pad="30"/>
+<connect gate="G$1" pin="GND" pad="11"/>
+<connect gate="G$1" pin="GND@1" pad="31"/>
+<connect gate="G$1" pin="PCINT0/ADC0_PA0" pad="40"/>
+<connect gate="G$1" pin="PCINT1/ADC1_PA1" pad="39"/>
+<connect gate="G$1" pin="PCINT10/INT2/AIN0_PB2" pad="3"/>
+<connect gate="G$1" pin="PCINT11/OC0A/AIN1_PB3" pad="4"/>
+<connect gate="G$1" pin="PCINT12/OC0B/SS_PB4" pad="5"/>
+<connect gate="G$1" pin="PCINT13/MOSI_PB5" pad="6"/>
+<connect gate="G$1" pin="PCINT14/MISO_PB6" pad="7"/>
+<connect gate="G$1" pin="PCINT15/SCK_PB7" pad="8"/>
+<connect gate="G$1" pin="PCINT16/SCL_PC0" pad="22"/>
+<connect gate="G$1" pin="PCINT17/SDA_PC1" pad="23"/>
+<connect gate="G$1" pin="PCINT18/TCK_PC2" pad="24"/>
+<connect gate="G$1" pin="PCINT19/TMS_PC3" pad="25"/>
+<connect gate="G$1" pin="PCINT2/ADC2_PA2" pad="38"/>
+<connect gate="G$1" pin="PCINT20/TDO_PC4" pad="26"/>
+<connect gate="G$1" pin="PCINT21/TDI_PC5" pad="27"/>
+<connect gate="G$1" pin="PCINT22/TOSC1_PC6" pad="28"/>
+<connect gate="G$1" pin="PCINT23/TOSC2_PC7" pad="29"/>
+<connect gate="G$1" pin="PCINT24/RXD0_PD0" pad="14"/>
+<connect gate="G$1" pin="PCINT25/TXD0_PD1" pad="15"/>
+<connect gate="G$1" pin="PCINT26/INT0_PD2" pad="16"/>
+<connect gate="G$1" pin="PCINT27/INT1_PD3" pad="17"/>
+<connect gate="G$1" pin="PCINT28/OC1B_PD4" pad="18"/>
+<connect gate="G$1" pin="PCINT29/OC1A_PD5" pad="19"/>
+<connect gate="G$1" pin="PCINT3/ADC3_PA3" pad="37"/>
+<connect gate="G$1" pin="PCINT30/OC2B/ICP_PD6" pad="20"/>
+<connect gate="G$1" pin="PCINT31/OC2A_PD7" pad="21"/>
+<connect gate="G$1" pin="PCINT4/ADC4_PA4" pad="36"/>
+<connect gate="G$1" pin="PCINT5/ADC5_PA5" pad="35"/>
+<connect gate="G$1" pin="PCINT6/ADC6_PA6" pad="34"/>
+<connect gate="G$1" pin="PCINT7/ADC7_PA7" pad="33"/>
+<connect gate="G$1" pin="PCINT8/XCK0/T0_PB0" pad="1"/>
+<connect gate="G$1" pin="PCINT9/CLKO/T1_PB1" pad="2"/>
+<connect gate="G$1" pin="VCC" pad="10"/>
+<connect gate="G$1" pin="XTAL1" pad="13"/>
+<connect gate="G$1" pin="XTAL2" pad="12"/>
+</connects>
+<technologies>
+<technology name="10">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644V-10PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288342" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5062" constant="no"/>
+</technology>
+<technology name="20">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ATMEGA644-20PU" constant="no"/>
+<attribute name="OC_FARNELL" value="1288340" constant="no"/>
+<attribute name="OC_NEWARK" value="23M5060" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="AT45DB161D" prefix="IC">
+<description>&lt;b&gt;16-megabit 2.5V or 2.7V DataFlash&lt;/b&gt;&lt;p&gt;
+Source: http://www.atmel.com/dyn/resources/prod_documents/doc3500.pdf</description>
+<gates>
+<gate name="G$1" symbol="AT45DB161VFN8" x="0" y="0"/>
+</gates>
+<devices>
+<device name="-MU" package="VDFN-8">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-SU" package="8S2">
+<connects>
+<connect gate="G$1" pin="!CS" pad="4"/>
+<connect gate="G$1" pin="!RESET" pad="3"/>
+<connect gate="G$1" pin="!WP" pad="5"/>
+<connect gate="G$1" pin="GND" pad="7"/>
+<connect gate="G$1" pin="SCK" pad="2"/>
+<connect gate="G$1" pin="SI" pad="1"/>
+<connect gate="G$1" pin="SO" pad="8"/>
+<connect gate="G$1" pin="VCC" pad="6"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="ATMEL" constant="no"/>
+<attribute name="MPN" value="AT45DB161D-SU" constant="no"/>
+<attribute name="OC_FARNELL" value="1455040" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>