app/test-crypto-perf/cperf_test_pmd_cyclecount.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Intel Corporation
   3  */
   4
   5 #include <stdbool.h>
   6
   7 #include <rte_crypto.h>
   8 #include <rte_cryptodev.h>
   9 #include <rte_cycles.h>
  10 #include <rte_malloc.h>
  11
  12 #include "cperf_ops.h"
  13 #include "cperf_test_pmd_cyclecount.h"
  14 #include "cperf_test_common.h"
  15
  16 #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n"
  17 #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n"
  18 #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n"
  19 #define CSV_LINE_FMT "%10u;%10u;%u;%u;%u;%u;%u;%.3f;%.3f;%.3f\n"
  20
  21 struct cperf_pmd_cyclecount_ctx {
  22         uint8_t dev_id;
  23         uint16_t qp_id;
  24         uint8_t lcore_id;
  25
  26         struct rte_mempool *pool;
  27         struct rte_crypto_op **ops;
  28         struct rte_crypto_op **ops_processed;
  29
  30         struct rte_cryptodev_sym_session *sess;
  31
  32         cperf_populate_ops_t populate_ops;
  33
  34         uint32_t src_buf_offset;
  35         uint32_t dst_buf_offset;
  36
  37         const struct cperf_options *options;
  38         const struct cperf_test_vector *test_vector;
  39 };
  40
  41 struct pmd_cyclecount_state {
  42         struct cperf_pmd_cyclecount_ctx *ctx;
  43         const struct cperf_options *opts;
  44         uint32_t lcore;
  45         uint64_t delay;
  46         int linearize;
  47         uint32_t ops_enqd;
  48         uint32_t ops_deqd;
  49         uint32_t ops_enq_retries;
  50         uint32_t ops_deq_retries;
  51         double cycles_per_build;
  52         double cycles_per_enq;
  53         double cycles_per_deq;
  54 };
  55
  56 static const uint16_t iv_offset =
  57                 sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op);
  58
  59 static void
  60 cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx)
  61 {
  62         if (!ctx)
  63                 return;
  64
  65         if (ctx->sess) {
  66 #ifdef RTE_LIBRTE_SECURITY
  67                 if (ctx->options->op_type == CPERF_PDCP ||
  68                                 ctx->options->op_type == CPERF_DOCSIS) {
  69                         struct rte_security_ctx *sec_ctx =
  70                                 (struct rte_security_ctx *)
  71                                 rte_cryptodev_get_sec_ctx(ctx->dev_id);
  72                         rte_security_session_destroy(sec_ctx,
  73                                 (struct rte_security_session *)ctx->sess);
  74                 } else
  75 #endif
  76                 {
  77                         rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
  78                         rte_cryptodev_sym_session_free(ctx->sess);
  79                 }
  80         }
  81
  82         if (ctx->pool)
  83                 rte_mempool_free(ctx->pool);
  84
  85         if (ctx->ops)
  86                 rte_free(ctx->ops);
  87
  88         if (ctx->ops_processed)
  89                 rte_free(ctx->ops_processed);
  90
  91         rte_free(ctx);
  92 }
  93
  94 void *
  95 cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp,
  96                 struct rte_mempool *sess_priv_mp,
  97                 uint8_t dev_id, uint16_t qp_id,
  98                 const struct cperf_options *options,
  99                 const struct cperf_test_vector *test_vector,
 100                 const struct cperf_op_fns *op_fns)
 101 {
 102         struct cperf_pmd_cyclecount_ctx *ctx = NULL;
 103
 104         /* preallocate buffers for crypto ops as they can get quite big */
 105         size_t alloc_sz = sizeof(struct rte_crypto_op *) *
 106                         options->nb_descriptors;
 107
 108         ctx = rte_malloc(NULL, sizeof(struct cperf_pmd_cyclecount_ctx), 0);
 109         if (ctx == NULL)
 110                 goto err;
 111
 112         ctx->dev_id = dev_id;
 113         ctx->qp_id = qp_id;
 114
 115         ctx->populate_ops = op_fns->populate_ops;
 116         ctx->options = options;
 117         ctx->test_vector = test_vector;
 118
 119         /* IV goes at the end of the crypto operation */
 120         uint16_t iv_offset = sizeof(struct rte_crypto_op) +
 121                         sizeof(struct rte_crypto_sym_op);
 122
 123         ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options,
 124                         test_vector, iv_offset);
 125         if (ctx->sess == NULL)
 126                 goto err;
 127
 128         if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0,
 129                         &ctx->src_buf_offset, &ctx->dst_buf_offset,
 130                         &ctx->pool) < 0)
 131                 goto err;
 132
 133         ctx->ops = rte_malloc("ops", alloc_sz, 0);
 134         if (!ctx->ops)
 135                 goto err;
 136
 137         ctx->ops_processed = rte_malloc("ops_processed", alloc_sz, 0);
 138         if (!ctx->ops_processed)
 139                 goto err;
 140
 141         return ctx;
 142
 143 err:
 144         cperf_pmd_cyclecount_test_free(ctx);
 145
 146         return NULL;
 147 }
 148
 149 /* benchmark alloc-build-free of ops */
 150 static inline int
 151 pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op,
 152                 uint16_t test_burst_size)
 153 {
 154         uint32_t iter_ops_left = state->opts->total_ops - cur_op;
 155         uint32_t iter_ops_needed =
 156                         RTE_MIN(state->opts->nb_descriptors, iter_ops_left);
 157         uint32_t cur_iter_op;
 158         uint32_t imix_idx = 0;
 159
 160         for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
 161                         cur_iter_op += test_burst_size) {
 162                 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
 163                                 test_burst_size);
 164                 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
 165
 166                 /* Allocate objects containing crypto operations and mbufs */
 167                 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
 168                                         burst_size) != 0) {
 169                         RTE_LOG(ERR, USER1,
 170                                         "Failed to allocate more crypto operations "
 171                                         "from the crypto operation pool.\n"
 172                                         "Consider increasing the pool size "
 173                                         "with --pool-sz\n");
 174                                 return -1;
 175                 }
 176
 177                 /* Setup crypto op, attach mbuf etc */
 178                 (state->ctx->populate_ops)(ops,
 179                                 state->ctx->src_buf_offset,
 180                                 state->ctx->dst_buf_offset,
 181                                 burst_size,
 182                                 state->ctx->sess, state->opts,
 183                                 state->ctx->test_vector, iv_offset,
 184                                 &imix_idx);
 185
 186 #ifdef CPERF_LINEARIZATION_ENABLE
 187                 /* Check if source mbufs require coalescing */
 188                 if (state->linearize) {
 189                         uint8_t i;
 190                         for (i = 0; i < burst_size; i++) {
 191                                 struct rte_mbuf *src = ops[i]->sym->m_src;
 192                                 rte_pktmbuf_linearize(src);
 193                         }
 194                 }
 195 #endif /* CPERF_LINEARIZATION_ENABLE */
 196                 rte_mempool_put_bulk(state->ctx->pool, (void **)ops,
 197                                 burst_size);
 198         }
 199
 200         return 0;
 201 }
 202
 203 /* allocate and build ops (no free) */
 204 static int
 205 pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state,
 206                 uint32_t iter_ops_needed, uint16_t test_burst_size)
 207 {
 208         uint32_t cur_iter_op;
 209         uint32_t imix_idx = 0;
 210
 211         for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
 212                         cur_iter_op += test_burst_size) {
 213                 uint32_t burst_size = RTE_MIN(
 214                                 iter_ops_needed - cur_iter_op, test_burst_size);
 215                 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
 216
 217                 /* Allocate objects containing crypto operations and mbufs */
 218                 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
 219                                         burst_size) != 0) {
 220                         RTE_LOG(ERR, USER1,
 221                                         "Failed to allocate more crypto operations "
 222                                         "from the crypto operation pool.\n"
 223                                         "Consider increasing the pool size "
 224                                         "with --pool-sz\n");
 225                                 return -1;
 226                 }
 227
 228                 /* Setup crypto op, attach mbuf etc */
 229                 (state->ctx->populate_ops)(ops,
 230                                 state->ctx->src_buf_offset,
 231                                 state->ctx->dst_buf_offset,
 232                                 burst_size,
 233                                 state->ctx->sess, state->opts,
 234                                 state->ctx->test_vector, iv_offset,
 235                                 &imix_idx);
 236         }
 237         return 0;
 238 }
 239
 240 /* benchmark enqueue, returns number of ops enqueued */
 241 static uint32_t
 242 pmd_cyclecount_bench_enq(struct pmd_cyclecount_state *state,
 243                 uint32_t iter_ops_needed, uint16_t test_burst_size)
 244 {
 245         /* Enqueue full descriptor ring of ops on crypto device */
 246         uint32_t cur_iter_op = 0;
 247         while (cur_iter_op < iter_ops_needed) {
 248                 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
 249                                 test_burst_size);
 250                 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
 251                 uint32_t burst_enqd;
 252
 253                 burst_enqd = rte_cryptodev_enqueue_burst(state->ctx->dev_id,
 254                                 state->ctx->qp_id, ops, burst_size);
 255
 256                 /* if we couldn't enqueue anything, the queue is full */
 257                 if (!burst_enqd) {
 258                         /* don't try to dequeue anything we didn't enqueue */
 259                         return cur_iter_op;
 260                 }
 261
 262                 if (burst_enqd < burst_size)
 263                         state->ops_enq_retries++;
 264                 state->ops_enqd += burst_enqd;
 265                 cur_iter_op += burst_enqd;
 266         }
 267         return iter_ops_needed;
 268 }
 269
 270 /* benchmark dequeue */
 271 static void
 272 pmd_cyclecount_bench_deq(struct pmd_cyclecount_state *state,
 273                 uint32_t iter_ops_needed, uint16_t test_burst_size)
 274 {
 275         /* Dequeue full descriptor ring of ops on crypto device */
 276         uint32_t cur_iter_op = 0;
 277         while (cur_iter_op < iter_ops_needed) {
 278                 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
 279                                 test_burst_size);
 280                 struct rte_crypto_op **ops_processed =
 281                                 &state->ctx->ops[cur_iter_op];
 282                 uint32_t burst_deqd;
 283
 284                 burst_deqd = rte_cryptodev_dequeue_burst(state->ctx->dev_id,
 285                                 state->ctx->qp_id, ops_processed, burst_size);
 286
 287                 if (burst_deqd < burst_size)
 288                         state->ops_deq_retries++;
 289                 state->ops_deqd += burst_deqd;
 290                 cur_iter_op += burst_deqd;
 291         }
 292 }
 293
 294 /* run benchmark per burst size */
 295 static inline int
 296 pmd_cyclecount_bench_burst_sz(
 297                 struct pmd_cyclecount_state *state, uint16_t test_burst_size)
 298 {
 299         uint64_t tsc_start;
 300         uint64_t tsc_end;
 301         uint64_t tsc_op;
 302         uint64_t tsc_enq;
 303         uint64_t tsc_deq;
 304         uint32_t cur_op;
 305
 306         /* reset all counters */
 307         tsc_enq = 0;
 308         tsc_deq = 0;
 309         state->ops_enqd = 0;
 310         state->ops_enq_retries = 0;
 311         state->ops_deqd = 0;
 312         state->ops_deq_retries = 0;
 313
 314         /*
 315          * Benchmark crypto op alloc-build-free separately.
 316          */
 317         tsc_start = rte_rdtsc_precise();
 318
 319         for (cur_op = 0; cur_op < state->opts->total_ops;
 320                         cur_op += state->opts->nb_descriptors) {
 321                 if (unlikely(pmd_cyclecount_bench_ops(
 322                                 state, cur_op, test_burst_size)))
 323                         return -1;
 324         }
 325
 326         tsc_end = rte_rdtsc_precise();
 327         tsc_op = tsc_end - tsc_start;
 328
 329
 330         /*
 331          * Hardware acceleration cyclecount benchmarking loop.
 332          *
 333          * We're benchmarking raw enq/deq performance by filling up the device
 334          * queue, so we never get any failed enqs unless the driver won't accept
 335          * the exact number of descriptors we requested, or the driver won't
 336          * wrap around the end of the TX ring. However, since we're only
 337          * dequeueing once we've filled up the queue, we have to benchmark it
 338          * piecemeal and then average out the results.
 339          */
 340         cur_op = 0;
 341         while (cur_op < state->opts->total_ops) {
 342                 uint32_t iter_ops_left = state->opts->total_ops - cur_op;
 343                 uint32_t iter_ops_needed = RTE_MIN(
 344                                 state->opts->nb_descriptors, iter_ops_left);
 345                 uint32_t iter_ops_allocd = iter_ops_needed;
 346
 347                 /* allocate and build ops */
 348                 if (unlikely(pmd_cyclecount_build_ops(state, iter_ops_needed,
 349                                 test_burst_size)))
 350                         return -1;
 351
 352                 tsc_start = rte_rdtsc_precise();
 353
 354                 /* fill up TX ring */
 355                 iter_ops_needed = pmd_cyclecount_bench_enq(state,
 356                                 iter_ops_needed, test_burst_size);
 357
 358                 tsc_end = rte_rdtsc_precise();
 359
 360                 tsc_enq += tsc_end - tsc_start;
 361
 362                 /* allow for HW to catch up */
 363                 if (state->delay)
 364                         rte_delay_us_block(state->delay);
 365
 366                 tsc_start = rte_rdtsc_precise();
 367
 368                 /* drain RX ring */
 369                 pmd_cyclecount_bench_deq(state, iter_ops_needed,
 370                                 test_burst_size);
 371
 372                 tsc_end = rte_rdtsc_precise();
 373
 374                 tsc_deq += tsc_end - tsc_start;
 375
 376                 cur_op += iter_ops_needed;
 377
 378                 /*
 379                  * we may not have processed all ops that we allocated, so
 380                  * free everything we've allocated.
 381                  */
 382                 rte_mempool_put_bulk(state->ctx->pool,
 383                                 (void **)state->ctx->ops, iter_ops_allocd);
 384         }
 385
 386         state->cycles_per_build = (double)tsc_op / state->opts->total_ops;
 387         state->cycles_per_enq = (double)tsc_enq / state->ops_enqd;
 388         state->cycles_per_deq = (double)tsc_deq / state->ops_deqd;
 389
 390         return 0;
 391 }
 392
 393 int
 394 cperf_pmd_cyclecount_test_runner(void *test_ctx)
 395 {
 396         struct pmd_cyclecount_state state = {0};
 397         const struct cperf_options *opts;
 398         uint16_t test_burst_size;
 399         uint8_t burst_size_idx = 0;
 400
 401         state.ctx = test_ctx;
 402         opts = state.ctx->options;
 403         state.opts = opts;
 404         state.lcore = rte_lcore_id();
 405         state.linearize = 0;
 406
 407         static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
 408         static bool warmup = true;
 409
 410         /*
 411          * We need a small delay to allow for hardware to process all the crypto
 412          * operations. We can't automatically figure out what the delay should
 413          * be, so we leave it up to the user (by default it's 0).
 414          */
 415         state.delay = 1000 * opts->pmdcc_delay;
 416
 417 #ifdef CPERF_LINEARIZATION_ENABLE
 418         struct rte_cryptodev_info dev_info;
 419
 420         /* Check if source mbufs require coalescing */
 421         if (opts->segments_sz < ctx->options->max_buffer_size) {
 422                 rte_cryptodev_info_get(state.ctx->dev_id, &dev_info);
 423                 if ((dev_info.feature_flags &
 424                                     RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) ==
 425                                 0) {
 426                         state.linearize = 1;
 427                 }
 428         }
 429 #endif /* CPERF_LINEARIZATION_ENABLE */
 430
 431         state.ctx->lcore_id = state.lcore;
 432
 433         /* Get first size from range or list */
 434         if (opts->inc_burst_size != 0)
 435                 test_burst_size = opts->min_burst_size;
 436         else
 437                 test_burst_size = opts->burst_size_list[0];
 438
 439         while (test_burst_size <= opts->max_burst_size) {
 440                 /* do a benchmark run */
 441                 if (pmd_cyclecount_bench_burst_sz(&state, test_burst_size))
 442                         return -1;
 443
 444                 /*
 445                  * First run is always a warm up run.
 446                  */
 447                 if (warmup) {
 448                         warmup = false;
 449                         continue;
 450                 }
 451
 452                 if (!opts->csv) {
 453                         if (rte_atomic16_test_and_set(&display_once))
 454                                 printf(PRETTY_HDR_FMT, "lcore id", "Buf Size",
 455                                                 "Burst Size", "Enqueued",
 456                                                 "Dequeued", "Enq Retries",
 457                                                 "Deq Retries", "Cycles/Op",
 458                                                 "Cycles/Enq", "Cycles/Deq");
 459
 460                         printf(PRETTY_LINE_FMT, state.ctx->lcore_id,
 461                                         opts->test_buffer_size, test_burst_size,
 462                                         state.ops_enqd, state.ops_deqd,
 463                                         state.ops_enq_retries,
 464                                         state.ops_deq_retries,
 465                                         state.cycles_per_build,
 466                                         state.cycles_per_enq,
 467                                         state.cycles_per_deq);
 468                 } else {
 469                         if (rte_atomic16_test_and_set(&display_once))
 470                                 printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
 471                                                 "Burst Size", "Enqueued",
 472                                                 "Dequeued", "Enq Retries",
 473                                                 "Deq Retries", "Cycles/Op",
 474                                                 "Cycles/Enq", "Cycles/Deq");
 475
 476                         printf(CSV_LINE_FMT, state.ctx->lcore_id,
 477                                         opts->test_buffer_size, test_burst_size,
 478                                         state.ops_enqd, state.ops_deqd,
 479                                         state.ops_enq_retries,
 480                                         state.ops_deq_retries,
 481                                         state.cycles_per_build,
 482                                         state.cycles_per_enq,
 483                                         state.cycles_per_deq);
 484                 }
 485
 486                 /* Get next size from range or list */
 487                 if (opts->inc_burst_size != 0)
 488                         test_burst_size += opts->inc_burst_size;
 489                 else {
 490                         if (++burst_size_idx == opts->burst_size_count)
 491                                 break;
 492                         test_burst_size = opts->burst_size_list[burst_size_idx];
 493                 }
 494         }
 495
 496         return 0;
 497 }
 498
 499 void
 500 cperf_pmd_cyclecount_test_destructor(void *arg)
 501 {
 502         struct cperf_pmd_cyclecount_ctx *ctx = arg;
 503
 504         if (ctx == NULL)
 505                 return;
 506
 507         cperf_pmd_cyclecount_test_free(ctx);
 508 }