config/arm/meson.build

   1 # SPDX-License-Identifier: BSD-3-Clause
   2 # Copyright(c) 2017 Intel Corporation.
   3 # Copyright(c) 2017 Cavium, Inc
   4
   5 # for checking defines we need to use the correct compiler flags
   6 march_opt = '-march=@0@'.format(machine)
   7
   8 arm_force_native_march = false
   9 arm_force_default_march = (machine == 'default')
  10
  11 flags_common_default = [
  12         # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
  13         # to determine the best threshold in code. Refer to notes in source file
  14         # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info.
  15         ['RTE_ARCH_ARM64_MEMCPY', false],
  16         #       ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
  17         #       ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
  18         # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
  19         # strong reasons.
  20         #       ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false],
  21         #       ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
  22         #       ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
  23
  24         ['RTE_NET_FM10K', false],
  25         ['RTE_NET_SFC_EFX', false],
  26         ['RTE_NET_AVP', false],
  27
  28         ['RTE_SCHED_VECTOR', false],
  29         ['RTE_ARM_USE_WFE', false],
  30 ]
  31
  32 flags_generic = [
  33         ['RTE_MACHINE', '"armv8a"'],
  34         ['RTE_MAX_LCORE', 256],
  35         ['RTE_USE_C11_MEM_MODEL', true],
  36         ['RTE_CACHE_LINE_SIZE', 128]]
  37 flags_arm = [
  38         ['RTE_MACHINE', '"armv8a"'],
  39         ['RTE_MAX_LCORE', 16],
  40         ['RTE_USE_C11_MEM_MODEL', true],
  41         ['RTE_CACHE_LINE_SIZE', 64]]
  42 flags_cavium = [
  43         ['RTE_CACHE_LINE_SIZE', 128],
  44         ['RTE_MAX_NUMA_NODES', 2],
  45         ['RTE_MAX_LCORE', 96],
  46         ['RTE_MAX_VFIO_GROUPS', 128]]
  47 flags_dpaa = [
  48         ['RTE_MACHINE', '"dpaa"'],
  49         ['RTE_USE_C11_MEM_MODEL', true],
  50         ['RTE_CACHE_LINE_SIZE', 64],
  51         ['RTE_MAX_NUMA_NODES', 1],
  52         ['RTE_MAX_LCORE', 16],
  53         ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]]
  54 flags_emag = [
  55         ['RTE_MACHINE', '"emag"'],
  56         ['RTE_CACHE_LINE_SIZE', 64],
  57         ['RTE_MAX_NUMA_NODES', 1],
  58         ['RTE_MAX_LCORE', 32]]
  59 flags_armada = [
  60         ['RTE_MACHINE', '"armv8a"'],
  61         ['RTE_CACHE_LINE_SIZE', 64],
  62         ['RTE_MAX_NUMA_NODES', 1],
  63         ['RTE_MAX_LCORE', 16]]
  64
  65 flags_default_extra = []
  66 flags_thunderx_extra = [
  67         ['RTE_MACHINE', '"thunderx"'],
  68         ['RTE_USE_C11_MEM_MODEL', false]]
  69 flags_thunderx2_extra = [
  70         ['RTE_MACHINE', '"thunderx2"'],
  71         ['RTE_CACHE_LINE_SIZE', 64],
  72         ['RTE_MAX_NUMA_NODES', 2],
  73         ['RTE_MAX_LCORE', 256],
  74         ['RTE_ARM_FEATURE_ATOMICS', true],
  75         ['RTE_USE_C11_MEM_MODEL', true]]
  76 flags_octeontx2_extra = [
  77         ['RTE_MACHINE', '"octeontx2"'],
  78         ['RTE_MAX_NUMA_NODES', 1],
  79         ['RTE_MAX_LCORE', 36],
  80         ['RTE_ARM_FEATURE_ATOMICS', true],
  81         ['RTE_EAL_IGB_UIO', false],
  82         ['RTE_USE_C11_MEM_MODEL', true]]
  83 flags_n1generic_extra = [
  84         ['RTE_MACHINE', '"neoverse-n1"'],
  85         ['RTE_MAX_LCORE', 64],
  86         ['RTE_CACHE_LINE_SIZE', 64],
  87         ['RTE_ARM_FEATURE_ATOMICS', true],
  88         ['RTE_USE_C11_MEM_MODEL', true],
  89         ['RTE_MAX_MEM_MB', 1048576],
  90         ['RTE_MAX_NUMA_NODES', 1],
  91         ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
  92         ['RTE_LIBRTE_VHOST_NUMA', false]]
  93
  94 machine_args_generic = [
  95         ['default', ['-march=armv8-a+crc', '-moutline-atomics']],
  96         ['native', ['-march=native']],
  97         ['0xd03', ['-mcpu=cortex-a53']],
  98         ['0xd04', ['-mcpu=cortex-a35']],
  99         ['0xd07', ['-mcpu=cortex-a57']],
 100         ['0xd08', ['-mcpu=cortex-a72']],
 101         ['0xd09', ['-mcpu=cortex-a73']],
 102         ['0xd0a', ['-mcpu=cortex-a75']],
 103         ['0xd0b', ['-mcpu=cortex-a76']],
 104         ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_n1generic_extra]]
 105
 106 machine_args_cavium = [
 107         ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
 108         ['native', ['-march=native']],
 109         ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra],
 110         ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra],
 111         ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra],
 112         ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_thunderx2_extra],
 113         ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_octeontx2_extra]]
 114
 115 machine_args_emag = [
 116         ['default', ['-march=armv8-a+crc+crypto', '-mtune=emag']],
 117         ['native', ['-march=native']]]
 118
 119 ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
 120 impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
 121 impl_0x41 = ['Arm', flags_arm, machine_args_generic]
 122 impl_0x42 = ['Broadcom', flags_generic, machine_args_generic]
 123 impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
 124 impl_0x44 = ['DEC', flags_generic, machine_args_generic]
 125 impl_0x49 = ['Infineon', flags_generic, machine_args_generic]
 126 impl_0x4d = ['Motorola', flags_generic, machine_args_generic]
 127 impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic]
 128 impl_0x50 = ['Ampere Computing', flags_emag, machine_args_emag]
 129 impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic]
 130 impl_0x53 = ['Samsung', flags_generic, machine_args_generic]
 131 impl_0x56 = ['Marvell ARMADA', flags_armada, machine_args_generic]
 132 impl_0x69 = ['Intel', flags_generic, machine_args_generic]
 133 impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
 134
 135 dpdk_conf.set('RTE_ARCH_ARM', 1)
 136 dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
 137
 138 if dpdk_conf.get('RTE_ARCH_32')
 139         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
 140         dpdk_conf.set('RTE_ARCH_ARMv7', 1)
 141         # the minimum architecture supported, armv7-a, needs the following,
 142         # mk/machine/armv7a/rte.vars.mk sets it too
 143         machine_args += '-mfpu=neon'
 144 else
 145         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
 146         dpdk_conf.set('RTE_ARCH_ARM64', 1)
 147
 148         machine = []
 149         cmd_generic = ['generic', '', '', 'default', '']
 150         cmd_output = cmd_generic # Set generic by default
 151         machine_args = [] # Clear previous machine args
 152         if arm_force_default_march and not meson.is_cross_build()
 153                 machine = impl_generic
 154                 impl_pn = 'default'
 155         elif not meson.is_cross_build()
 156                 # The script returns ['Implementer', 'Variant', 'Architecture',
 157                 # 'Primary Part number', 'Revision']
 158                 detect_vendor = find_program(join_paths(
 159                                 meson.current_source_dir(), 'armv8_machine.py'))
 160                 cmd = run_command(detect_vendor.path())
 161                 if cmd.returncode() == 0
 162                         cmd_output = cmd.stdout().to_lower().strip().split(' ')
 163                 endif
 164                 # Set to generic if variable is not found
 165                 machine = get_variable('impl_' + cmd_output[0], ['generic'])
 166                 if machine[0] == 'generic'
 167                         machine = impl_generic
 168                         cmd_output = cmd_generic
 169                 endif
 170                 impl_pn = cmd_output[3]
 171                 if arm_force_native_march == true
 172                         impl_pn = 'native'
 173                 endif
 174         else
 175                 impl_id = meson.get_cross_property('implementor_id', 'generic')
 176                 impl_pn = meson.get_cross_property('implementor_pn', 'default')
 177                 machine = get_variable('impl_' + impl_id)
 178         endif
 179
 180         # Apply Common Defaults. These settings may be overwritten by machine
 181         # settings later.
 182         foreach flag: flags_common_default
 183                 if flag.length() > 0
 184                         dpdk_conf.set(flag[0], flag[1])
 185                 endif
 186         endforeach
 187
 188         message('Implementer : ' + machine[0])
 189         foreach flag: machine[1]
 190                 if flag.length() > 0
 191                         dpdk_conf.set(flag[0], flag[1])
 192                 endif
 193         endforeach
 194
 195         foreach marg: machine[2]
 196                 if marg[0] == impl_pn
 197                         foreach flag: marg[1]
 198                                 if cc.has_argument(flag)
 199                                         machine_args += flag
 200                                 endif
 201                         endforeach
 202                         # Apply any extra machine specific flags.
 203                         foreach flag: marg.get(2, flags_default_extra)
 204                                 if flag.length() > 0
 205                                         dpdk_conf.set(flag[0], flag[1])
 206                                 endif
 207                         endforeach
 208                 endif
 209         endforeach
 210 endif
 211 message(machine_args)
 212
 213 if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
 214     cc.get_define('__aarch64__', args: machine_args) != '')
 215         compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
 216 endif
 217
 218 if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
 219         compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
 220 endif
 221
 222 if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
 223         compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
 224         'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
 225 endif