config/arm/meson.build

   1 # SPDX-License-Identifier: BSD-3-Clause
   2 # Copyright(c) 2017 Intel Corporation.
   3 # Copyright(c) 2017 Cavium, Inc
   4
   5 # for checking defines we need to use the correct compiler flags
   6 march_opt = '-march=@0@'.format(machine)
   7
   8 arm_force_native_march = false
   9 arm_force_default_march = (machine == 'default')
  10
  11 flags_common = [
  12         # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
  13         # to determine the best threshold in code. Refer to notes in source file
  14         # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info.
  15         ['RTE_ARCH_ARM64_MEMCPY', false],
  16         #       ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
  17         #       ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
  18         # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
  19         # strong reasons.
  20         #       ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false],
  21         #       ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
  22         #       ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
  23
  24         ['RTE_NET_FM10K', false],
  25         ['RTE_NET_AVP', false],
  26
  27         ['RTE_SCHED_VECTOR', false],
  28         ['RTE_ARM_USE_WFE', false],
  29 ]
  30
  31 flags_implementer_generic = [
  32         ['RTE_MACHINE', '"armv8a"'],
  33         ['RTE_MAX_LCORE', 256],
  34         ['RTE_USE_C11_MEM_MODEL', true],
  35         ['RTE_CACHE_LINE_SIZE', 128]]
  36 flags_implementer_arm = [
  37         ['RTE_MACHINE', '"armv8a"'],
  38         ['RTE_MAX_LCORE', 16],
  39         ['RTE_USE_C11_MEM_MODEL', true],
  40         ['RTE_CACHE_LINE_SIZE', 64]]
  41 flags_implementer_cavium = [
  42         ['RTE_CACHE_LINE_SIZE', 128],
  43         ['RTE_MAX_NUMA_NODES', 2],
  44         ['RTE_MAX_LCORE', 96],
  45         ['RTE_MAX_VFIO_GROUPS', 128]]
  46 flags_implementer_dpaa = [
  47         ['RTE_MACHINE', '"dpaa"'],
  48         ['RTE_USE_C11_MEM_MODEL', true],
  49         ['RTE_CACHE_LINE_SIZE', 64],
  50         ['RTE_MAX_NUMA_NODES', 1],
  51         ['RTE_MAX_LCORE', 16],
  52         ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]]
  53 flags_implementer_emag = [
  54         ['RTE_MACHINE', '"emag"'],
  55         ['RTE_CACHE_LINE_SIZE', 64],
  56         ['RTE_MAX_NUMA_NODES', 1],
  57         ['RTE_MAX_LCORE', 32]]
  58 flags_implementer_armada = [
  59         ['RTE_MACHINE', '"armv8a"'],
  60         ['RTE_CACHE_LINE_SIZE', 64],
  61         ['RTE_MAX_NUMA_NODES', 1],
  62         ['RTE_MAX_LCORE', 16]]
  63
  64 flags_part_number_default = []
  65 flags_part_number_thunderx = [
  66         ['RTE_MACHINE', '"thunderx"'],
  67         ['RTE_USE_C11_MEM_MODEL', false]]
  68 flags_part_number_thunderx2 = [
  69         ['RTE_MACHINE', '"thunderx2"'],
  70         ['RTE_CACHE_LINE_SIZE', 64],
  71         ['RTE_MAX_NUMA_NODES', 2],
  72         ['RTE_MAX_LCORE', 256],
  73         ['RTE_ARM_FEATURE_ATOMICS', true],
  74         ['RTE_USE_C11_MEM_MODEL', true]]
  75 flags_part_number_octeontx2 = [
  76         ['RTE_MACHINE', '"octeontx2"'],
  77         ['RTE_MAX_NUMA_NODES', 1],
  78         ['RTE_MAX_LCORE', 36],
  79         ['RTE_ARM_FEATURE_ATOMICS', true],
  80         ['RTE_EAL_IGB_UIO', false],
  81         ['RTE_USE_C11_MEM_MODEL', true]]
  82 flags_part_number_n1generic = [
  83         ['RTE_MACHINE', '"neoverse-n1"'],
  84         ['RTE_MAX_LCORE', 64],
  85         ['RTE_CACHE_LINE_SIZE', 64],
  86         ['RTE_ARM_FEATURE_ATOMICS', true],
  87         ['RTE_USE_C11_MEM_MODEL', true],
  88         ['RTE_MAX_MEM_MB', 1048576],
  89         ['RTE_MAX_NUMA_NODES', 1],
  90         ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
  91         ['RTE_LIBRTE_VHOST_NUMA', false]]
  92 flags_part_number_n2generic = [
  93         ['RTE_MACHINE', '"neoverse-n2"'],
  94         ['RTE_MAX_LCORE', 64],
  95         ['RTE_CACHE_LINE_SIZE', 64],
  96         ['RTE_ARM_FEATURE_ATOMICS', true],
  97         ['RTE_USE_C11_MEM_MODEL', true],
  98         ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
  99         ['RTE_LIBRTE_VHOST_NUMA', false]]
 100
 101 part_number_config_arm = [
 102         ['generic', ['-march=armv8-a+crc', '-moutline-atomics']],
 103         ['native', ['-march=native']],
 104         ['0xd03', ['-mcpu=cortex-a53']],
 105         ['0xd04', ['-mcpu=cortex-a35']],
 106         ['0xd07', ['-mcpu=cortex-a57']],
 107         ['0xd08', ['-mcpu=cortex-a72']],
 108         ['0xd09', ['-mcpu=cortex-a73']],
 109         ['0xd0a', ['-mcpu=cortex-a75']],
 110         ['0xd0b', ['-mcpu=cortex-a76']],
 111         ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'], flags_part_number_n1generic],
 112         ['0xd49', ['-march=armv8.5-a+crypto+sve2'], flags_part_number_n2generic]]
 113
 114 part_number_config_cavium = [
 115         ['generic', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
 116         ['native', ['-march=native']],
 117         ['0xa1', ['-mcpu=thunderxt88'], flags_part_number_thunderx],
 118         ['0xa2', ['-mcpu=thunderxt81'], flags_part_number_thunderx],
 119         ['0xa3', ['-mcpu=thunderxt83'], flags_part_number_thunderx],
 120         ['0xaf', ['-march=armv8.1-a+crc+crypto','-mcpu=thunderx2t99'], flags_part_number_thunderx2],
 121         ['0xb2', ['-march=armv8.2-a+crc+crypto+lse','-mcpu=octeontx2'], flags_part_number_octeontx2]]
 122
 123 part_number_config_emag = [
 124         ['generic', ['-march=armv8-a+crc+crypto', '-mtune=emag']],
 125         ['native', ['-march=native']]]
 126
 127 ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
 128 implementer_generic = ['Generic armv8', flags_implementer_generic, part_number_config_arm]
 129 implementer_0x41 = ['Arm', flags_implementer_arm, part_number_config_arm]
 130 implementer_0x42 = ['Broadcom', flags_implementer_generic, part_number_config_arm]
 131 implementer_0x43 = ['Cavium', flags_implementer_cavium, part_number_config_cavium]
 132 implementer_0x44 = ['DEC', flags_implementer_generic, part_number_config_arm]
 133 implementer_0x49 = ['Infineon', flags_implementer_generic, part_number_config_arm]
 134 implementer_0x4d = ['Motorola', flags_implementer_generic, part_number_config_arm]
 135 implementer_0x4e = ['NVIDIA', flags_implementer_generic, part_number_config_arm]
 136 implementer_0x50 = ['Ampere Computing', flags_implementer_emag, part_number_config_emag]
 137 implementer_0x51 = ['Qualcomm', flags_implementer_generic, part_number_config_arm]
 138 implementer_0x53 = ['Samsung', flags_implementer_generic, part_number_config_arm]
 139 implementer_0x56 = ['Marvell ARMADA', flags_implementer_armada, part_number_config_arm]
 140 implementer_0x69 = ['Intel', flags_implementer_generic, part_number_config_arm]
 141 implementer_dpaa = ['NXP DPAA', flags_implementer_dpaa, part_number_config_arm]
 142
 143 dpdk_conf.set('RTE_ARCH_ARM', 1)
 144 dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
 145
 146 if dpdk_conf.get('RTE_ARCH_32')
 147         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
 148         dpdk_conf.set('RTE_ARCH_ARMv7', 1)
 149         # the minimum architecture supported, armv7-a, needs the following,
 150         # mk/machine/armv7a/rte.vars.mk sets it too
 151         machine_args += '-mfpu=neon'
 152 else
 153         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
 154         dpdk_conf.set('RTE_ARCH_ARM64', 1)
 155
 156         implementer_config = []
 157         cmd_generic = ['generic', '', '', 'generic', '']
 158         cmd_output = cmd_generic # Set generic by default
 159         machine_args = [] # Clear previous machine args
 160         if arm_force_default_march and not meson.is_cross_build()
 161                 implementer_config = implementer_generic
 162                 part_number = 'generic'
 163         elif not meson.is_cross_build()
 164                 # The script returns ['Implementer', 'Variant', 'Architecture',
 165                 # 'Primary Part number', 'Revision']
 166                 detect_vendor = find_program(join_paths(
 167                                 meson.current_source_dir(), 'armv8_machine.py'))
 168                 cmd = run_command(detect_vendor.path())
 169                 if cmd.returncode() == 0
 170                         cmd_output = cmd.stdout().to_lower().strip().split(' ')
 171                 endif
 172                 # Set to generic if variable is not found
 173                 implementer_config = get_variable('implementer_' + cmd_output[0], ['generic'])
 174                 if implementer_config[0] == 'generic'
 175                         implementer_config = implementer_generic
 176                         cmd_output = cmd_generic
 177                 endif
 178                 part_number = cmd_output[3]
 179                 if arm_force_native_march == true
 180                         part_number = 'native'
 181                 endif
 182         else
 183                 implementer_id = meson.get_cross_property('implementer_id', 'generic')
 184                 part_number = meson.get_cross_property('part_number', 'generic')
 185                 implementer_config = get_variable('implementer_' + implementer_id)
 186         endif
 187
 188         # Apply Common Defaults. These settings may be overwritten by machine
 189         # settings later.
 190         foreach flag: flags_common
 191                 if flag.length() > 0
 192                         dpdk_conf.set(flag[0], flag[1])
 193                 endif
 194         endforeach
 195
 196         message('Implementer : ' + implementer_config[0])
 197         foreach flag: implementer_config[1]
 198                 if flag.length() > 0
 199                         dpdk_conf.set(flag[0], flag[1])
 200                 endif
 201         endforeach
 202
 203         foreach marg: implementer_config[2]
 204                 if marg[0] == part_number
 205                         foreach flag: marg[1]
 206                                 if cc.has_argument(flag)
 207                                         machine_args += flag
 208                                 endif
 209                         endforeach
 210                         # Apply any extra machine specific flags.
 211                         foreach flag: marg.get(2, flags_part_number_default)
 212                                 if flag.length() > 0
 213                                         dpdk_conf.set(flag[0], flag[1])
 214                                 endif
 215                         endforeach
 216                 endif
 217         endforeach
 218 endif
 219 message(machine_args)
 220
 221 if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
 222     cc.get_define('__aarch64__', args: machine_args) != '')
 223         compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
 224 endif
 225
 226 if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
 227         compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
 228 endif
 229
 230 if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
 231         compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
 232         'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
 233 endif