build: remove meson warning for Arm
[dpdk.git] / config / arm / meson.build
1 # SPDX-License-Identifier: BSD-3-Clause
2 # Copyright(c) 2017 Intel Corporation.
3 # Copyright(c) 2017 Cavium, Inc
4
5 # for checking defines we need to use the correct compiler flags
6 march_opt = '-march=@0@'.format(machine)
7
8 arm_force_native_march = false
9
10 machine_args_generic = [
11         ['default', ['-march=armv8-a+crc+crypto']],
12         ['native', ['-march=native']],
13         ['0xd03', ['-mcpu=cortex-a53']],
14         ['0xd04', ['-mcpu=cortex-a35']],
15         ['0xd05', ['-mcpu=cortex-a55']],
16         ['0xd07', ['-mcpu=cortex-a57']],
17         ['0xd08', ['-mcpu=cortex-a72']],
18         ['0xd09', ['-mcpu=cortex-a73']],
19         ['0xd0a', ['-mcpu=cortex-a75']],
20         ['0xd0b', ['-mcpu=cortex-a76']],
21 ]
22 machine_args_cavium = [
23         ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
24         ['native', ['-march=native']],
25         ['0xa1', ['-mcpu=thunderxt88']],
26         ['0xa2', ['-mcpu=thunderxt81']],
27         ['0xa3', ['-mcpu=thunderxt83']]]
28
29 flags_common_default = [
30         # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
31         # to determine the best threshold in code. Refer to notes in source file
32         # (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info.
33         ['RTE_ARCH_ARM64_MEMCPY', false],
34         #       ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
35         #       ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
36         # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
37         # strong reasons.
38         #       ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false],
39         #       ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
40         #       ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
41
42         ['RTE_LIBRTE_FM10K_PMD', false],
43         ['RTE_LIBRTE_SFC_EFX_PMD', false],
44         ['RTE_LIBRTE_AVP_PMD', false],
45
46         ['RTE_SCHED_VECTOR', false],
47 ]
48
49 flags_generic = [
50         ['RTE_MACHINE', '"armv8a"'],
51         ['RTE_MAX_LCORE', 256],
52         ['RTE_USE_C11_MEM_MODEL', true],
53         ['RTE_CACHE_LINE_SIZE', 128]]
54 flags_cavium = [
55         ['RTE_MACHINE', '"thunderx"'],
56         ['RTE_CACHE_LINE_SIZE', 128],
57         ['RTE_MAX_NUMA_NODES', 2],
58         ['RTE_MAX_LCORE', 96],
59         ['RTE_MAX_VFIO_GROUPS', 128],
60         ['RTE_USE_C11_MEM_MODEL', false]]
61 flags_dpaa = [
62         ['RTE_MACHINE', '"dpaa"'],
63         ['RTE_USE_C11_MEM_MODEL', true],
64         ['RTE_CACHE_LINE_SIZE', 64],
65         ['RTE_MAX_NUMA_NODES', 1],
66         ['RTE_MAX_LCORE', 16]]
67 flags_dpaa2 = [
68         ['RTE_MACHINE', '"dpaa2"'],
69         ['RTE_USE_C11_MEM_MODEL', true],
70         ['RTE_CACHE_LINE_SIZE', 64],
71         ['RTE_MAX_NUMA_NODES', 1],
72         ['RTE_MAX_LCORE', 16],
73         ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]]
74
75 ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
76 impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
77 impl_0x41 = ['Arm', flags_generic, machine_args_generic]
78 impl_0x42 = ['Broadcom', flags_generic, machine_args_generic]
79 impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
80 impl_0x44 = ['DEC', flags_generic, machine_args_generic]
81 impl_0x49 = ['Infineon', flags_generic, machine_args_generic]
82 impl_0x4d = ['Motorola', flags_generic, machine_args_generic]
83 impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic]
84 impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic]
85 impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic]
86 impl_0x53 = ['Samsung', flags_generic, machine_args_generic]
87 impl_0x56 = ['Marvell', flags_generic, machine_args_generic]
88 impl_0x69 = ['Intel', flags_generic, machine_args_generic]
89 impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic]
90 impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic]
91
92 dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
93
94 if not dpdk_conf.get('RTE_ARCH_64')
95         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
96         dpdk_conf.set('RTE_ARCH_ARM', 1)
97         dpdk_conf.set('RTE_ARCH_ARMv7', 1)
98         # the minimum architecture supported, armv7-a, needs the following,
99         # mk/machine/armv7a/rte.vars.mk sets it too
100         machine_args += '-mfpu=neon'
101 else
102         dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
103         dpdk_conf.set('RTE_ARCH_ARM64', 1)
104
105         machine = []
106         cmd_generic = ['generic', '', '', 'default', '']
107         cmd_output = cmd_generic # Set generic by default
108         machine_args = [] # Clear previous machine args
109         if not meson.is_cross_build()
110                 # The script returns ['Implementer', 'Variant', 'Architecture',
111                 # 'Primary Part number', 'Revision']
112                 detect_vendor = find_program(join_paths(
113                                 meson.current_source_dir(), 'armv8_machine.py'))
114                 cmd = run_command(detect_vendor.path())
115                 if cmd.returncode() == 0
116                         cmd_output = cmd.stdout().to_lower().strip().split(' ')
117                 endif
118                 # Set to generic if variable is not found
119                 machine = get_variable('impl_' + cmd_output[0], ['generic'])
120                 if machine[0] == 'generic'
121                         machine = impl_generic
122                         cmd_output = cmd_generic
123                 endif
124                 impl_pn = cmd_output[3]
125                 if arm_force_native_march == true
126                         impl_pn = 'native'
127                 endif
128         else
129                 impl_id = meson.get_cross_property('implementor_id', 'generic')
130                 impl_pn = meson.get_cross_property('implementor_pn', 'default')
131                 machine = get_variable('impl_' + impl_id)
132         endif
133
134         # Apply Common Defaults. These settings may be overwritten by machine
135         # settings later.
136         foreach flag: flags_common_default
137                 if flag.length() > 0
138                         dpdk_conf.set(flag[0], flag[1])
139                 endif
140         endforeach
141
142         message('Implementer : ' + machine[0])
143         foreach flag: machine[1]
144                 if flag.length() > 0
145                         dpdk_conf.set(flag[0], flag[1])
146                 endif
147         endforeach
148         # Primary part number based mcpu flags are supported
149         # for gcc versions > 7
150         if cc.version().version_compare(
151                         '<7.0') or cmd_output.length() == 0
152                 if not meson.is_cross_build() and arm_force_native_march == true
153                         impl_pn = 'native'
154                 else
155                         impl_pn = 'default'
156                 endif
157         endif
158         foreach marg: machine[2]
159                 if marg[0] == impl_pn
160                         foreach f: marg[1]
161                                 machine_args += f
162                         endforeach
163                 endif
164         endforeach
165 endif
166 message(machine_args)
167
168 if (cc.get_define('__ARM_NEON', args: machine_args) != '' or
169     cc.get_define('__aarch64__', args: machine_args) != '')
170         dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
171         compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
172 endif
173
174 if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
175         dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
176         compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
177 endif
178
179 if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
180         dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
181         dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
182         dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
183         dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
184         compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
185         'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
186 endif