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33 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
34 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
35 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
36 virtual functions (VF) in SR-IOV context.
38 Information and documentation about these adapters can be found on the
39 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
40 `Mellanox community <http://community.mellanox.com/welcome>`__.
42 There is also a `section dedicated to this poll mode driver
43 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
47 Due to external dependencies, this driver is disabled by default. It must
48 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
51 Implementation details
52 ----------------------
54 Besides its dependency on libibverbs (that implies libmlx5 and associated
55 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
56 operations such as querying/updating the MTU and flow control parameters.
58 For security reasons and robustness, this driver only deals with virtual
59 memory addresses. The way resources allocations are handled by the kernel
60 combined with hardware specifications that allow it to handle virtual memory
61 addresses directly ensure that DPDK applications cannot access random
62 physical memory (or memory that does not belong to the current process).
64 This capability allows the PMD to coexist with kernel network interfaces
65 which remain functional, although they stop receiving unicast packets as
66 long as they share the same MAC address.
68 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
74 - Multiple TX and RX queues.
75 - Support for scattered TX and RX frames.
76 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
77 - Several RSS hash keys, one for each flow type.
78 - Configurable RETA table.
79 - Support for multiple MAC addresses.
83 - RX CRC stripping configuration.
85 - Multicast promiscuous mode.
86 - Hardware checksum offloads.
87 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
90 - Secondary process TX is supported.
91 - KVM and VMware ESX SR-IOV modes are supported.
92 - RSS hash result is supported.
98 - Inner RSS for VXLAN frames is not supported yet.
99 - Port statistics through software counters only.
100 - Hardware checksum offloads for VXLAN inner header are not supported yet.
101 - Secondary process RX is not supported.
109 These options can be modified in the ``.config`` file.
111 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
113 Toggle compilation of librte_pmd_mlx5 itself.
115 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
117 Toggle debugging code and stricter compilation flags. Enabling this option
118 adds additional run-time checks and debugging messages at the cost of
121 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
123 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
124 which buffers are to be transmitted must be associated to memory regions
125 (MRs). This is a slow operation that must be cached.
127 This value is always 1 for RX queues since they use a single MP.
129 Environment variables
130 ~~~~~~~~~~~~~~~~~~~~~
132 - ``MLX5_PMD_ENABLE_PADDING``
134 Enables HW packet padding in PCI bus transactions.
136 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
137 bytes are written to the PCI bus. Enabling padding makes such packets
140 In cases where PCI bandwidth is the bottleneck, padding can improve
143 This is disabled by default since this can also decrease performance for
144 unaligned packet sizes.
146 Run-time configuration
147 ~~~~~~~~~~~~~~~~~~~~~~
149 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
150 because it is affected by their state. Forcing them down prevents packets
153 - **ethtool** operations on related kernel interfaces also affect the PMD.
155 - ``rxq_cqe_comp_en`` parameter [int]
157 A nonzero value enables the compression of CQE on RX side. This feature
158 allows to save PCI bandwidth and improve performance at the cost of a
159 slightly higher CPU usage. Enabled by default.
163 - x86_64 with ConnectX4 and ConnectX4 LX
164 - Power8 with ConnectX4 LX
166 - ``txq_inline`` parameter [int]
168 Amount of data to be inlined during TX operations. Improves latency.
169 Can improve PPS performance when PCI back pressure is detected and may be
170 useful for scenarios involving heavy traffic on many queues.
172 It is not enabled by default (set to 0) since the additional software
173 logic necessary to handle this mode can lower performance when back
174 pressure is not expected.
176 - ``txqs_min_inline`` parameter [int]
178 Enable inline send only when the number of TX queues is greater or equal
181 This option should be used in combination with ``txq_inline`` above.
183 - ``txq_mpw_en`` parameter [int]
185 A nonzero value enables multi-packet send. This feature allows the TX
186 burst function to pack up to five packets in two descriptors in order to
187 save PCI bandwidth and improve performance at the cost of a slightly
190 This option cannot be used in conjunction with ``tso`` below. When ``tso``
191 is set, ``txq_mpw_en`` is disabled.
193 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
194 families of adapters. Enabled by default.
196 - ``tso`` parameter [int]
198 A nonzero value enables hardware TSO.
199 When hardware TSO is enabled, packets marked with TCP segmentation
200 offload will be divided into segments by the hardware.
207 This driver relies on external libraries and kernel drivers for resources
208 allocations and initialization. The following dependencies are not part of
209 DPDK and must be installed separately:
213 User space Verbs framework used by librte_pmd_mlx5. This library provides
214 a generic interface between the kernel and low-level user space drivers
217 It allows slow and privileged operations (context initialization, hardware
218 resources allocations) to be managed by the kernel and fast operations to
219 never leave user space.
223 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
224 devices, it is automatically loaded by libibverbs.
226 This library basically implements send/receive calls to the hardware
229 - **Kernel modules** (mlnx-ofed-kernel)
231 They provide the kernel-side Verbs API and low level device drivers that
232 manage actual hardware initialization and resources sharing with user
235 Unlike most other PMDs, these modules must remain loaded and bound to
238 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
239 devices and related Ethernet kernel network devices.
240 - mlx5_ib: InifiniBand device driver.
241 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
243 - **Firmware update**
245 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
248 Because each release provides new features, these updates must be applied to
249 match the kernel modules and libraries they come with.
253 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
256 Currently supported by DPDK:
258 - Mellanox OFED version: **4.0-1.0.1.0**
261 - ConnectX-4: **12.18.1000**
262 - ConnectX-4 Lx: **14.18.1000**
263 - ConnectX-5: **16.18.1000**
264 - ConnectX-5 Ex: **16.18.1000**
266 Getting Mellanox OFED
267 ~~~~~~~~~~~~~~~~~~~~~
269 While these libraries and kernel modules are available on OpenFabrics
270 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
271 managers on most distributions, this PMD requires Ethernet extensions that
272 may not be supported at the moment (this is a work in progress).
275 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
276 includes the necessary support and should be used in the meantime. For DPDK,
277 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
278 required from that distribution.
282 Several versions of Mellanox OFED are available. Installing the version
283 this DPDK release was developed and tested against is strongly
284 recommended. Please check the `prerequisites`_.
289 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
290 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
291 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
292 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
293 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
294 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
295 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
296 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
297 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
298 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
299 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
300 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
301 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
302 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
303 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
304 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
305 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
306 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
307 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
312 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
313 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
315 Since ``testpmd`` defaults to IP RSS mode and there is currently no
316 command-line parameter to enable additional protocols (UDP and TCP as well
317 as IP), the following commands must be entered from its CLI to get the same
318 behavior as librte_pmd_mlx4:
320 .. code-block:: console
323 > port config all rss all
329 This section demonstrates how to launch **testpmd** with Mellanox
330 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
332 #. Load the kernel modules:
334 .. code-block:: console
336 modprobe -a ib_uverbs mlx5_core mlx5_ib
338 Alternatively if MLNX_OFED is fully installed, the following script can
341 .. code-block:: console
343 /etc/init.d/openibd restart
347 User space I/O kernel modules (uio and igb_uio) are not used and do
348 not have to be loaded.
350 #. Make sure Ethernet interfaces are in working order and linked to kernel
351 verbs. Related sysfs entries should be present:
353 .. code-block:: console
355 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
359 .. code-block:: console
366 #. Optionally, retrieve their PCI bus addresses for whitelisting:
368 .. code-block:: console
371 for intf in eth2 eth3 eth4 eth5;
373 (cd "/sys/class/net/${intf}/device/" && pwd -P);
376 sed -n 's,.*/\(.*\),-w \1,p'
380 .. code-block:: console
387 #. Request huge pages:
389 .. code-block:: console
391 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
393 #. Start testpmd with basic parameters:
395 .. code-block:: console
397 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
401 .. code-block:: console
404 EAL: PCI device 0000:05:00.0 on NUMA socket 0
405 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
406 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
407 PMD: librte_pmd_mlx5: 1 port(s) detected
408 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
409 EAL: PCI device 0000:05:00.1 on NUMA socket 0
410 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
411 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
412 PMD: librte_pmd_mlx5: 1 port(s) detected
413 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
414 EAL: PCI device 0000:06:00.0 on NUMA socket 0
415 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
416 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
417 PMD: librte_pmd_mlx5: 1 port(s) detected
418 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
419 EAL: PCI device 0000:06:00.1 on NUMA socket 0
420 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
421 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
422 PMD: librte_pmd_mlx5: 1 port(s) detected
423 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
424 Interactive-mode selected
425 Configuring Port 0 (socket 0)
426 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
427 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
428 Port 0: E4:1D:2D:E7:0C:FE
429 Configuring Port 1 (socket 0)
430 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
431 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
432 Port 1: E4:1D:2D:E7:0C:FF
433 Configuring Port 2 (socket 0)
434 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
435 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
436 Port 2: E4:1D:2D:E7:0C:FA
437 Configuring Port 3 (socket 0)
438 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
439 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
440 Port 3: E4:1D:2D:E7:0C:FB
441 Checking link statuses...
442 Port 0 Link Up - speed 40000 Mbps - full-duplex
443 Port 1 Link Up - speed 40000 Mbps - full-duplex
444 Port 2 Link Up - speed 10000 Mbps - full-duplex
445 Port 3 Link Up - speed 10000 Mbps - full-duplex