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41 #include <rte_branch_prediction.h>
45 #include "bman_priv.h"
46 #include <sys/ioctl.h>
49 * Global variables of the max portal/pool number this bman version supported
59 static __thread int fd = -1;
60 static __thread struct bm_portal_config pcfg;
61 static __thread struct dpaa_ioctl_portal_map map = {
62 .type = dpaa_portal_bman
65 static int fsl_bman_portal_init(uint32_t idx, int is_shared)
69 struct dpaa_ioctl_irq_map irq_map;
71 /* Verify the thread's cpu-affinity */
72 ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
75 error(0, ret, "pthread_getaffinity_np()");
79 for (loop = 0; loop < CPU_SETSIZE; loop++)
80 if (CPU_ISSET(loop, &cpuset)) {
82 pr_err("Thread is not affine to 1 cpu");
88 pr_err("Bug in getaffinity handling!");
91 /* Allocate and map a bman portal */
93 ret = process_portal_map(&map);
95 error(0, ret, "process_portal_map()");
98 /* Make the portal's cache-[enabled|inhibited] regions */
99 pcfg.addr_virt[DPAA_PORTAL_CE] = map.addr.cena;
100 pcfg.addr_virt[DPAA_PORTAL_CI] = map.addr.cinh;
101 pcfg.is_shared = is_shared;
102 pcfg.index = map.index;
103 bman_depletion_fill(&pcfg.mask);
105 fd = open(BMAN_PORTAL_IRQ_PATH, O_RDONLY);
107 pr_err("BMan irq init failed");
108 process_portal_unmap(&map.addr);
111 /* Use the IRQ FD as a unique IRQ number */
114 /* Set the IRQ number */
115 irq_map.type = dpaa_portal_bman;
116 irq_map.portal_cinh = map.addr.cinh;
117 process_portal_irq_map(fd, &irq_map);
121 static int fsl_bman_portal_finish(void)
125 process_portal_irq_unmap(fd);
127 ret = process_portal_unmap(&map.addr);
129 error(0, ret, "process_portal_unmap()");
133 int bman_thread_init(void)
135 /* Convert from contiguous/virtual cpu numbering to real cpu when
136 * calling into the code that is dependent on the device naming.
138 return fsl_bman_portal_init(QBMAN_ANY_PORTAL_IDX, 0);
141 int bman_thread_finish(void)
143 return fsl_bman_portal_finish();
146 void bman_thread_irq(void)
148 qbman_invoke_irq(pcfg.irq);
149 /* Now we need to uninhibit interrupts. This is the only code outside
150 * the regular portal driver that manipulates any portal register, so
151 * rather than breaking that encapsulation I am simply hard-coding the
152 * offset to the inhibit register here.
154 out_be32(pcfg.addr_virt[DPAA_PORTAL_CI] + 0xe0c, 0);
157 int bman_init_ccsr(const struct device_node *node)
159 static int ccsr_map_fd;
161 const uint32_t *bman_addr;
164 bman_addr = of_get_address(node, 0, ®s_size, NULL);
166 pr_err("of_get_address cannot return BMan address");
169 phys_addr = of_translate_address(node, bman_addr);
171 pr_err("of_translate_address failed");
175 ccsr_map_fd = open(BMAN_CCSR_MAP, O_RDWR);
176 if (unlikely(ccsr_map_fd < 0)) {
177 pr_err("Can not open /dev/mem for BMan CCSR map");
181 bman_ccsr_map = mmap(NULL, regs_size, PROT_READ |
182 PROT_WRITE, MAP_SHARED, ccsr_map_fd, phys_addr);
183 if (bman_ccsr_map == MAP_FAILED) {
184 pr_err("Can not map BMan CCSR base Bman: "
185 "0x%x Phys: 0x%lx size 0x%lx",
186 *bman_addr, phys_addr, regs_size);
193 int bman_global_init(void)
195 const struct device_node *dt_node;
200 /* Use the device-tree to determine IP revision until something better
203 dt_node = of_find_compatible_node(NULL, NULL, "fsl,bman-portal");
205 pr_err("No bman portals available for any CPU\n");
208 if (of_device_is_compatible(dt_node, "fsl,bman-portal-1.0") ||
209 of_device_is_compatible(dt_node, "fsl,bman-portal-1.0.0")) {
210 bman_ip_rev = BMAN_REV10;
212 } else if (of_device_is_compatible(dt_node, "fsl,bman-portal-2.0") ||
213 of_device_is_compatible(dt_node, "fsl,bman-portal-2.0.8")) {
214 bman_ip_rev = BMAN_REV20;
216 } else if (of_device_is_compatible(dt_node, "fsl,bman-portal-2.1.0") ||
217 of_device_is_compatible(dt_node, "fsl,bman-portal-2.1.1") ||
218 of_device_is_compatible(dt_node, "fsl,bman-portal-2.1.2") ||
219 of_device_is_compatible(dt_node, "fsl,bman-portal-2.1.3")) {
220 bman_ip_rev = BMAN_REV21;
223 pr_warn("unknown BMan version in portal node,default "
225 bman_ip_rev = BMAN_REV10;
230 pr_err("Unknown bman portal version\n");
234 const struct device_node *dn = of_find_compatible_node(NULL,
237 pr_err("No bman device node available");
239 if (bman_init_ccsr(dn))
240 pr_err("BMan CCSR map failed.");
247 #define BMAN_POOL_CONTENT(n) (0x0600 + ((n) * 0x04))
248 u32 bm_pool_free_buffers(u32 bpid)
250 return in_be32(bman_ccsr_map + BMAN_POOL_CONTENT(bpid));
253 static u32 __generate_thresh(u32 val, int roundup)
255 u32 e = 0; /* co-efficient, exponent */
262 if (roundup && oddbit)
265 DPAA_ASSERT(e < 0x10);
266 return (val | (e << 8));
269 #define POOL_SWDET(n) (0x0000 + ((n) * 0x04))
270 #define POOL_HWDET(n) (0x0100 + ((n) * 0x04))
271 #define POOL_SWDXT(n) (0x0200 + ((n) * 0x04))
272 #define POOL_HWDXT(n) (0x0300 + ((n) * 0x04))
273 int bm_pool_set(u32 bpid, const u32 *thresholds)
277 if (bpid >= bman_pool_max)
279 out_be32(bman_ccsr_map + POOL_SWDET(bpid),
280 __generate_thresh(thresholds[0], 0));
281 out_be32(bman_ccsr_map + POOL_SWDXT(bpid),
282 __generate_thresh(thresholds[1], 1));
283 out_be32(bman_ccsr_map + POOL_HWDET(bpid),
284 __generate_thresh(thresholds[2], 0));
285 out_be32(bman_ccsr_map + POOL_HWDXT(bpid),
286 __generate_thresh(thresholds[3], 1));
290 #define BMAN_LOW_DEFAULT_THRESH 0x40
291 #define BMAN_HIGH_DEFAULT_THRESH 0x80
292 int bm_pool_set_hw_threshold(u32 bpid, const u32 low_thresh,
293 const u32 high_thresh)
297 if (bpid >= bman_pool_max)
299 if (low_thresh && high_thresh) {
300 out_be32(bman_ccsr_map + POOL_HWDET(bpid),
301 __generate_thresh(low_thresh, 0));
302 out_be32(bman_ccsr_map + POOL_HWDXT(bpid),
303 __generate_thresh(high_thresh, 1));
305 out_be32(bman_ccsr_map + POOL_HWDET(bpid),
306 __generate_thresh(BMAN_LOW_DEFAULT_THRESH, 0));
307 out_be32(bman_ccsr_map + POOL_HWDXT(bpid),
308 __generate_thresh(BMAN_HIGH_DEFAULT_THRESH, 1));