drivers/bus/dpaa/base/qbman/qman_driver.c

   1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
   2  *
   3  * Copyright 2008-2016 Freescale Semiconductor Inc.
   4  * Copyright 2017 NXP
   5  *
   6  */
   7
   8 #include <fsl_usd.h>
   9 #include <process.h>
  10 #include "qman_priv.h"
  11 #include <sys/ioctl.h>
  12 #include <rte_branch_prediction.h>
  13
  14 /* Global variable containing revision id (even on non-control plane systems
  15  * where CCSR isn't available).
  16  */
  17 u16 qman_ip_rev;
  18 u16 qm_channel_pool1 = QMAN_CHANNEL_POOL1;
  19 u16 qm_channel_caam = QMAN_CHANNEL_CAAM;
  20 u16 qm_channel_pme = QMAN_CHANNEL_PME;
  21
  22 /* Ccsr map address to access ccsrbased register */
  23 void *qman_ccsr_map;
  24 /* The qman clock frequency */
  25 u32 qman_clk;
  26
  27 static __thread int qmfd = -1;
  28 static __thread struct qm_portal_config qpcfg;
  29 static __thread struct dpaa_ioctl_portal_map map = {
  30         .type = dpaa_portal_qman
  31 };
  32
  33 static int fsl_qman_portal_init(uint32_t index, int is_shared)
  34 {
  35         cpu_set_t cpuset;
  36         struct qman_portal *portal;
  37         int loop, ret;
  38         struct dpaa_ioctl_irq_map irq_map;
  39
  40         /* Verify the thread's cpu-affinity */
  41         ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
  42                                      &cpuset);
  43         if (ret) {
  44                 error(0, ret, "pthread_getaffinity_np()");
  45                 return ret;
  46         }
  47         qpcfg.cpu = -1;
  48         for (loop = 0; loop < CPU_SETSIZE; loop++)
  49                 if (CPU_ISSET(loop, &cpuset)) {
  50                         if (qpcfg.cpu != -1) {
  51                                 pr_err("Thread is not affine to 1 cpu\n");
  52                                 return -EINVAL;
  53                         }
  54                         qpcfg.cpu = loop;
  55                 }
  56         if (qpcfg.cpu == -1) {
  57                 pr_err("Bug in getaffinity handling!\n");
  58                 return -EINVAL;
  59         }
  60
  61         /* Allocate and map a qman portal */
  62         map.index = index;
  63         ret = process_portal_map(&map);
  64         if (ret) {
  65                 error(0, ret, "process_portal_map()");
  66                 return ret;
  67         }
  68         qpcfg.channel = map.channel;
  69         qpcfg.pools = map.pools;
  70         qpcfg.index = map.index;
  71
  72         /* Make the portal's cache-[enabled|inhibited] regions */
  73         qpcfg.addr_virt[DPAA_PORTAL_CE] = map.addr.cena;
  74         qpcfg.addr_virt[DPAA_PORTAL_CI] = map.addr.cinh;
  75
  76         qmfd = open(QMAN_PORTAL_IRQ_PATH, O_RDONLY);
  77         if (qmfd == -1) {
  78                 pr_err("QMan irq init failed\n");
  79                 process_portal_unmap(&map.addr);
  80                 return -EBUSY;
  81         }
  82
  83         qpcfg.is_shared = is_shared;
  84         qpcfg.node = NULL;
  85         qpcfg.irq = qmfd;
  86
  87         portal = qman_create_affine_portal(&qpcfg, NULL, 0);
  88         if (!portal) {
  89                 pr_err("Qman portal initialisation failed (%d)\n",
  90                        qpcfg.cpu);
  91                 process_portal_unmap(&map.addr);
  92                 return -EBUSY;
  93         }
  94
  95         irq_map.type = dpaa_portal_qman;
  96         irq_map.portal_cinh = map.addr.cinh;
  97         process_portal_irq_map(qmfd, &irq_map);
  98         return 0;
  99 }
 100
 101 static int fsl_qman_portal_finish(void)
 102 {
 103         __maybe_unused const struct qm_portal_config *cfg;
 104         int ret;
 105
 106         process_portal_irq_unmap(qmfd);
 107
 108         cfg = qman_destroy_affine_portal(NULL);
 109         DPAA_BUG_ON(cfg != &qpcfg);
 110         ret = process_portal_unmap(&map.addr);
 111         if (ret)
 112                 error(0, ret, "process_portal_unmap()");
 113         return ret;
 114 }
 115
 116 int qman_thread_init(void)
 117 {
 118         /* Convert from contiguous/virtual cpu numbering to real cpu when
 119          * calling into the code that is dependent on the device naming.
 120          */
 121         return fsl_qman_portal_init(QBMAN_ANY_PORTAL_IDX, 0);
 122 }
 123
 124 int qman_thread_finish(void)
 125 {
 126         return fsl_qman_portal_finish();
 127 }
 128
 129 void qman_thread_irq(void)
 130 {
 131         qbman_invoke_irq(qpcfg.irq);
 132
 133         /* Now we need to uninhibit interrupts. This is the only code outside
 134          * the regular portal driver that manipulates any portal register, so
 135          * rather than breaking that encapsulation I am simply hard-coding the
 136          * offset to the inhibit register here.
 137          */
 138         out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0xe0c, 0);
 139 }
 140
 141 struct qman_portal *fsl_qman_portal_create(void)
 142 {
 143         cpu_set_t cpuset;
 144         struct qman_portal *res;
 145
 146         struct qm_portal_config *q_pcfg;
 147         int loop, ret;
 148         struct dpaa_ioctl_irq_map irq_map;
 149         struct dpaa_ioctl_portal_map q_map = {0};
 150         int q_fd;
 151
 152         q_pcfg = kzalloc((sizeof(struct qm_portal_config)), 0);
 153         if (!q_pcfg) {
 154                 error(0, -1, "q_pcfg kzalloc failed");
 155                 return NULL;
 156         }
 157
 158         /* Verify the thread's cpu-affinity */
 159         ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
 160                                      &cpuset);
 161         if (ret) {
 162                 error(0, ret, "pthread_getaffinity_np()");
 163                 return NULL;
 164         }
 165
 166         q_pcfg->cpu = -1;
 167         for (loop = 0; loop < CPU_SETSIZE; loop++)
 168                 if (CPU_ISSET(loop, &cpuset)) {
 169                         if (q_pcfg->cpu != -1) {
 170                                 pr_err("Thread is not affine to 1 cpu\n");
 171                                 return NULL;
 172                         }
 173                         q_pcfg->cpu = loop;
 174                 }
 175         if (q_pcfg->cpu == -1) {
 176                 pr_err("Bug in getaffinity handling!\n");
 177                 return NULL;
 178         }
 179
 180         /* Allocate and map a qman portal */
 181         q_map.type = dpaa_portal_qman;
 182         q_map.index = QBMAN_ANY_PORTAL_IDX;
 183         ret = process_portal_map(&q_map);
 184         if (ret) {
 185                 error(0, ret, "process_portal_map()");
 186                 return NULL;
 187         }
 188         q_pcfg->channel = q_map.channel;
 189         q_pcfg->pools = q_map.pools;
 190         q_pcfg->index = q_map.index;
 191
 192         /* Make the portal's cache-[enabled|inhibited] regions */
 193         q_pcfg->addr_virt[DPAA_PORTAL_CE] = q_map.addr.cena;
 194         q_pcfg->addr_virt[DPAA_PORTAL_CI] = q_map.addr.cinh;
 195
 196         q_fd = open(QMAN_PORTAL_IRQ_PATH, O_RDONLY);
 197         if (q_fd == -1) {
 198                 pr_err("QMan irq init failed\n");
 199                 goto err1;
 200         }
 201
 202         q_pcfg->irq = q_fd;
 203
 204         res = qman_create_affine_portal(q_pcfg, NULL, true);
 205         if (!res) {
 206                 pr_err("Qman portal initialisation failed (%d)\n",
 207                        q_pcfg->cpu);
 208                 goto err2;
 209         }
 210
 211         irq_map.type = dpaa_portal_qman;
 212         irq_map.portal_cinh = q_map.addr.cinh;
 213         process_portal_irq_map(q_fd, &irq_map);
 214
 215         return res;
 216 err2:
 217         close(q_fd);
 218 err1:
 219         process_portal_unmap(&q_map.addr);
 220         return NULL;
 221 }
 222
 223 int fsl_qman_portal_destroy(struct qman_portal *qp)
 224 {
 225         const struct qm_portal_config *cfg;
 226         struct dpaa_portal_map addr;
 227         int ret;
 228
 229         cfg = qman_destroy_affine_portal(qp);
 230         kfree(qp);
 231
 232         process_portal_irq_unmap(cfg->irq);
 233
 234         addr.cena = cfg->addr_virt[DPAA_PORTAL_CE];
 235         addr.cinh = cfg->addr_virt[DPAA_PORTAL_CI];
 236
 237         ret = process_portal_unmap(&addr);
 238         if (ret)
 239                 pr_err("process_portal_unmap() (%d)\n", ret);
 240
 241         kfree((void *)cfg);
 242
 243         return ret;
 244 }
 245
 246 int qman_global_init(void)
 247 {
 248         const struct device_node *dt_node;
 249         size_t lenp;
 250         const u32 *chanid;
 251         static int ccsr_map_fd;
 252         const uint32_t *qman_addr;
 253         uint64_t phys_addr;
 254         uint64_t regs_size;
 255         const u32 *clk;
 256
 257         static int done;
 258
 259         if (done)
 260                 return -EBUSY;
 261
 262         /* Use the device-tree to determine IP revision until something better
 263          * is devised.
 264          */
 265         dt_node = of_find_compatible_node(NULL, NULL, "fsl,qman-portal");
 266         if (!dt_node) {
 267                 pr_err("No qman portals available for any CPU\n");
 268                 return -ENODEV;
 269         }
 270         if (of_device_is_compatible(dt_node, "fsl,qman-portal-1.0") ||
 271             of_device_is_compatible(dt_node, "fsl,qman-portal-1.0.0"))
 272                 pr_err("QMan rev1.0 on P4080 rev1 is not supported!\n");
 273         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-1.1") ||
 274                  of_device_is_compatible(dt_node, "fsl,qman-portal-1.1.0"))
 275                 qman_ip_rev = QMAN_REV11;
 276         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-1.2") ||
 277                  of_device_is_compatible(dt_node, "fsl,qman-portal-1.2.0"))
 278                 qman_ip_rev = QMAN_REV12;
 279         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-2.0") ||
 280                  of_device_is_compatible(dt_node, "fsl,qman-portal-2.0.0"))
 281                 qman_ip_rev = QMAN_REV20;
 282         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-3.0.0") ||
 283                  of_device_is_compatible(dt_node, "fsl,qman-portal-3.0.1"))
 284                 qman_ip_rev = QMAN_REV30;
 285         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.0") ||
 286                  of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.1") ||
 287                 of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.2") ||
 288                 of_device_is_compatible(dt_node, "fsl,qman-portal-3.1.3"))
 289                 qman_ip_rev = QMAN_REV31;
 290         else if (of_device_is_compatible(dt_node, "fsl,qman-portal-3.2.0") ||
 291                  of_device_is_compatible(dt_node, "fsl,qman-portal-3.2.1"))
 292                 qman_ip_rev = QMAN_REV32;
 293         else
 294                 qman_ip_rev = QMAN_REV11;
 295
 296         if (!qman_ip_rev) {
 297                 pr_err("Unknown qman portal version\n");
 298                 return -ENODEV;
 299         }
 300         if ((qman_ip_rev & 0xFF00) >= QMAN_REV30) {
 301                 qm_channel_pool1 = QMAN_CHANNEL_POOL1_REV3;
 302                 qm_channel_caam = QMAN_CHANNEL_CAAM_REV3;
 303                 qm_channel_pme = QMAN_CHANNEL_PME_REV3;
 304         }
 305
 306         dt_node = of_find_compatible_node(NULL, NULL, "fsl,pool-channel-range");
 307         if (!dt_node) {
 308                 pr_err("No qman pool channel range available\n");
 309                 return -ENODEV;
 310         }
 311         chanid = of_get_property(dt_node, "fsl,pool-channel-range", &lenp);
 312         if (!chanid) {
 313                 pr_err("Can not get pool-channel-range property\n");
 314                 return -EINVAL;
 315         }
 316
 317         /* get ccsr base */
 318         dt_node = of_find_compatible_node(NULL, NULL, "fsl,qman");
 319         if (!dt_node) {
 320                 pr_err("No qman device node available\n");
 321                 return -ENODEV;
 322         }
 323         qman_addr = of_get_address(dt_node, 0, &regs_size, NULL);
 324         if (!qman_addr) {
 325                 pr_err("of_get_address cannot return qman address\n");
 326                 return -EINVAL;
 327         }
 328         phys_addr = of_translate_address(dt_node, qman_addr);
 329         if (!phys_addr) {
 330                 pr_err("of_translate_address failed\n");
 331                 return -EINVAL;
 332         }
 333
 334         ccsr_map_fd = open("/dev/mem", O_RDWR);
 335         if (unlikely(ccsr_map_fd < 0)) {
 336                 pr_err("Can not open /dev/mem for qman ccsr map\n");
 337                 return ccsr_map_fd;
 338         }
 339
 340         qman_ccsr_map = mmap(NULL, regs_size, PROT_READ | PROT_WRITE,
 341                              MAP_SHARED, ccsr_map_fd, phys_addr);
 342         if (qman_ccsr_map == MAP_FAILED) {
 343                 pr_err("Can not map qman ccsr base\n");
 344                 return -EINVAL;
 345         }
 346
 347         clk = of_get_property(dt_node, "clock-frequency", NULL);
 348         if (!clk)
 349                 pr_warn("Can't find Qman clock frequency\n");
 350         else
 351                 qman_clk = be32_to_cpu(*clk);
 352
 353 #ifdef CONFIG_FSL_QMAN_FQ_LOOKUP
 354         return qman_setup_fq_lookup_table(CONFIG_FSL_QMAN_FQ_LOOKUP_MAX);
 355 #endif
 356         return 0;
 357 }