drivers/common/cnxk/roc_bphy_cgx.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef _ROC_BPHY_CGX_H_
   6 #define _ROC_BPHY_CGX_H_
   7
   8 #include <pthread.h>
   9
  10 #include "roc_api.h"
  11
  12 #define MAX_LMACS_PER_CGX 4
  13
  14 struct roc_bphy_cgx {
  15         uint64_t bar0_pa;
  16         void *bar0_va;
  17         uint64_t lmac_bmap;
  18         unsigned int id;
  19         /* serialize access to the whole structure */
  20         pthread_mutex_t lock;
  21 } __plt_cache_aligned;
  22
  23 enum roc_bphy_cgx_eth_link_speed {
  24         ROC_BPHY_CGX_ETH_LINK_SPEED_NONE,
  25         ROC_BPHY_CGX_ETH_LINK_SPEED_10M,
  26         ROC_BPHY_CGX_ETH_LINK_SPEED_100M,
  27         ROC_BPHY_CGX_ETH_LINK_SPEED_1G,
  28         ROC_BPHY_CGX_ETH_LINK_SPEED_2HG,
  29         ROC_BPHY_CGX_ETH_LINK_SPEED_5G,
  30         ROC_BPHY_CGX_ETH_LINK_SPEED_10G,
  31         ROC_BPHY_CGX_ETH_LINK_SPEED_20G,
  32         ROC_BPHY_CGX_ETH_LINK_SPEED_25G,
  33         ROC_BPHY_CGX_ETH_LINK_SPEED_40G,
  34         ROC_BPHY_CGX_ETH_LINK_SPEED_50G,
  35         ROC_BPHY_CGX_ETH_LINK_SPEED_80G,
  36         ROC_BPHY_CGX_ETH_LINK_SPEED_100G,
  37         __ROC_BPHY_CGX_ETH_LINK_SPEED_MAX
  38 };
  39
  40 enum roc_bphy_cgx_eth_link_fec {
  41         ROC_BPHY_CGX_ETH_LINK_FEC_NONE,
  42         ROC_BPHY_CGX_ETH_LINK_FEC_BASE_R,
  43         ROC_BPHY_CGX_ETH_LINK_FEC_RS,
  44         __ROC_BPHY_CGX_ETH_LINK_FEC_MAX
  45 };
  46
  47 enum roc_bphy_cgx_eth_link_mode {
  48         ROC_BPHY_CGX_ETH_LINK_MODE_SGMII_BIT,
  49         ROC_BPHY_CGX_ETH_LINK_MODE_1000_BASEX_BIT,
  50         ROC_BPHY_CGX_ETH_LINK_MODE_QSGMII_BIT,
  51         ROC_BPHY_CGX_ETH_LINK_MODE_10G_C2C_BIT,
  52         ROC_BPHY_CGX_ETH_LINK_MODE_10G_C2M_BIT,
  53         ROC_BPHY_CGX_ETH_LINK_MODE_10G_KR_BIT,
  54         ROC_BPHY_CGX_ETH_LINK_MODE_20G_C2C_BIT,
  55         ROC_BPHY_CGX_ETH_LINK_MODE_25G_C2C_BIT,
  56         ROC_BPHY_CGX_ETH_LINK_MODE_25G_C2M_BIT,
  57         ROC_BPHY_CGX_ETH_LINK_MODE_25G_2_C2C_BIT,
  58         ROC_BPHY_CGX_ETH_LINK_MODE_25G_CR_BIT,
  59         ROC_BPHY_CGX_ETH_LINK_MODE_25G_KR_BIT,
  60         ROC_BPHY_CGX_ETH_LINK_MODE_40G_C2C_BIT,
  61         ROC_BPHY_CGX_ETH_LINK_MODE_40G_C2M_BIT,
  62         ROC_BPHY_CGX_ETH_LINK_MODE_40G_CR4_BIT,
  63         ROC_BPHY_CGX_ETH_LINK_MODE_40G_KR4_BIT,
  64         ROC_BPHY_CGX_ETH_LINK_MODE_40GAUI_C2C_BIT,
  65         ROC_BPHY_CGX_ETH_LINK_MODE_50G_C2C_BIT,
  66         ROC_BPHY_CGX_ETH_LINK_MODE_50G_C2M_BIT,
  67         ROC_BPHY_CGX_ETH_LINK_MODE_50G_4_C2C_BIT,
  68         ROC_BPHY_CGX_ETH_LINK_MODE_50G_CR_BIT,
  69         ROC_BPHY_CGX_ETH_LINK_MODE_50G_KR_BIT,
  70         ROC_BPHY_CGX_ETH_LINK_MODE_80GAUI_C2C_BIT,
  71         ROC_BPHY_CGX_ETH_LINK_MODE_100G_C2C_BIT,
  72         ROC_BPHY_CGX_ETH_LINK_MODE_100G_C2M_BIT,
  73         ROC_BPHY_CGX_ETH_LINK_MODE_100G_CR4_BIT,
  74         ROC_BPHY_CGX_ETH_LINK_MODE_100G_KR4_BIT,
  75         __ROC_BPHY_CGX_ETH_LINK_MODE_MAX
  76 };
  77
  78 struct roc_bphy_cgx_link_info {
  79         bool link_up;
  80         bool full_duplex;
  81         enum roc_bphy_cgx_eth_link_speed speed;
  82         bool an;
  83         enum roc_bphy_cgx_eth_link_fec fec;
  84         enum roc_bphy_cgx_eth_link_mode mode;
  85 };
  86
  87 __roc_api int roc_bphy_cgx_dev_init(struct roc_bphy_cgx *roc_cgx);
  88 __roc_api int roc_bphy_cgx_dev_fini(struct roc_bphy_cgx *roc_cgx);
  89
  90 __roc_api int roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx,
  91                                         unsigned int lmac,
  92                                         struct roc_bphy_cgx_link_info *info);
  93 __roc_api int roc_bphy_cgx_intlbk_enable(struct roc_bphy_cgx *roc_cgx,
  94                                          unsigned int lmac);
  95 __roc_api int roc_bphy_cgx_intlbk_disable(struct roc_bphy_cgx *roc_cgx,
  96                                           unsigned int lmac);
  97 __roc_api int roc_bphy_cgx_ptp_rx_enable(struct roc_bphy_cgx *roc_cgx,
  98                                          unsigned int lmac);
  99 __roc_api int roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx,
 100                                           unsigned int lmac);
 101
 102
 103 #endif /* _ROC_BPHY_CGX_H_ */