1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
11 #include "roc_bphy_irq.h"
13 struct roc_bphy_irq_stack {
14 STAILQ_ENTRY(roc_bphy_irq_stack) entries;
20 #define ROC_BPHY_MEMZONE_NAME "roc_bphy_mz"
21 #define ROC_BPHY_CTR_DEV_PATH "/dev/otx-bphy-ctr"
23 #define ROC_BPHY_IOC_MAGIC 0xF3
24 #define ROC_BPHY_IOC_GET_BPHY_MAX_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 3, uint64_t)
25 #define ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 4, uint64_t)
27 static STAILQ_HEAD(slisthead, roc_bphy_irq_stack)
28 irq_stacks = STAILQ_HEAD_INITIALIZER(irq_stacks);
30 /* Note: it is assumed that as for now there is no multiprocess support */
31 static pthread_mutex_t stacks_mutex = PTHREAD_MUTEX_INITIALIZER;
33 struct roc_bphy_irq_chip *
34 roc_bphy_intr_init(void)
36 struct roc_bphy_irq_chip *irq_chip;
37 uint64_t max_irq, i, avail_irqs;
40 fd = open(ROC_BPHY_CTR_DEV_PATH, O_RDWR | O_SYNC);
42 plt_err("Failed to open %s", ROC_BPHY_CTR_DEV_PATH);
46 ret = ioctl(fd, ROC_BPHY_IOC_GET_BPHY_MAX_IRQ, &max_irq);
48 plt_err("Failed to get max irq number via ioctl");
52 ret = ioctl(fd, ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ, &avail_irqs);
54 plt_err("Failed to get available irqs bitmask via ioctl");
58 irq_chip = plt_zmalloc(sizeof(*irq_chip), 0);
59 if (irq_chip == NULL) {
60 plt_err("Failed to alloc irq_chip");
65 irq_chip->max_irq = max_irq;
66 irq_chip->avail_irq_bmask = avail_irqs;
68 plt_zmalloc(irq_chip->max_irq * sizeof(*irq_chip->irq_vecs), 0);
69 if (irq_chip->irq_vecs == NULL) {
70 plt_err("Failed to alloc irq_chip irq_vecs");
74 irq_chip->mz_name = plt_zmalloc(strlen(ROC_BPHY_MEMZONE_NAME) + 1, 0);
75 if (irq_chip->mz_name == NULL) {
76 plt_err("Failed to alloc irq_chip name");
79 plt_strlcpy(irq_chip->mz_name, ROC_BPHY_MEMZONE_NAME,
80 strlen(ROC_BPHY_MEMZONE_NAME) + 1);
82 for (i = 0; i < irq_chip->max_irq; i++) {
83 irq_chip->irq_vecs[i].fd = -1;
84 irq_chip->irq_vecs[i].handler_cpu = -1;
90 plt_free(irq_chip->irq_vecs);
102 roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip)
104 if (irq_chip == NULL)
107 close(irq_chip->intfd);
108 plt_free(irq_chip->mz_name);
109 plt_free(irq_chip->irq_vecs);
114 roc_bphy_irq_stack_remove(int cpu)
116 struct roc_bphy_irq_stack *curr_stack;
118 if (pthread_mutex_lock(&stacks_mutex))
121 STAILQ_FOREACH(curr_stack, &irq_stacks, entries) {
122 if (curr_stack->cpu == cpu)
126 if (curr_stack == NULL)
129 if (curr_stack->inuse > 0)
132 if (curr_stack->inuse == 0) {
133 STAILQ_REMOVE(&irq_stacks, curr_stack, roc_bphy_irq_stack,
135 plt_free(curr_stack->sp_buffer);
136 plt_free(curr_stack);
140 pthread_mutex_unlock(&stacks_mutex);
144 roc_bphy_irq_stack_get(int cpu)
146 #define ARM_STACK_ALIGNMENT (2 * sizeof(void *))
147 #define IRQ_ISR_STACK_SIZE 0x200000
149 struct roc_bphy_irq_stack *curr_stack;
152 if (pthread_mutex_lock(&stacks_mutex))
155 STAILQ_FOREACH(curr_stack, &irq_stacks, entries) {
156 if (curr_stack->cpu == cpu) {
158 retval = ((char *)curr_stack->sp_buffer) +
164 curr_stack = plt_zmalloc(sizeof(struct roc_bphy_irq_stack), 0);
165 if (curr_stack == NULL)
168 curr_stack->sp_buffer =
169 plt_zmalloc(IRQ_ISR_STACK_SIZE * 2, ARM_STACK_ALIGNMENT);
170 if (curr_stack->sp_buffer == NULL)
173 curr_stack->cpu = cpu;
174 curr_stack->inuse = 0;
175 STAILQ_INSERT_TAIL(&irq_stacks, curr_stack, entries);
176 retval = ((char *)curr_stack->sp_buffer) + IRQ_ISR_STACK_SIZE;
179 pthread_mutex_unlock(&stacks_mutex);
183 plt_free(curr_stack);
186 pthread_mutex_unlock(&stacks_mutex);
191 roc_bphy_intr_available(struct roc_bphy_irq_chip *irq_chip, int irq_num)
193 if (irq_num < 0 || (uint64_t)irq_num >= irq_chip->max_irq)
196 return irq_chip->avail_irq_bmask & BIT(irq_num);