drivers/common/qat/qat_qp.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Intel Corporation
   3  */
   4 #ifndef _QAT_QP_H_
   5 #define _QAT_QP_H_
   6
   7 #include "qat_common.h"
   8 #include "adf_transport_access_macros.h"
   9
  10 struct qat_pci_device;
  11
  12 #define QAT_CSR_HEAD_WRITE_THRESH 32U
  13 /* number of requests to accumulate before writing head CSR */
  14
  15 typedef int (*build_request_t)(void *op,
  16                 uint8_t *req, void *op_cookie,
  17                 enum qat_device_gen qat_dev_gen);
  18 /**< Build a request from an op. */
  19
  20 /**
  21  * Structure with data needed for creation of queue pair.
  22  */
  23 struct qat_qp_hw_data {
  24         enum qat_service_type service_type;
  25         uint8_t hw_bundle_num;
  26         uint8_t tx_ring_num;
  27         uint8_t rx_ring_num;
  28         uint16_t tx_msg_size;
  29         uint16_t rx_msg_size;
  30 };
  31 /**
  32  * Structure with data needed for creation of queue pair.
  33  */
  34 struct qat_qp_config {
  35         const struct qat_qp_hw_data *hw;
  36         uint32_t nb_descriptors;
  37         uint32_t cookie_size;
  38         int socket_id;
  39         build_request_t build_request;
  40         const char *service_str;
  41 };
  42
  43 /**
  44  * Structure associated with each queue.
  45  */
  46 struct qat_queue {
  47         char            memz_name[RTE_MEMZONE_NAMESIZE];
  48         void            *base_addr;             /* Base address */
  49         rte_iova_t      base_phys_addr;         /* Queue physical address */
  50         uint32_t        head;                   /* Shadow copy of the head */
  51         uint32_t        tail;                   /* Shadow copy of the tail */
  52         uint32_t        modulo_mask;
  53         uint32_t        msg_size;
  54         uint16_t        max_inflights;
  55         uint32_t        queue_size;
  56         uint8_t         hw_bundle_number;
  57         uint8_t         hw_queue_number;
  58         /* HW queue aka ring offset on bundle */
  59         uint32_t        csr_head;               /* last written head value */
  60         uint32_t        csr_tail;               /* last written tail value */
  61         uint16_t        nb_processed_responses;
  62         /* number of responses processed since last CSR head write */
  63 };
  64
  65 struct qat_qp {
  66         void                    *mmap_bar_addr;
  67         uint16_t                inflights16;
  68         struct qat_queue        tx_q;
  69         struct qat_queue        rx_q;
  70         struct qat_common_stats stats;
  71         struct rte_mempool *op_cookie_pool;
  72         void **op_cookies;
  73         uint32_t nb_descriptors;
  74         enum qat_device_gen qat_dev_gen;
  75         build_request_t build_request;
  76         enum qat_service_type service_type;
  77         struct qat_pci_device *qat_dev;
  78         /**< qat device this qp is on */
  79 } __rte_cache_aligned;
  80
  81 extern const struct qat_qp_hw_data qat_gen1_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];
  82 extern const struct qat_qp_hw_data qat_gen3_qps[][ADF_MAX_QPS_ON_ANY_SERVICE];
  83
  84 uint16_t
  85 qat_enqueue_op_burst(void *qp, void **ops, uint16_t nb_ops);
  86
  87 uint16_t
  88 qat_dequeue_op_burst(void *qp, void **ops, uint16_t nb_ops);
  89
  90 int
  91 qat_qp_release(struct qat_qp **qp_addr);
  92
  93 int
  94 qat_qp_setup(struct qat_pci_device *qat_dev,
  95                 struct qat_qp **qp_addr, uint16_t queue_pair_id,
  96                 struct qat_qp_config *qat_qp_conf);
  97
  98 int
  99 qat_qps_per_service(const struct qat_qp_hw_data *qp_hw_data,
 100                         enum qat_service_type service);
 101
 102 /* Needed for weak function*/
 103 int
 104 qat_comp_process_response(void **op __rte_unused, uint8_t *resp __rte_unused,
 105                           void *op_cookie __rte_unused,
 106                           uint64_t *dequeue_err_count __rte_unused);
 107
 108 #endif /* _QAT_QP_H_ */