1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2008-2019 Solarflare Communications Inc.
13 * There are three versions of the MCDI interface:
14 * - MCDIv0: Siena BootROM. Transport uses MCDIv1 headers.
15 * - MCDIv1: Siena firmware and Huntington BootROM.
16 * - MCDIv2: EF10 firmware (Huntington/Medford) and Medford BootROM.
17 * Transport uses MCDIv2 headers.
19 * MCDIv2 Header NOT_EPOCH flag
20 * ----------------------------
21 * A new epoch begins at initial startup or after an MC reboot, and defines when
22 * the MC should reject stale MCDI requests.
24 * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all
25 * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1.
27 * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a
28 * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0.
35 static const efx_mcdi_ops_t __efx_mcdi_siena_ops = {
36 siena_mcdi_init, /* emco_init */
37 siena_mcdi_send_request, /* emco_send_request */
38 siena_mcdi_poll_reboot, /* emco_poll_reboot */
39 siena_mcdi_poll_response, /* emco_poll_response */
40 siena_mcdi_read_response, /* emco_read_response */
41 siena_mcdi_fini, /* emco_fini */
42 siena_mcdi_feature_supported, /* emco_feature_supported */
43 siena_mcdi_get_timeout, /* emco_get_timeout */
46 #endif /* EFSYS_OPT_SIENA */
50 static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
51 ef10_mcdi_init, /* emco_init */
52 ef10_mcdi_send_request, /* emco_send_request */
53 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
54 ef10_mcdi_poll_response, /* emco_poll_response */
55 ef10_mcdi_read_response, /* emco_read_response */
56 ef10_mcdi_fini, /* emco_fini */
57 ef10_mcdi_feature_supported, /* emco_feature_supported */
58 ef10_mcdi_get_timeout, /* emco_get_timeout */
61 #endif /* EFX_OPTS_EF10() */
63 #if EFSYS_OPT_RIVERHEAD
65 static const efx_mcdi_ops_t __efx_mcdi_rhead_ops = {
66 ef10_mcdi_init, /* emco_init */
67 ef10_mcdi_send_request, /* emco_send_request */
68 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
69 ef10_mcdi_poll_response, /* emco_poll_response */
70 ef10_mcdi_read_response, /* emco_read_response */
71 ef10_mcdi_fini, /* emco_fini */
72 ef10_mcdi_feature_supported, /* emco_feature_supported */
73 ef10_mcdi_get_timeout, /* emco_get_timeout */
76 #endif /* EFSYS_OPT_RIVERHEAD */
80 __checkReturn efx_rc_t
83 __in const efx_mcdi_transport_t *emtp)
85 const efx_mcdi_ops_t *emcop;
88 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
89 EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0);
91 switch (enp->en_family) {
93 case EFX_FAMILY_SIENA:
94 emcop = &__efx_mcdi_siena_ops;
96 #endif /* EFSYS_OPT_SIENA */
98 #if EFSYS_OPT_HUNTINGTON
99 case EFX_FAMILY_HUNTINGTON:
100 emcop = &__efx_mcdi_ef10_ops;
102 #endif /* EFSYS_OPT_HUNTINGTON */
104 #if EFSYS_OPT_MEDFORD
105 case EFX_FAMILY_MEDFORD:
106 emcop = &__efx_mcdi_ef10_ops;
108 #endif /* EFSYS_OPT_MEDFORD */
110 #if EFSYS_OPT_MEDFORD2
111 case EFX_FAMILY_MEDFORD2:
112 emcop = &__efx_mcdi_ef10_ops;
114 #endif /* EFSYS_OPT_MEDFORD2 */
116 #if EFSYS_OPT_RIVERHEAD
117 case EFX_FAMILY_RIVERHEAD:
118 emcop = &__efx_mcdi_rhead_ops;
120 #endif /* EFSYS_OPT_RIVERHEAD */
128 if (enp->en_features & EFX_FEATURE_MCDI_DMA) {
129 /* MCDI requires a DMA buffer in host memory */
130 if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) {
135 enp->en_mcdi.em_emtp = emtp;
137 if (emcop != NULL && emcop->emco_init != NULL) {
138 if ((rc = emcop->emco_init(enp, emtp)) != 0)
142 enp->en_mcdi.em_emcop = emcop;
143 enp->en_mod_flags |= EFX_MOD_MCDI;
152 EFSYS_PROBE1(fail1, efx_rc_t, rc);
154 enp->en_mcdi.em_emcop = NULL;
155 enp->en_mcdi.em_emtp = NULL;
156 enp->en_mod_flags &= ~EFX_MOD_MCDI;
165 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
166 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
168 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
169 EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI);
171 if (emcop != NULL && emcop->emco_fini != NULL)
172 emcop->emco_fini(enp);
175 emip->emi_aborted = 0;
177 enp->en_mcdi.em_emcop = NULL;
178 enp->en_mod_flags &= ~EFX_MOD_MCDI;
185 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
186 efsys_lock_state_t state;
188 /* Start a new epoch (allow fresh MCDI requests to succeed) */
189 EFSYS_LOCK(enp->en_eslp, state);
190 emip->emi_new_epoch = B_TRUE;
191 EFSYS_UNLOCK(enp->en_eslp, state);
195 efx_mcdi_send_request(
202 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
204 emcop->emco_send_request(enp, hdrp, hdr_len, sdup, sdu_len);
208 efx_mcdi_poll_reboot(
211 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
214 rc = emcop->emco_poll_reboot(enp);
219 efx_mcdi_poll_response(
222 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
225 available = emcop->emco_poll_response(enp);
230 efx_mcdi_read_response(
236 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
238 emcop->emco_read_response(enp, bufferp, offset, length);
242 efx_mcdi_request_start(
244 __in efx_mcdi_req_t *emrp,
245 __in boolean_t ev_cpl)
247 #if EFSYS_OPT_MCDI_LOGGING
248 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
250 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
253 unsigned int max_version;
257 efsys_lock_state_t state;
259 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
260 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
261 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
264 * efx_mcdi_request_start() is naturally serialised against both
265 * efx_mcdi_request_poll() and efx_mcdi_ev_cpl()/efx_mcdi_ev_death(),
266 * by virtue of there only being one outstanding MCDI request.
267 * Unfortunately, upper layers may also call efx_mcdi_request_abort()
268 * at any time, to timeout a pending mcdi request, That request may
269 * then subsequently complete, meaning efx_mcdi_ev_cpl() or
270 * efx_mcdi_ev_death() may end up running in parallel with
271 * efx_mcdi_request_start(). This race is handled by ensuring that
272 * %emi_pending_req, %emi_ev_cpl and %emi_seq are protected by the
275 EFSYS_LOCK(enp->en_eslp, state);
276 EFSYS_ASSERT(emip->emi_pending_req == NULL);
277 emip->emi_pending_req = emrp;
278 emip->emi_ev_cpl = ev_cpl;
279 emip->emi_poll_cnt = 0;
280 seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ);
281 new_epoch = emip->emi_new_epoch;
282 max_version = emip->emi_max_version;
283 EFSYS_UNLOCK(enp->en_eslp, state);
287 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
290 * Huntington firmware supports MCDIv2, but the Huntington BootROM only
291 * supports MCDIv1. Use MCDIv1 headers for MCDIv1 commands where
292 * possible to support this.
294 if ((max_version >= 2) &&
295 ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
296 (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1) ||
297 (emrp->emr_out_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
298 /* Construct MCDI v2 header */
299 hdr_len = sizeof (hdr);
300 EFX_POPULATE_DWORD_8(hdr[0],
301 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
302 MCDI_HEADER_RESYNC, 1,
303 MCDI_HEADER_DATALEN, 0,
304 MCDI_HEADER_SEQ, seq,
305 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
306 MCDI_HEADER_ERROR, 0,
307 MCDI_HEADER_RESPONSE, 0,
308 MCDI_HEADER_XFLAGS, xflags);
310 EFX_POPULATE_DWORD_2(hdr[1],
311 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd,
312 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length);
314 /* Construct MCDI v1 header */
315 hdr_len = sizeof (hdr[0]);
316 EFX_POPULATE_DWORD_8(hdr[0],
317 MCDI_HEADER_CODE, emrp->emr_cmd,
318 MCDI_HEADER_RESYNC, 1,
319 MCDI_HEADER_DATALEN, emrp->emr_in_length,
320 MCDI_HEADER_SEQ, seq,
321 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
322 MCDI_HEADER_ERROR, 0,
323 MCDI_HEADER_RESPONSE, 0,
324 MCDI_HEADER_XFLAGS, xflags);
327 #if EFSYS_OPT_MCDI_LOGGING
328 if (emtp->emt_logger != NULL) {
329 emtp->emt_logger(emtp->emt_context, EFX_LOG_MCDI_REQUEST,
331 emrp->emr_in_buf, emrp->emr_in_length);
333 #endif /* EFSYS_OPT_MCDI_LOGGING */
335 efx_mcdi_send_request(enp, &hdr[0], hdr_len,
336 emrp->emr_in_buf, emrp->emr_in_length);
341 efx_mcdi_read_response_header(
343 __inout efx_mcdi_req_t *emrp)
345 #if EFSYS_OPT_MCDI_LOGGING
346 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
347 #endif /* EFSYS_OPT_MCDI_LOGGING */
348 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
350 unsigned int hdr_len;
351 unsigned int data_len;
357 EFSYS_ASSERT(emrp != NULL);
359 efx_mcdi_read_response(enp, &hdr[0], 0, sizeof (hdr[0]));
360 hdr_len = sizeof (hdr[0]);
362 cmd = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE);
363 seq = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_SEQ);
364 error = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_ERROR);
366 if (cmd != MC_CMD_V2_EXTN) {
367 data_len = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_DATALEN);
369 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
370 hdr_len += sizeof (hdr[1]);
372 cmd = EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
374 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
377 if (error && (data_len == 0)) {
378 /* The MC has rebooted since the request was sent. */
379 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
380 efx_mcdi_poll_reboot(enp);
384 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
385 if (((cmd != emrp->emr_cmd) && (emrp->emr_cmd != MC_CMD_PROXY_CMD)) ||
387 if ((cmd != emrp->emr_cmd) ||
389 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
390 /* Response is for a different request */
396 unsigned int err_len = MIN(data_len, sizeof (err));
397 int err_code = MC_CMD_ERR_EPROTO;
400 /* Read error code (and arg num for MCDI v2 commands) */
401 efx_mcdi_read_response(enp, &err, hdr_len, err_len);
403 if (err_len >= (MC_CMD_ERR_CODE_OFST + sizeof (efx_dword_t)))
404 err_code = EFX_DWORD_FIELD(err[0], EFX_DWORD_0);
406 if (err_len >= (MC_CMD_ERR_ARG_OFST + sizeof (efx_dword_t)))
407 err_arg = EFX_DWORD_FIELD(err[1], EFX_DWORD_0);
409 emrp->emr_err_code = err_code;
410 emrp->emr_err_arg = err_arg;
412 #if EFSYS_OPT_MCDI_PROXY_AUTH
413 if ((err_code == MC_CMD_ERR_PROXY_PENDING) &&
414 (err_len == sizeof (err))) {
416 * The MCDI request would normally fail with EPERM, but
417 * firmware has forwarded it to an authorization agent
418 * attached to a privileged PF.
420 * Save the authorization request handle. The client
421 * must wait for a PROXY_RESPONSE event, or timeout.
423 emrp->emr_proxy_handle = err_arg;
425 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
427 #if EFSYS_OPT_MCDI_LOGGING
428 if (emtp->emt_logger != NULL) {
429 emtp->emt_logger(emtp->emt_context,
430 EFX_LOG_MCDI_RESPONSE,
434 #endif /* EFSYS_OPT_MCDI_LOGGING */
436 if (!emrp->emr_quiet) {
437 EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd,
438 int, err_code, int, err_arg);
441 rc = efx_mcdi_request_errcode(err_code);
446 emrp->emr_out_length_used = data_len;
447 #if EFSYS_OPT_MCDI_PROXY_AUTH
448 emrp->emr_proxy_handle = 0;
449 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
456 emrp->emr_out_length_used = 0;
460 efx_mcdi_finish_response(
462 __in efx_mcdi_req_t *emrp)
464 #if EFSYS_OPT_MCDI_LOGGING
465 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
466 #endif /* EFSYS_OPT_MCDI_LOGGING */
468 unsigned int hdr_len;
470 unsigned int resp_off;
471 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
472 unsigned int resp_cmd;
473 boolean_t proxied_cmd_resp = B_FALSE;
474 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
476 if (emrp->emr_out_buf == NULL)
479 /* Read the command header to detect MCDI response format */
480 hdr_len = sizeof (hdr[0]);
481 efx_mcdi_read_response(enp, &hdr[0], 0, hdr_len);
482 if (EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) {
484 * Read the actual payload length. The length given in the event
485 * is only correct for responses with the V1 format.
487 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
488 hdr_len += sizeof (hdr[1]);
491 emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr[1],
492 MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
493 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
495 * A proxy MCDI command is executed by PF on behalf of
496 * one of its VFs. The command to be proxied follows
497 * immediately afterward in the host buffer.
498 * PROXY_CMD inner call complete response should be copied to
499 * output buffer so that it can be returned to the requesting
500 * function in MC_CMD_PROXY_COMPLETE payload.
503 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
504 proxied_cmd_resp = ((emrp->emr_cmd == MC_CMD_PROXY_CMD) &&
505 (resp_cmd != MC_CMD_PROXY_CMD));
506 if (proxied_cmd_resp) {
508 emrp->emr_out_length_used += hdr_len;
510 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
515 /* Copy payload out into caller supplied buffer */
516 bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length);
517 efx_mcdi_read_response(enp, emrp->emr_out_buf, resp_off, bytes);
519 #if EFSYS_OPT_MCDI_LOGGING
520 if (emtp->emt_logger != NULL) {
521 emtp->emt_logger(emtp->emt_context,
522 EFX_LOG_MCDI_RESPONSE,
524 emrp->emr_out_buf, bytes);
526 #endif /* EFSYS_OPT_MCDI_LOGGING */
530 __checkReturn boolean_t
531 efx_mcdi_request_poll(
534 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
535 efx_mcdi_req_t *emrp;
536 efsys_lock_state_t state;
539 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
540 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
541 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
543 /* Serialise against post-watchdog efx_mcdi_ev* */
544 EFSYS_LOCK(enp->en_eslp, state);
546 EFSYS_ASSERT(emip->emi_pending_req != NULL);
547 EFSYS_ASSERT(!emip->emi_ev_cpl);
548 emrp = emip->emi_pending_req;
550 /* Check if hardware is unavailable */
551 if (efx_nic_hw_unavailable(enp)) {
552 EFSYS_UNLOCK(enp->en_eslp, state);
556 /* Check for reboot atomically w.r.t efx_mcdi_request_start */
557 if (emip->emi_poll_cnt++ == 0) {
558 if ((rc = efx_mcdi_poll_reboot(enp)) != 0) {
559 emip->emi_pending_req = NULL;
560 EFSYS_UNLOCK(enp->en_eslp, state);
562 /* Reboot/Assertion */
563 if (rc == EIO || rc == EINTR)
564 efx_mcdi_raise_exception(enp, emrp, rc);
570 /* Check if a response is available */
571 if (efx_mcdi_poll_response(enp) == B_FALSE) {
572 EFSYS_UNLOCK(enp->en_eslp, state);
576 /* Read the response header */
577 efx_mcdi_read_response_header(enp, emrp);
579 /* Request complete */
580 emip->emi_pending_req = NULL;
582 /* Ensure stale MCDI requests fail after an MC reboot. */
583 emip->emi_new_epoch = B_FALSE;
585 EFSYS_UNLOCK(enp->en_eslp, state);
587 if ((rc = emrp->emr_rc) != 0)
590 efx_mcdi_finish_response(enp, emrp);
594 if (!emrp->emr_quiet)
597 if (!emrp->emr_quiet)
598 EFSYS_PROBE1(fail1, efx_rc_t, rc);
603 __checkReturn boolean_t
604 efx_mcdi_request_abort(
607 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
608 efx_mcdi_req_t *emrp;
610 efsys_lock_state_t state;
612 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
613 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
614 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
617 * efx_mcdi_ev_* may have already completed this event, and be
618 * spinning/blocked on the upper layer lock. So it *is* legitimate
619 * to for emi_pending_req to be NULL. If there is a pending event
620 * completed request, then provide a "credit" to allow
621 * efx_mcdi_ev_cpl() to accept a single spurious completion.
623 EFSYS_LOCK(enp->en_eslp, state);
624 emrp = emip->emi_pending_req;
625 aborted = (emrp != NULL);
627 emip->emi_pending_req = NULL;
629 /* Error the request */
630 emrp->emr_out_length_used = 0;
631 emrp->emr_rc = ETIMEDOUT;
633 /* Provide a credit for seqno/emr_pending_req mismatches */
634 if (emip->emi_ev_cpl)
638 * The upper layer has called us, so we don't
639 * need to complete the request.
642 EFSYS_UNLOCK(enp->en_eslp, state);
648 efx_mcdi_get_timeout(
650 __in efx_mcdi_req_t *emrp,
651 __out uint32_t *timeoutp)
653 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
655 emcop->emco_get_timeout(enp, emrp, timeoutp);
658 __checkReturn efx_rc_t
659 efx_mcdi_request_errcode(
660 __in unsigned int err)
665 case MC_CMD_ERR_EPERM:
667 case MC_CMD_ERR_ENOENT:
669 case MC_CMD_ERR_EINTR:
671 case MC_CMD_ERR_EACCES:
673 case MC_CMD_ERR_EBUSY:
675 case MC_CMD_ERR_EINVAL:
677 case MC_CMD_ERR_EDEADLK:
679 case MC_CMD_ERR_ENOSYS:
681 case MC_CMD_ERR_ETIME:
683 case MC_CMD_ERR_ENOTSUP:
685 case MC_CMD_ERR_EALREADY:
689 case MC_CMD_ERR_EEXIST:
691 #ifdef MC_CMD_ERR_EAGAIN
692 case MC_CMD_ERR_EAGAIN:
695 #ifdef MC_CMD_ERR_ENOSPC
696 case MC_CMD_ERR_ENOSPC:
699 case MC_CMD_ERR_ERANGE:
702 case MC_CMD_ERR_ALLOC_FAIL:
704 case MC_CMD_ERR_NO_VADAPTOR:
706 case MC_CMD_ERR_NO_EVB_PORT:
708 case MC_CMD_ERR_NO_VSWITCH:
710 case MC_CMD_ERR_VLAN_LIMIT:
712 case MC_CMD_ERR_BAD_PCI_FUNC:
714 case MC_CMD_ERR_BAD_VLAN_MODE:
716 case MC_CMD_ERR_BAD_VSWITCH_TYPE:
718 case MC_CMD_ERR_BAD_VPORT_TYPE:
720 case MC_CMD_ERR_MAC_EXIST:
723 case MC_CMD_ERR_PROXY_PENDING:
727 EFSYS_PROBE1(mc_pcol_error, int, err);
733 efx_mcdi_raise_exception(
735 __in_opt efx_mcdi_req_t *emrp,
738 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
739 efx_mcdi_exception_t exception;
741 /* Reboot or Assertion failure only */
742 EFSYS_ASSERT(rc == EIO || rc == EINTR);
745 * If MC_CMD_REBOOT causes a reboot (dependent on parameters),
746 * then the EIO is not worthy of an exception.
748 if (emrp != NULL && emrp->emr_cmd == MC_CMD_REBOOT && rc == EIO)
751 exception = (rc == EIO)
752 ? EFX_MCDI_EXCEPTION_MC_REBOOT
753 : EFX_MCDI_EXCEPTION_MC_BADASSERT;
755 emtp->emt_exception(emtp->emt_context, exception);
761 __inout efx_mcdi_req_t *emrp)
763 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
765 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
766 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
768 emrp->emr_quiet = B_FALSE;
769 emtp->emt_execute(emtp->emt_context, emrp);
773 efx_mcdi_execute_quiet(
775 __inout efx_mcdi_req_t *emrp)
777 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
779 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
780 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
782 emrp->emr_quiet = B_TRUE;
783 emtp->emt_execute(emtp->emt_context, emrp);
789 __in unsigned int seq,
790 __in unsigned int outlen,
793 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
794 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
795 efx_mcdi_req_t *emrp;
796 efsys_lock_state_t state;
798 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
799 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
802 * Serialise against efx_mcdi_request_poll()/efx_mcdi_request_start()
803 * when we're completing an aborted request.
805 EFSYS_LOCK(enp->en_eslp, state);
806 if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl ||
807 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
808 EFSYS_ASSERT(emip->emi_aborted > 0);
809 if (emip->emi_aborted > 0)
811 EFSYS_UNLOCK(enp->en_eslp, state);
815 emrp = emip->emi_pending_req;
816 emip->emi_pending_req = NULL;
817 EFSYS_UNLOCK(enp->en_eslp, state);
819 if (emip->emi_max_version >= 2) {
820 /* MCDIv2 response details do not fit into an event. */
821 efx_mcdi_read_response_header(enp, emrp);
824 if (!emrp->emr_quiet) {
825 EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd,
828 emrp->emr_out_length_used = 0;
829 emrp->emr_rc = efx_mcdi_request_errcode(errcode);
831 emrp->emr_out_length_used = outlen;
835 if (emrp->emr_rc == 0)
836 efx_mcdi_finish_response(enp, emrp);
838 emtp->emt_ev_cpl(emtp->emt_context);
841 #if EFSYS_OPT_MCDI_PROXY_AUTH
843 __checkReturn efx_rc_t
844 efx_mcdi_get_proxy_handle(
846 __in efx_mcdi_req_t *emrp,
847 __out uint32_t *handlep)
851 _NOTE(ARGUNUSED(enp))
854 * Return proxy handle from MCDI request that returned with error
855 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
856 * PROXY_RESPONSE event.
858 if ((emrp == NULL) || (handlep == NULL)) {
862 if ((emrp->emr_rc != 0) &&
863 (emrp->emr_err_code == MC_CMD_ERR_PROXY_PENDING)) {
864 *handlep = emrp->emr_proxy_handle;
873 EFSYS_PROBE1(fail1, efx_rc_t, rc);
878 efx_mcdi_ev_proxy_response(
880 __in unsigned int handle,
881 __in unsigned int status)
883 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
887 * Handle results of an authorization request for a privileged MCDI
888 * command. If authorization was granted then we must re-issue the
889 * original MCDI request. If authorization failed or timed out,
890 * then the original MCDI request should be completed with the
891 * result code from this event.
893 rc = (status == 0) ? 0 : efx_mcdi_request_errcode(status);
895 emtp->emt_ev_proxy_response(emtp->emt_context, handle, rc);
897 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
899 #if EFSYS_OPT_MCDI_PROXY_AUTH_SERVER
901 efx_mcdi_ev_proxy_request(
903 __in unsigned int index)
905 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
907 if (emtp->emt_ev_proxy_request != NULL)
908 emtp->emt_ev_proxy_request(emtp->emt_context, index);
910 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH_SERVER */
916 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
917 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
918 efx_mcdi_req_t *emrp = NULL;
920 efsys_lock_state_t state;
923 * The MCDI request (if there is one) has been terminated, either
924 * by a BADASSERT or REBOOT event.
926 * If there is an outstanding event-completed MCDI operation, then we
927 * will never receive the completion event (because both MCDI
928 * completions and BADASSERT events are sent to the same evq). So
929 * complete this MCDI op.
931 * This function might run in parallel with efx_mcdi_request_poll()
932 * for poll completed mcdi requests, and also with
933 * efx_mcdi_request_start() for post-watchdog completions.
935 EFSYS_LOCK(enp->en_eslp, state);
936 emrp = emip->emi_pending_req;
937 ev_cpl = emip->emi_ev_cpl;
938 if (emrp != NULL && emip->emi_ev_cpl) {
939 emip->emi_pending_req = NULL;
941 emrp->emr_out_length_used = 0;
947 * Since we're running in parallel with a request, consume the
948 * status word before dropping the lock.
950 if (rc == EIO || rc == EINTR) {
951 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
952 (void) efx_mcdi_poll_reboot(enp);
953 emip->emi_new_epoch = B_TRUE;
956 EFSYS_UNLOCK(enp->en_eslp, state);
958 efx_mcdi_raise_exception(enp, emrp, rc);
960 if (emrp != NULL && ev_cpl)
961 emtp->emt_ev_cpl(emtp->emt_context);
964 __checkReturn efx_rc_t
965 efx_mcdi_get_version(
968 __out efx_mcdi_version_t *verp)
970 efx_nic_board_info_t *board_infop = &verp->emv_board_info;
971 EFX_MCDI_DECLARE_BUF(payload,
972 MC_CMD_GET_VERSION_EXT_IN_LEN,
973 MC_CMD_GET_VERSION_V2_OUT_LEN);
974 efx_word_t *ver_words;
980 EFX_STATIC_ASSERT(sizeof (verp->emv_version) ==
981 MC_CMD_GET_VERSION_OUT_VERSION_LEN);
982 EFX_STATIC_ASSERT(sizeof (verp->emv_firmware) ==
983 MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN);
985 EFX_STATIC_ASSERT(EFX_MCDI_VERSION_BOARD_INFO ==
986 (1U << MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN));
988 EFX_STATIC_ASSERT(sizeof (board_infop->enbi_serial) ==
989 MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN);
990 EFX_STATIC_ASSERT(sizeof (board_infop->enbi_name) ==
991 MC_CMD_GET_VERSION_V2_OUT_BOARD_NAME_LEN);
992 EFX_STATIC_ASSERT(sizeof (board_infop->enbi_revision) ==
993 MC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_LEN);
995 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
997 req.emr_cmd = MC_CMD_GET_VERSION;
998 req.emr_in_buf = payload;
999 req.emr_out_buf = payload;
1001 if ((flags & EFX_MCDI_VERSION_BOARD_INFO) != 0) {
1002 /* Request basic + extended version information. */
1003 req.emr_in_length = MC_CMD_GET_VERSION_EXT_IN_LEN;
1004 req.emr_out_length = MC_CMD_GET_VERSION_V2_OUT_LEN;
1006 /* Request only basic version information. */
1007 req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN;
1008 req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN;
1011 efx_mcdi_execute(enp, &req);
1013 if (req.emr_rc != 0) {
1018 /* bootrom support */
1019 if (req.emr_out_length_used == MC_CMD_GET_VERSION_V0_OUT_LEN) {
1020 version[0] = version[1] = version[2] = version[3] = 0;
1021 firmware = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
1025 if (req.emr_out_length_used < req.emr_out_length) {
1030 ver_words = MCDI_OUT2(req, efx_word_t, GET_VERSION_OUT_VERSION);
1031 version[0] = EFX_WORD_FIELD(ver_words[0], EFX_WORD_0);
1032 version[1] = EFX_WORD_FIELD(ver_words[1], EFX_WORD_0);
1033 version[2] = EFX_WORD_FIELD(ver_words[2], EFX_WORD_0);
1034 version[3] = EFX_WORD_FIELD(ver_words[3], EFX_WORD_0);
1035 firmware = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
1038 memset(verp, 0, sizeof (*verp));
1040 verp->emv_version[0] = version[0];
1041 verp->emv_version[1] = version[1];
1042 verp->emv_version[2] = version[2];
1043 verp->emv_version[3] = version[3];
1044 verp->emv_firmware = firmware;
1046 verp->emv_flags = MCDI_OUT_DWORD(req, GET_VERSION_V2_OUT_FLAGS);
1047 verp->emv_flags &= flags;
1049 if ((verp->emv_flags & EFX_MCDI_VERSION_BOARD_INFO) != 0) {
1050 memcpy(board_infop->enbi_serial,
1051 MCDI_OUT2(req, char, GET_VERSION_V2_OUT_BOARD_SERIAL),
1052 sizeof (board_infop->enbi_serial));
1053 memcpy(board_infop->enbi_name,
1054 MCDI_OUT2(req, char, GET_VERSION_V2_OUT_BOARD_NAME),
1055 sizeof (board_infop->enbi_name));
1056 board_infop->enbi_revision =
1057 MCDI_OUT_DWORD(req, GET_VERSION_V2_OUT_BOARD_REVISION);
1065 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1070 static __checkReturn efx_rc_t
1071 efx_mcdi_get_boot_status(
1072 __in efx_nic_t *enp,
1073 __out efx_mcdi_boot_t *statusp)
1075 EFX_MCDI_DECLARE_BUF(payload,
1076 MC_CMD_GET_BOOT_STATUS_IN_LEN,
1077 MC_CMD_GET_BOOT_STATUS_OUT_LEN);
1081 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
1083 req.emr_cmd = MC_CMD_GET_BOOT_STATUS;
1084 req.emr_in_buf = payload;
1085 req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN;
1086 req.emr_out_buf = payload;
1087 req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN;
1089 efx_mcdi_execute_quiet(enp, &req);
1092 * NOTE: Unprivileged functions cannot access boot status,
1093 * so the MCDI request will return EACCES. This is
1094 * also checked in efx_mcdi_version.
1097 if (req.emr_rc != 0) {
1102 if (req.emr_out_length_used < MC_CMD_GET_BOOT_STATUS_OUT_LEN) {
1107 if (MCDI_OUT_DWORD_FIELD(req, GET_BOOT_STATUS_OUT_FLAGS,
1108 GET_BOOT_STATUS_OUT_FLAGS_PRIMARY))
1109 *statusp = EFX_MCDI_BOOT_PRIMARY;
1111 *statusp = EFX_MCDI_BOOT_SECONDARY;
1118 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1123 __checkReturn efx_rc_t
1125 __in efx_nic_t *enp,
1126 __out_ecount_opt(4) uint16_t versionp[4],
1127 __out_opt uint32_t *buildp,
1128 __out_opt efx_mcdi_boot_t *statusp)
1130 efx_mcdi_version_t ver;
1131 efx_mcdi_boot_t status;
1134 rc = efx_mcdi_get_version(enp, 0, &ver);
1138 /* The bootrom doesn't understand BOOT_STATUS */
1139 if (MC_FW_VERSION_IS_BOOTLOADER(ver.emv_firmware)) {
1140 status = EFX_MCDI_BOOT_ROM;
1144 rc = efx_mcdi_get_boot_status(enp, &status);
1146 /* Unprivileged functions cannot access BOOT_STATUS */
1147 status = EFX_MCDI_BOOT_PRIMARY;
1148 memset(ver.emv_version, 0, sizeof (ver.emv_version));
1149 ver.emv_firmware = 0;
1150 } else if (rc != 0) {
1155 if (versionp != NULL)
1156 memcpy(versionp, ver.emv_version, sizeof (ver.emv_version));
1158 *buildp = ver.emv_firmware;
1159 if (statusp != NULL)
1167 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1172 __checkReturn efx_rc_t
1173 efx_mcdi_get_capabilities(
1174 __in efx_nic_t *enp,
1175 __out_opt uint32_t *flagsp,
1176 __out_opt uint16_t *rx_dpcpu_fw_idp,
1177 __out_opt uint16_t *tx_dpcpu_fw_idp,
1178 __out_opt uint32_t *flags2p,
1179 __out_opt uint32_t *tso2ncp)
1182 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_CAPABILITIES_IN_LEN,
1183 MC_CMD_GET_CAPABILITIES_V2_OUT_LEN);
1184 boolean_t v2_capable;
1187 req.emr_cmd = MC_CMD_GET_CAPABILITIES;
1188 req.emr_in_buf = payload;
1189 req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
1190 req.emr_out_buf = payload;
1191 req.emr_out_length = MC_CMD_GET_CAPABILITIES_V2_OUT_LEN;
1193 efx_mcdi_execute_quiet(enp, &req);
1195 if (req.emr_rc != 0) {
1200 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) {
1206 *flagsp = MCDI_OUT_DWORD(req, GET_CAPABILITIES_OUT_FLAGS1);
1208 if (rx_dpcpu_fw_idp != NULL)
1209 *rx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1210 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID);
1212 if (tx_dpcpu_fw_idp != NULL)
1213 *tx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1214 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID);
1216 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
1217 v2_capable = B_FALSE;
1219 v2_capable = B_TRUE;
1221 if (flags2p != NULL) {
1222 *flags2p = (v2_capable) ?
1223 MCDI_OUT_DWORD(req, GET_CAPABILITIES_V2_OUT_FLAGS2) :
1227 if (tso2ncp != NULL) {
1228 *tso2ncp = (v2_capable) ?
1230 GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS) :
1239 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1244 static __checkReturn efx_rc_t
1246 __in efx_nic_t *enp,
1247 __in boolean_t after_assertion)
1249 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_REBOOT_IN_LEN,
1250 MC_CMD_REBOOT_OUT_LEN);
1255 * We could require the caller to have caused en_mod_flags=0 to
1256 * call this function. This doesn't help the other port though,
1257 * who's about to get the MC ripped out from underneath them.
1258 * Since they have to cope with the subsequent fallout of MCDI
1259 * failures, we should as well.
1261 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1263 req.emr_cmd = MC_CMD_REBOOT;
1264 req.emr_in_buf = payload;
1265 req.emr_in_length = MC_CMD_REBOOT_IN_LEN;
1266 req.emr_out_buf = payload;
1267 req.emr_out_length = MC_CMD_REBOOT_OUT_LEN;
1269 MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS,
1270 (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0));
1272 efx_mcdi_execute_quiet(enp, &req);
1274 if (req.emr_rc == EACCES) {
1275 /* Unprivileged functions cannot reboot the MC. */
1279 /* A successful reboot request returns EIO. */
1280 if (req.emr_rc != 0 && req.emr_rc != EIO) {
1289 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1294 __checkReturn efx_rc_t
1296 __in efx_nic_t *enp)
1298 return (efx_mcdi_do_reboot(enp, B_FALSE));
1301 __checkReturn efx_rc_t
1302 efx_mcdi_exit_assertion_handler(
1303 __in efx_nic_t *enp)
1305 return (efx_mcdi_do_reboot(enp, B_TRUE));
1308 __checkReturn efx_rc_t
1309 efx_mcdi_read_assertion(
1310 __in efx_nic_t *enp)
1313 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_ASSERTS_IN_LEN,
1314 MC_CMD_GET_ASSERTS_OUT_LEN);
1323 * Before we attempt to chat to the MC, we should verify that the MC
1324 * isn't in it's assertion handler, either due to a previous reboot,
1325 * or because we're reinitializing due to an eec_exception().
1327 * Use GET_ASSERTS to read any assertion state that may be present.
1328 * Retry this command twice. Once because a boot-time assertion failure
1329 * might cause the 1st MCDI request to fail. And once again because
1330 * we might race with efx_mcdi_exit_assertion_handler() running on
1331 * partner port(s) on the same NIC.
1335 (void) memset(payload, 0, sizeof (payload));
1336 req.emr_cmd = MC_CMD_GET_ASSERTS;
1337 req.emr_in_buf = payload;
1338 req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN;
1339 req.emr_out_buf = payload;
1340 req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN;
1342 MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1);
1343 efx_mcdi_execute_quiet(enp, &req);
1345 } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0);
1347 if (req.emr_rc != 0) {
1348 if (req.emr_rc == EACCES) {
1349 /* Unprivileged functions cannot clear assertions. */
1356 if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) {
1361 /* Print out any assertion state recorded */
1362 flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1363 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1366 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1367 ? "system-level assertion"
1368 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1369 ? "thread-level assertion"
1370 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1372 : (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP)
1373 ? "illegal address trap"
1374 : "unknown assertion";
1375 EFSYS_PROBE3(mcpu_assertion,
1376 const char *, reason, unsigned int,
1377 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1379 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS));
1381 /* Print out the registers (r1 ... r31) */
1382 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1384 index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1386 EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int,
1387 EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst),
1389 ofst += sizeof (efx_dword_t);
1391 EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN);
1399 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1406 * Internal routines for for specific MCDI requests.
1409 __checkReturn efx_rc_t
1410 efx_mcdi_drv_attach(
1411 __in efx_nic_t *enp,
1412 __in boolean_t attach)
1415 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_DRV_ATTACH_IN_V2_LEN,
1416 MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1419 req.emr_cmd = MC_CMD_DRV_ATTACH;
1420 req.emr_in_buf = payload;
1421 if (enp->en_drv_version[0] == '\0') {
1422 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN;
1424 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_V2_LEN;
1426 req.emr_out_buf = payload;
1427 req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;
1430 * Typically, client drivers use DONT_CARE for the datapath firmware
1431 * type to ensure that the driver can attach to an unprivileged
1432 * function. The datapath firmware type to use is controlled by the
1434 * If a client driver wishes to attach with a specific datapath firmware
1435 * type, that can be passed in second argument of efx_nic_probe API. One
1436 * such example is the ESXi native driver that attempts attaching with
1437 * FULL_FEATURED datapath firmware type first and fall backs to
1438 * DONT_CARE datapath firmware type if MC_CMD_DRV_ATTACH fails.
1440 MCDI_IN_POPULATE_DWORD_2(req, DRV_ATTACH_IN_NEW_STATE,
1441 DRV_ATTACH_IN_ATTACH, attach ? 1 : 0,
1442 DRV_ATTACH_IN_SUBVARIANT_AWARE, EFSYS_OPT_FW_SUBVARIANT_AWARE);
1443 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
1444 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, enp->efv);
1446 if (req.emr_in_length >= MC_CMD_DRV_ATTACH_IN_V2_LEN) {
1447 EFX_STATIC_ASSERT(sizeof (enp->en_drv_version) ==
1448 MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_LEN);
1449 memcpy(MCDI_IN2(req, char, DRV_ATTACH_IN_V2_DRIVER_VERSION),
1450 enp->en_drv_version,
1451 MC_CMD_DRV_ATTACH_IN_V2_DRIVER_VERSION_LEN);
1454 efx_mcdi_execute(enp, &req);
1456 if (req.emr_rc != 0) {
1461 if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) {
1471 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1476 __checkReturn efx_rc_t
1477 efx_mcdi_get_board_cfg(
1478 __in efx_nic_t *enp,
1479 __out_opt uint32_t *board_typep,
1480 __out_opt efx_dword_t *capabilitiesp,
1481 __out_ecount_opt(6) uint8_t mac_addrp[6])
1483 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
1485 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN,
1486 MC_CMD_GET_BOARD_CFG_OUT_LENMIN);
1489 req.emr_cmd = MC_CMD_GET_BOARD_CFG;
1490 req.emr_in_buf = payload;
1491 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
1492 req.emr_out_buf = payload;
1493 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN;
1495 efx_mcdi_execute(enp, &req);
1497 if (req.emr_rc != 0) {
1502 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1507 if (mac_addrp != NULL) {
1510 if (emip->emi_port == 1) {
1511 addrp = MCDI_OUT2(req, uint8_t,
1512 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0);
1513 } else if (emip->emi_port == 2) {
1514 addrp = MCDI_OUT2(req, uint8_t,
1515 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1);
1521 EFX_MAC_ADDR_COPY(mac_addrp, addrp);
1524 if (capabilitiesp != NULL) {
1525 if (emip->emi_port == 1) {
1526 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1527 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1528 } else if (emip->emi_port == 2) {
1529 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1530 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1537 if (board_typep != NULL) {
1538 *board_typep = MCDI_OUT_DWORD(req,
1539 GET_BOARD_CFG_OUT_BOARD_TYPE);
1551 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1556 __checkReturn efx_rc_t
1557 efx_mcdi_get_resource_limits(
1558 __in efx_nic_t *enp,
1559 __out_opt uint32_t *nevqp,
1560 __out_opt uint32_t *nrxqp,
1561 __out_opt uint32_t *ntxqp)
1564 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_RESOURCE_LIMITS_IN_LEN,
1565 MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN);
1568 req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS;
1569 req.emr_in_buf = payload;
1570 req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN;
1571 req.emr_out_buf = payload;
1572 req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN;
1574 efx_mcdi_execute(enp, &req);
1576 if (req.emr_rc != 0) {
1581 if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
1587 *nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ);
1589 *nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ);
1591 *ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ);
1598 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1603 __checkReturn efx_rc_t
1604 efx_mcdi_get_phy_cfg(
1605 __in efx_nic_t *enp)
1607 efx_port_t *epp = &(enp->en_port);
1608 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1610 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_CFG_IN_LEN,
1611 MC_CMD_GET_PHY_CFG_OUT_LEN);
1616 uint32_t phy_media_type;
1619 req.emr_cmd = MC_CMD_GET_PHY_CFG;
1620 req.emr_in_buf = payload;
1621 req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN;
1622 req.emr_out_buf = payload;
1623 req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN;
1625 efx_mcdi_execute(enp, &req);
1627 if (req.emr_rc != 0) {
1632 if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) {
1637 encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE);
1639 namep = MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME);
1640 namelen = MIN(sizeof (encp->enc_phy_name) - 1,
1641 strnlen(namep, MC_CMD_GET_PHY_CFG_OUT_NAME_LEN));
1642 (void) memset(encp->enc_phy_name, 0,
1643 sizeof (encp->enc_phy_name));
1644 memcpy(encp->enc_phy_name, namep, namelen);
1645 #endif /* EFSYS_OPT_NAMES */
1646 (void) memset(encp->enc_phy_revision, 0,
1647 sizeof (encp->enc_phy_revision));
1648 memcpy(encp->enc_phy_revision,
1649 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION),
1650 MIN(sizeof (encp->enc_phy_revision) - 1,
1651 MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN));
1652 #if EFSYS_OPT_PHY_LED_CONTROL
1653 encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) |
1654 (1 << EFX_PHY_LED_OFF) |
1655 (1 << EFX_PHY_LED_ON));
1656 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
1658 /* Get the media type of the fixed port, if recognised. */
1659 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI);
1660 EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4);
1661 EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4);
1662 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP);
1663 EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS);
1664 EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T);
1665 EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS);
1666 phy_media_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE);
1667 epp->ep_fixed_port_type = (efx_phy_media_type_t)phy_media_type;
1668 if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES)
1669 epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID;
1671 epp->ep_phy_cap_mask =
1672 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
1673 #if EFSYS_OPT_PHY_FLAGS
1674 encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
1675 #endif /* EFSYS_OPT_PHY_FLAGS */
1677 encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);
1679 /* Populate internal state */
1680 encp->enc_mcdi_mdio_channel =
1681 (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);
1683 #if EFSYS_OPT_PHY_STATS
1684 encp->enc_mcdi_phy_stat_mask =
1685 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK);
1686 #endif /* EFSYS_OPT_PHY_STATS */
1689 encp->enc_bist_mask = 0;
1690 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1691 GET_PHY_CFG_OUT_BIST_CABLE_SHORT))
1692 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);
1693 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1694 GET_PHY_CFG_OUT_BIST_CABLE_LONG))
1695 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);
1696 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1697 GET_PHY_CFG_OUT_BIST))
1698 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);
1699 #endif /* EFSYS_OPT_BIST */
1706 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1711 __checkReturn efx_rc_t
1712 efx_mcdi_firmware_update_supported(
1713 __in efx_nic_t *enp,
1714 __out boolean_t *supportedp)
1716 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1719 if (emcop != NULL) {
1720 if ((rc = emcop->emco_feature_supported(enp,
1721 EFX_MCDI_FEATURE_FW_UPDATE, supportedp)) != 0)
1724 /* Earlier devices always supported updates */
1725 *supportedp = B_TRUE;
1731 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1736 __checkReturn efx_rc_t
1737 efx_mcdi_macaddr_change_supported(
1738 __in efx_nic_t *enp,
1739 __out boolean_t *supportedp)
1741 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1744 if (emcop != NULL) {
1745 if ((rc = emcop->emco_feature_supported(enp,
1746 EFX_MCDI_FEATURE_MACADDR_CHANGE, supportedp)) != 0)
1749 /* Earlier devices always supported MAC changes */
1750 *supportedp = B_TRUE;
1756 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1761 __checkReturn efx_rc_t
1762 efx_mcdi_link_control_supported(
1763 __in efx_nic_t *enp,
1764 __out boolean_t *supportedp)
1766 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1769 if (emcop != NULL) {
1770 if ((rc = emcop->emco_feature_supported(enp,
1771 EFX_MCDI_FEATURE_LINK_CONTROL, supportedp)) != 0)
1774 /* Earlier devices always supported link control */
1775 *supportedp = B_TRUE;
1781 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1786 __checkReturn efx_rc_t
1787 efx_mcdi_mac_spoofing_supported(
1788 __in efx_nic_t *enp,
1789 __out boolean_t *supportedp)
1791 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1794 if (emcop != NULL) {
1795 if ((rc = emcop->emco_feature_supported(enp,
1796 EFX_MCDI_FEATURE_MAC_SPOOFING, supportedp)) != 0)
1799 /* Earlier devices always supported MAC spoofing */
1800 *supportedp = B_TRUE;
1806 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1815 * Enter bist offline mode. This is a fw mode which puts the NIC into a state
1816 * where memory BIST tests can be run and not much else can interfere or happen.
1817 * A reboot is required to exit this mode.
1819 __checkReturn efx_rc_t
1820 efx_mcdi_bist_enable_offline(
1821 __in efx_nic_t *enp)
1826 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);
1827 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);
1829 req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;
1830 req.emr_in_buf = NULL;
1831 req.emr_in_length = 0;
1832 req.emr_out_buf = NULL;
1833 req.emr_out_length = 0;
1835 efx_mcdi_execute(enp, &req);
1837 if (req.emr_rc != 0) {
1845 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1849 #endif /* EFX_OPTS_EF10() */
1851 __checkReturn efx_rc_t
1852 efx_mcdi_bist_start(
1853 __in efx_nic_t *enp,
1854 __in efx_bist_type_t type)
1857 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_START_BIST_IN_LEN,
1858 MC_CMD_START_BIST_OUT_LEN);
1861 req.emr_cmd = MC_CMD_START_BIST;
1862 req.emr_in_buf = payload;
1863 req.emr_in_length = MC_CMD_START_BIST_IN_LEN;
1864 req.emr_out_buf = payload;
1865 req.emr_out_length = MC_CMD_START_BIST_OUT_LEN;
1868 case EFX_BIST_TYPE_PHY_NORMAL:
1869 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
1871 case EFX_BIST_TYPE_PHY_CABLE_SHORT:
1872 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1873 MC_CMD_PHY_BIST_CABLE_SHORT);
1875 case EFX_BIST_TYPE_PHY_CABLE_LONG:
1876 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1877 MC_CMD_PHY_BIST_CABLE_LONG);
1879 case EFX_BIST_TYPE_MC_MEM:
1880 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1881 MC_CMD_MC_MEM_BIST);
1883 case EFX_BIST_TYPE_SAT_MEM:
1884 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1885 MC_CMD_PORT_MEM_BIST);
1887 case EFX_BIST_TYPE_REG:
1888 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1895 efx_mcdi_execute(enp, &req);
1897 if (req.emr_rc != 0) {
1905 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1910 #endif /* EFSYS_OPT_BIST */
1913 /* Enable logging of some events (e.g. link state changes) */
1914 __checkReturn efx_rc_t
1916 __in efx_nic_t *enp)
1919 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_LOG_CTRL_IN_LEN,
1920 MC_CMD_LOG_CTRL_OUT_LEN);
1923 req.emr_cmd = MC_CMD_LOG_CTRL;
1924 req.emr_in_buf = payload;
1925 req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN;
1926 req.emr_out_buf = payload;
1927 req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN;
1929 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST,
1930 MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ);
1931 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0);
1933 efx_mcdi_execute(enp, &req);
1935 if (req.emr_rc != 0) {
1943 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1949 #if EFSYS_OPT_MAC_STATS
1951 __checkReturn efx_rc_t
1953 __in efx_nic_t *enp,
1954 __in uint32_t vport_id,
1955 __in_opt efsys_mem_t *esmp,
1956 __in efx_stats_action_t action,
1957 __in uint16_t period_ms)
1960 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_MAC_STATS_IN_LEN,
1961 MC_CMD_MAC_STATS_V2_OUT_DMA_LEN);
1962 int clear = (action == EFX_STATS_CLEAR);
1963 int upload = (action == EFX_STATS_UPLOAD);
1964 int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
1965 int events = (action == EFX_STATS_ENABLE_EVENTS);
1966 int disable = (action == EFX_STATS_DISABLE);
1969 req.emr_cmd = MC_CMD_MAC_STATS;
1970 req.emr_in_buf = payload;
1971 req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
1972 req.emr_out_buf = payload;
1973 req.emr_out_length = MC_CMD_MAC_STATS_V2_OUT_DMA_LEN;
1975 MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
1976 MAC_STATS_IN_DMA, upload,
1977 MAC_STATS_IN_CLEAR, clear,
1978 MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
1979 MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
1980 MAC_STATS_IN_PERIODIC_NOEVENT, !events,
1981 MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);
1983 if (enable || events || upload) {
1984 const efx_nic_cfg_t *encp = &enp->en_nic_cfg;
1987 /* Periodic stats or stats upload require a DMA buffer */
1993 if (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS) {
1994 /* MAC stats count too small for legacy MAC stats */
1999 bytes = encp->enc_mac_stats_nstats * sizeof (efx_qword_t);
2001 if (EFSYS_MEM_SIZE(esmp) < bytes) {
2002 /* DMA buffer too small */
2007 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
2008 EFSYS_MEM_ADDR(esmp) & 0xffffffff);
2009 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
2010 EFSYS_MEM_ADDR(esmp) >> 32);
2011 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
2015 * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
2016 * as this may fail (and leave periodic DMA enabled) if the
2017 * vadapter has already been deleted.
2019 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
2020 (disable ? EVB_PORT_ID_NULL : vport_id));
2022 efx_mcdi_execute(enp, &req);
2024 if (req.emr_rc != 0) {
2025 /* EF10: Expect ENOENT if no DMA queues are initialised */
2026 if ((req.emr_rc != ENOENT) ||
2027 (enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
2042 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2047 __checkReturn efx_rc_t
2048 efx_mcdi_mac_stats_clear(
2049 __in efx_nic_t *enp)
2053 if ((rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, NULL,
2054 EFX_STATS_CLEAR, 0)) != 0)
2060 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2065 __checkReturn efx_rc_t
2066 efx_mcdi_mac_stats_upload(
2067 __in efx_nic_t *enp,
2068 __in efsys_mem_t *esmp)
2073 * The MC DMAs aggregate statistics for our convenience, so we can
2074 * avoid having to pull the statistics buffer into the cache to
2075 * maintain cumulative statistics.
2077 if ((rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, esmp,
2078 EFX_STATS_UPLOAD, 0)) != 0)
2084 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2089 __checkReturn efx_rc_t
2090 efx_mcdi_mac_stats_periodic(
2091 __in efx_nic_t *enp,
2092 __in efsys_mem_t *esmp,
2093 __in uint16_t period_ms,
2094 __in boolean_t events)
2099 * The MC DMAs aggregate statistics for our convenience, so we can
2100 * avoid having to pull the statistics buffer into the cache to
2101 * maintain cumulative statistics.
2102 * Huntington uses a fixed 1sec period.
2103 * Medford uses a fixed 1sec period before v6.2.1.1033 firmware.
2106 rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, NULL,
2107 EFX_STATS_DISABLE, 0);
2109 rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, esmp,
2110 EFX_STATS_ENABLE_EVENTS, period_ms);
2112 rc = efx_mcdi_mac_stats(enp, enp->en_vport_id, esmp,
2113 EFX_STATS_ENABLE_NOEVENTS, period_ms);
2121 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2126 #endif /* EFSYS_OPT_MAC_STATS */
2128 #if EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10()
2131 * This function returns the pf and vf number of a function. If it is a pf the
2132 * vf number is 0xffff. The vf number is the index of the vf on that
2133 * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0),
2134 * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff).
2136 __checkReturn efx_rc_t
2137 efx_mcdi_get_function_info(
2138 __in efx_nic_t *enp,
2139 __out uint32_t *pfp,
2140 __out_opt uint32_t *vfp)
2143 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_FUNCTION_INFO_IN_LEN,
2144 MC_CMD_GET_FUNCTION_INFO_OUT_LEN);
2147 req.emr_cmd = MC_CMD_GET_FUNCTION_INFO;
2148 req.emr_in_buf = payload;
2149 req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN;
2150 req.emr_out_buf = payload;
2151 req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN;
2153 efx_mcdi_execute(enp, &req);
2155 if (req.emr_rc != 0) {
2160 if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) {
2165 *pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF);
2167 *vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF);
2174 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2179 __checkReturn efx_rc_t
2180 efx_mcdi_privilege_mask(
2181 __in efx_nic_t *enp,
2184 __out uint32_t *maskp)
2187 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_PRIVILEGE_MASK_IN_LEN,
2188 MC_CMD_PRIVILEGE_MASK_OUT_LEN);
2191 req.emr_cmd = MC_CMD_PRIVILEGE_MASK;
2192 req.emr_in_buf = payload;
2193 req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN;
2194 req.emr_out_buf = payload;
2195 req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN;
2197 MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION,
2198 PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
2199 PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
2201 efx_mcdi_execute(enp, &req);
2203 if (req.emr_rc != 0) {
2208 if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) {
2213 *maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK);
2220 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2225 #endif /* EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10() */
2227 __checkReturn efx_rc_t
2228 efx_mcdi_set_workaround(
2229 __in efx_nic_t *enp,
2231 __in boolean_t enabled,
2232 __out_opt uint32_t *flagsp)
2235 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_WORKAROUND_IN_LEN,
2236 MC_CMD_WORKAROUND_EXT_OUT_LEN);
2239 req.emr_cmd = MC_CMD_WORKAROUND;
2240 req.emr_in_buf = payload;
2241 req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN;
2242 req.emr_out_buf = payload;
2243 req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN;
2245 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type);
2246 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0);
2248 efx_mcdi_execute_quiet(enp, &req);
2250 if (req.emr_rc != 0) {
2255 if (flagsp != NULL) {
2256 if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2257 *flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS);
2265 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2271 __checkReturn efx_rc_t
2272 efx_mcdi_get_workarounds(
2273 __in efx_nic_t *enp,
2274 __out_opt uint32_t *implementedp,
2275 __out_opt uint32_t *enabledp)
2278 EFX_MCDI_DECLARE_BUF(payload, 0, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
2281 req.emr_cmd = MC_CMD_GET_WORKAROUNDS;
2282 req.emr_in_buf = NULL;
2283 req.emr_in_length = 0;
2284 req.emr_out_buf = payload;
2285 req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN;
2287 efx_mcdi_execute(enp, &req);
2289 if (req.emr_rc != 0) {
2294 if (implementedp != NULL) {
2296 MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2299 if (enabledp != NULL) {
2300 *enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED);
2306 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2312 * Size of media information page in accordance with SFF-8472 and SFF-8436.
2313 * It is used in MCDI interface as well.
2315 #define EFX_PHY_MEDIA_INFO_PAGE_SIZE 0x80
2318 * Transceiver identifiers from SFF-8024 Table 4-1.
2320 #define EFX_SFF_TRANSCEIVER_ID_SFP 0x03 /* SFP/SFP+/SFP28 */
2321 #define EFX_SFF_TRANSCEIVER_ID_QSFP 0x0c /* QSFP */
2322 #define EFX_SFF_TRANSCEIVER_ID_QSFP_PLUS 0x0d /* QSFP+ or later */
2323 #define EFX_SFF_TRANSCEIVER_ID_QSFP28 0x11 /* QSFP28 or later */
2325 static __checkReturn efx_rc_t
2326 efx_mcdi_get_phy_media_info(
2327 __in efx_nic_t *enp,
2328 __in uint32_t mcdi_page,
2329 __in uint8_t offset,
2331 __out_bcount(len) uint8_t *data)
2334 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN,
2335 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(
2336 EFX_PHY_MEDIA_INFO_PAGE_SIZE));
2339 EFSYS_ASSERT((uint32_t)offset + len <= EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2341 req.emr_cmd = MC_CMD_GET_PHY_MEDIA_INFO;
2342 req.emr_in_buf = payload;
2343 req.emr_in_length = MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN;
2344 req.emr_out_buf = payload;
2345 req.emr_out_length =
2346 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2348 MCDI_IN_SET_DWORD(req, GET_PHY_MEDIA_INFO_IN_PAGE, mcdi_page);
2350 efx_mcdi_execute(enp, &req);
2352 if (req.emr_rc != 0) {
2357 if (req.emr_out_length_used !=
2358 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE)) {
2363 if (MCDI_OUT_DWORD(req, GET_PHY_MEDIA_INFO_OUT_DATALEN) !=
2364 EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2370 MCDI_OUT2(req, uint8_t, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
2380 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2385 __checkReturn efx_rc_t
2386 efx_mcdi_phy_module_get_info(
2387 __in efx_nic_t *enp,
2388 __in uint8_t dev_addr,
2391 __out_bcount(len) uint8_t *data)
2393 efx_port_t *epp = &(enp->en_port);
2395 uint32_t mcdi_lower_page;
2396 uint32_t mcdi_upper_page;
2399 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
2402 * Map device address to MC_CMD_GET_PHY_MEDIA_INFO pages.
2403 * Offset plus length interface allows to access page 0 only.
2404 * I.e. non-zero upper pages are not accessible.
2405 * See SFF-8472 section 4 Memory Organization and SFF-8436 section 7.6
2406 * QSFP+ Memory Map for details on how information is structured
2409 switch (epp->ep_fixed_port_type) {
2410 case EFX_PHY_MEDIA_SFP_PLUS:
2411 case EFX_PHY_MEDIA_QSFP_PLUS:
2412 /* Port type supports modules */
2420 * For all supported port types, MCDI page 0 offset 0 holds the
2421 * transceiver identifier. Probe to determine the data layout.
2422 * Definitions from SFF-8024 Table 4-1.
2424 rc = efx_mcdi_get_phy_media_info(enp,
2425 0, 0, sizeof(id), &id);
2430 case EFX_SFF_TRANSCEIVER_ID_SFP:
2432 * In accordance with SFF-8472 Diagnostic Monitoring
2433 * Interface for Optical Transceivers section 4 Memory
2434 * Organization two 2-wire addresses are defined.
2437 /* Base information */
2438 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE:
2440 * MCDI page 0 should be used to access lower
2441 * page 0 (0x00 - 0x7f) at the device address 0xA0.
2443 mcdi_lower_page = 0;
2445 * MCDI page 1 should be used to access upper
2446 * page 0 (0x80 - 0xff) at the device address 0xA0.
2448 mcdi_upper_page = 1;
2451 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM:
2453 * MCDI page 2 should be used to access lower
2454 * page 0 (0x00 - 0x7f) at the device address 0xA2.
2456 mcdi_lower_page = 2;
2458 * MCDI page 3 should be used to access upper
2459 * page 0 (0x80 - 0xff) at the device address 0xA2.
2461 mcdi_upper_page = 3;
2468 case EFX_SFF_TRANSCEIVER_ID_QSFP:
2469 case EFX_SFF_TRANSCEIVER_ID_QSFP_PLUS:
2470 case EFX_SFF_TRANSCEIVER_ID_QSFP28:
2472 case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
2474 * MCDI page -1 should be used to access lower page 0
2477 mcdi_lower_page = (uint32_t)-1;
2479 * MCDI page 0 should be used to access upper page 0
2482 mcdi_upper_page = 0;
2494 EFX_STATIC_ASSERT(EFX_PHY_MEDIA_INFO_PAGE_SIZE <= 0xFF);
2496 if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2498 MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);
2500 rc = efx_mcdi_get_phy_media_info(enp,
2501 mcdi_lower_page, (uint8_t)offset, (uint8_t)read_len, data);
2510 offset -= EFX_PHY_MEDIA_INFO_PAGE_SIZE;
2514 EFSYS_ASSERT3U(len, <=, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2515 EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2517 rc = efx_mcdi_get_phy_media_info(enp,
2518 mcdi_upper_page, (uint8_t)offset, (uint8_t)len, data);
2534 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2539 #if EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10()
2541 #define INIT_EVQ_MAXNBUFS MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM
2544 # if (INIT_EVQ_MAXNBUFS < EF10_EVQ_MAXNBUFS)
2545 # error "INIT_EVQ_MAXNBUFS too small"
2547 #endif /* EFX_OPTS_EF10 */
2548 #if EFSYS_OPT_RIVERHEAD
2549 # if (INIT_EVQ_MAXNBUFS < RHEAD_EVQ_MAXNBUFS)
2550 # error "INIT_EVQ_MAXNBUFS too small"
2552 #endif /* EFSYS_OPT_RIVERHEAD */
2554 __checkReturn efx_rc_t
2556 __in efx_nic_t *enp,
2557 __in unsigned int instance,
2558 __in efsys_mem_t *esmp,
2562 __in uint32_t flags,
2563 __in boolean_t low_latency)
2565 const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
2567 EFX_MCDI_DECLARE_BUF(payload,
2568 MC_CMD_INIT_EVQ_V2_IN_LEN(INIT_EVQ_MAXNBUFS),
2569 MC_CMD_INIT_EVQ_V2_OUT_LEN);
2570 boolean_t interrupting;
2571 int ev_extended_width;
2574 unsigned int evq_type;
2575 efx_qword_t *dma_addr;
2581 npages = efx_evq_nbufs(enp, nevs, flags);
2582 if (npages > INIT_EVQ_MAXNBUFS) {
2587 req.emr_cmd = MC_CMD_INIT_EVQ;
2588 req.emr_in_buf = payload;
2589 req.emr_in_length = MC_CMD_INIT_EVQ_V2_IN_LEN(npages);
2590 req.emr_out_buf = payload;
2591 req.emr_out_length = MC_CMD_INIT_EVQ_V2_OUT_LEN;
2593 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_SIZE, nevs);
2594 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_INSTANCE, instance);
2595 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_IRQ_NUM, irq);
2597 interrupting = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
2598 EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
2600 if (encp->enc_init_evq_v2_supported) {
2602 * On Medford the low latency license is required to enable RX
2603 * and event cut through and to disable RX batching. If event
2604 * queue type in flags is auto, we let the firmware decide the
2605 * settings to use. If the adapter has a low latency license,
2606 * it will choose the best settings for low latency, otherwise
2607 * it will choose the best settings for throughput.
2609 switch (flags & EFX_EVQ_FLAGS_TYPE_MASK) {
2610 case EFX_EVQ_FLAGS_TYPE_AUTO:
2611 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_AUTO;
2613 case EFX_EVQ_FLAGS_TYPE_THROUGHPUT:
2614 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_THROUGHPUT;
2616 case EFX_EVQ_FLAGS_TYPE_LOW_LATENCY:
2617 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_LOW_LATENCY;
2623 /* EvQ type controls merging, no manual settings */
2627 /* EvQ types other than manual are not supported */
2628 evq_type = MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_MANUAL;
2630 * On Huntington RX and TX event batching can only be requested
2631 * together (even if the datapath firmware doesn't actually
2632 * support RX batching). If event cut through is enabled no RX
2633 * batching will occur.
2635 * So always enable RX and TX event batching, and enable event
2636 * cut through if we want low latency operation.
2639 switch (flags & EFX_EVQ_FLAGS_TYPE_MASK) {
2640 case EFX_EVQ_FLAGS_TYPE_AUTO:
2641 ev_cut_through = low_latency ? 1 : 0;
2643 case EFX_EVQ_FLAGS_TYPE_THROUGHPUT:
2646 case EFX_EVQ_FLAGS_TYPE_LOW_LATENCY:
2656 * On EF100, extended width event queues have a different event
2657 * descriptor layout and are used to support descriptor proxy queues.
2659 ev_extended_width = 0;
2660 #if EFSYS_OPT_EV_EXTENDED_WIDTH
2661 if (encp->enc_init_evq_extended_width_supported) {
2662 if (flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH)
2663 ev_extended_width = 1;
2667 MCDI_IN_POPULATE_DWORD_8(req, INIT_EVQ_V2_IN_FLAGS,
2668 INIT_EVQ_V2_IN_FLAG_INTERRUPTING, interrupting,
2669 INIT_EVQ_V2_IN_FLAG_RPTR_DOS, 0,
2670 INIT_EVQ_V2_IN_FLAG_INT_ARMD, 0,
2671 INIT_EVQ_V2_IN_FLAG_CUT_THRU, ev_cut_through,
2672 INIT_EVQ_V2_IN_FLAG_RX_MERGE, ev_merge,
2673 INIT_EVQ_V2_IN_FLAG_TX_MERGE, ev_merge,
2674 INIT_EVQ_V2_IN_FLAG_TYPE, evq_type,
2675 INIT_EVQ_V2_IN_FLAG_EXT_WIDTH, ev_extended_width);
2677 /* If the value is zero then disable the timer */
2679 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_MODE,
2680 MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_DIS);
2681 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_LOAD, 0);
2682 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_RELOAD, 0);
2686 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
2689 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_MODE,
2690 MC_CMD_INIT_EVQ_V2_IN_TMR_INT_HLDOFF);
2691 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_LOAD, ticks);
2692 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_RELOAD, ticks);
2695 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_COUNT_MODE,
2696 MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_DIS);
2697 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_COUNT_THRSHLD, 0);
2699 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_V2_IN_DMA_ADDR);
2700 addr = EFSYS_MEM_ADDR(esmp);
2702 for (i = 0; i < npages; i++) {
2703 EFX_POPULATE_QWORD_2(*dma_addr,
2704 EFX_DWORD_1, (uint32_t)(addr >> 32),
2705 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
2708 addr += EFX_BUF_SIZE;
2711 efx_mcdi_execute(enp, &req);
2713 if (req.emr_rc != 0) {
2718 if (encp->enc_init_evq_v2_supported) {
2719 if (req.emr_out_length_used < MC_CMD_INIT_EVQ_V2_OUT_LEN) {
2723 EFSYS_PROBE1(mcdi_evq_flags, uint32_t,
2724 MCDI_OUT_DWORD(req, INIT_EVQ_V2_OUT_FLAGS));
2726 if (req.emr_out_length_used < MC_CMD_INIT_EVQ_OUT_LEN) {
2732 /* NOTE: ignore the returned IRQ param as firmware does not set it. */
2747 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2752 __checkReturn efx_rc_t
2754 __in efx_nic_t *enp,
2755 __in uint32_t instance)
2758 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_EVQ_IN_LEN,
2759 MC_CMD_FINI_EVQ_OUT_LEN);
2762 req.emr_cmd = MC_CMD_FINI_EVQ;
2763 req.emr_in_buf = payload;
2764 req.emr_in_length = MC_CMD_FINI_EVQ_IN_LEN;
2765 req.emr_out_buf = payload;
2766 req.emr_out_length = MC_CMD_FINI_EVQ_OUT_LEN;
2768 MCDI_IN_SET_DWORD(req, FINI_EVQ_IN_INSTANCE, instance);
2770 efx_mcdi_execute_quiet(enp, &req);
2772 if (req.emr_rc != 0) {
2781 * EALREADY is not an error, but indicates that the MC has rebooted and
2782 * that the EVQ has already been destroyed.
2785 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2790 __checkReturn efx_rc_t
2792 __in efx_nic_t *enp,
2793 __in uint32_t ndescs,
2794 __in efx_evq_t *eep,
2795 __in uint32_t label,
2796 __in uint32_t instance,
2797 __in efsys_mem_t *esmp,
2798 __in const efx_mcdi_init_rxq_params_t *params)
2800 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
2802 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V5_IN_LEN,
2803 MC_CMD_INIT_RXQ_V5_OUT_LEN);
2804 int npages = efx_rxq_nbufs(enp, ndescs);
2806 efx_qword_t *dma_addr;
2810 boolean_t want_outer_classes;
2811 boolean_t no_cont_ev;
2813 EFSYS_ASSERT3U(ndescs, <=, encp->enc_rxq_max_ndescs);
2815 if ((esmp == NULL) ||
2816 (EFSYS_MEM_SIZE(esmp) < efx_rxq_size(enp, ndescs))) {
2821 no_cont_ev = (eep->ee_flags & EFX_EVQ_FLAGS_NO_CONT_EV);
2822 if ((no_cont_ev == B_TRUE) && (params->disable_scatter == B_FALSE)) {
2823 /* TODO: Support scatter in NO_CONT_EV mode */
2828 if (params->ps_buf_size > 0)
2829 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
2830 else if (params->es_bufs_per_desc > 0)
2831 dma_mode = MC_CMD_INIT_RXQ_V3_IN_EQUAL_STRIDE_SUPER_BUFFER;
2833 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
2835 if (encp->enc_tunnel_encapsulations_supported != 0 &&
2836 !params->want_inner_classes) {
2838 * WANT_OUTER_CLASSES can only be specified on hardware which
2839 * supports tunnel encapsulation offloads, even though it is
2840 * effectively the behaviour the hardware gives.
2842 * Also, on hardware which does support such offloads, older
2843 * firmware rejects the flag if the offloads are not supported
2844 * by the current firmware variant, which means this may fail if
2845 * the capabilities are not updated when the firmware variant
2846 * changes. This is not an issue on newer firmware, as it was
2847 * changed in bug 69842 (v6.4.2.1007) to permit this flag to be
2848 * specified on all firmware variants.
2850 want_outer_classes = B_TRUE;
2852 want_outer_classes = B_FALSE;
2855 req.emr_cmd = MC_CMD_INIT_RXQ;
2856 req.emr_in_buf = payload;
2857 req.emr_in_length = MC_CMD_INIT_RXQ_V5_IN_LEN;
2858 req.emr_out_buf = payload;
2859 req.emr_out_length = MC_CMD_INIT_RXQ_V5_OUT_LEN;
2861 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
2862 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, eep->ee_index);
2863 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
2864 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
2865 MCDI_IN_POPULATE_DWORD_10(req, INIT_RXQ_EXT_IN_FLAGS,
2866 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
2867 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
2868 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
2869 INIT_RXQ_EXT_IN_CRC_MODE, 0,
2870 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
2871 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, params->disable_scatter,
2872 INIT_RXQ_EXT_IN_DMA_MODE,
2874 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, params->ps_buf_size,
2875 INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes,
2876 INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV, no_cont_ev);
2877 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
2878 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, enp->en_vport_id);
2880 if (params->es_bufs_per_desc > 0) {
2881 MCDI_IN_SET_DWORD(req,
2882 INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET,
2883 params->es_bufs_per_desc);
2884 MCDI_IN_SET_DWORD(req,
2885 INIT_RXQ_V3_IN_ES_MAX_DMA_LEN, params->es_max_dma_len);
2886 MCDI_IN_SET_DWORD(req,
2887 INIT_RXQ_V3_IN_ES_PACKET_STRIDE, params->es_buf_stride);
2888 MCDI_IN_SET_DWORD(req,
2889 INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT,
2890 params->hol_block_timeout);
2893 if (encp->enc_init_rxq_with_buffer_size)
2894 MCDI_IN_SET_DWORD(req, INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES,
2897 MCDI_IN_SET_DWORD(req, INIT_RXQ_V5_IN_RX_PREFIX_ID, params->prefix_id);
2899 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
2900 addr = EFSYS_MEM_ADDR(esmp);
2902 for (i = 0; i < npages; i++) {
2903 EFX_POPULATE_QWORD_2(*dma_addr,
2904 EFX_DWORD_1, (uint32_t)(addr >> 32),
2905 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
2908 addr += EFX_BUF_SIZE;
2911 efx_mcdi_execute(enp, &req);
2913 if (req.emr_rc != 0) {
2925 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2930 __checkReturn efx_rc_t
2932 __in efx_nic_t *enp,
2933 __in uint32_t instance)
2936 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_RXQ_IN_LEN,
2937 MC_CMD_FINI_RXQ_OUT_LEN);
2940 req.emr_cmd = MC_CMD_FINI_RXQ;
2941 req.emr_in_buf = payload;
2942 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
2943 req.emr_out_buf = payload;
2944 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
2946 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
2948 efx_mcdi_execute_quiet(enp, &req);
2950 if (req.emr_rc != 0) {
2959 * EALREADY is not an error, but indicates that the MC has rebooted and
2960 * that the RXQ has already been destroyed.
2963 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2968 __checkReturn efx_rc_t
2970 __in efx_nic_t *enp,
2971 __in uint32_t ndescs,
2972 __in uint32_t target_evq,
2973 __in uint32_t label,
2974 __in uint32_t instance,
2975 __in uint16_t flags,
2976 __in efsys_mem_t *esmp)
2979 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_TXQ_EXT_IN_LEN,
2980 MC_CMD_INIT_TXQ_OUT_LEN);
2981 efx_qword_t *dma_addr;
2987 EFSYS_ASSERT(MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM >=
2988 efx_txq_nbufs(enp, enp->en_nic_cfg.enc_txq_max_ndescs));
2990 if ((esmp == NULL) ||
2991 (EFSYS_MEM_SIZE(esmp) < efx_txq_size(enp, ndescs))) {
2996 npages = efx_txq_nbufs(enp, ndescs);
2997 if (MC_CMD_INIT_TXQ_IN_LEN(npages) > sizeof (payload)) {
3002 req.emr_cmd = MC_CMD_INIT_TXQ;
3003 req.emr_in_buf = payload;
3004 req.emr_in_length = MC_CMD_INIT_TXQ_IN_LEN(npages);
3005 req.emr_out_buf = payload;
3006 req.emr_out_length = MC_CMD_INIT_TXQ_OUT_LEN;
3008 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_SIZE, ndescs);
3009 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_TARGET_EVQ, target_evq);
3010 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_LABEL, label);
3011 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_INSTANCE, instance);
3013 MCDI_IN_POPULATE_DWORD_9(req, INIT_TXQ_IN_FLAGS,
3014 INIT_TXQ_IN_FLAG_BUFF_MODE, 0,
3015 INIT_TXQ_IN_FLAG_IP_CSUM_DIS,
3016 (flags & EFX_TXQ_CKSUM_IPV4) ? 0 : 1,
3017 INIT_TXQ_IN_FLAG_TCP_CSUM_DIS,
3018 (flags & EFX_TXQ_CKSUM_TCPUDP) ? 0 : 1,
3019 INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN,
3020 (flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0,
3021 INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN,
3022 (flags & EFX_TXQ_CKSUM_INNER_TCPUDP) ? 1 : 0,
3023 INIT_TXQ_EXT_IN_FLAG_TSOV2_EN, (flags & EFX_TXQ_FATSOV2) ? 1 : 0,
3024 INIT_TXQ_IN_FLAG_TCP_UDP_ONLY, 0,
3025 INIT_TXQ_IN_CRC_MODE, 0,
3026 INIT_TXQ_IN_FLAG_TIMESTAMP, 0);
3028 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_OWNER_ID, 0);
3029 MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_PORT_ID, enp->en_vport_id);
3031 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_TXQ_IN_DMA_ADDR);
3032 addr = EFSYS_MEM_ADDR(esmp);
3034 for (i = 0; i < npages; i++) {
3035 EFX_POPULATE_QWORD_2(*dma_addr,
3036 EFX_DWORD_1, (uint32_t)(addr >> 32),
3037 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
3040 addr += EFX_BUF_SIZE;
3043 efx_mcdi_execute(enp, &req);
3045 if (req.emr_rc != 0) {
3057 EFSYS_PROBE1(fail1, efx_rc_t, rc);
3062 __checkReturn efx_rc_t
3064 __in efx_nic_t *enp,
3065 __in uint32_t instance)
3068 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_TXQ_IN_LEN,
3069 MC_CMD_FINI_TXQ_OUT_LEN);
3072 req.emr_cmd = MC_CMD_FINI_TXQ;
3073 req.emr_in_buf = payload;
3074 req.emr_in_length = MC_CMD_FINI_TXQ_IN_LEN;
3075 req.emr_out_buf = payload;
3076 req.emr_out_length = MC_CMD_FINI_TXQ_OUT_LEN;
3078 MCDI_IN_SET_DWORD(req, FINI_TXQ_IN_INSTANCE, instance);
3080 efx_mcdi_execute_quiet(enp, &req);
3082 if (req.emr_rc != 0) {
3091 * EALREADY is not an error, but indicates that the MC has rebooted and
3092 * that the TXQ has already been destroyed.
3095 EFSYS_PROBE1(fail1, efx_rc_t, rc);
3100 #endif /* EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10() */
3102 #endif /* EFSYS_OPT_MCDI */