1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
6 #include <rte_bus_vdev.h>
7 #include <rte_common.h>
8 #include <rte_malloc.h>
9 #include <rte_compressdev_pmd.h>
11 #include "isal_compress_pmd_private.h"
13 #define RTE_COMP_ISAL_WINDOW_SIZE 15
14 #define RTE_COMP_ISAL_LEVEL_ZERO 0 /* ISA-L Level 0 used for fixed Huffman */
15 #define RTE_COMP_ISAL_LEVEL_ONE 1
16 #define RTE_COMP_ISAL_LEVEL_TWO 2
17 #define RTE_COMP_ISAL_LEVEL_THREE 3 /* Optimised for AVX512 & AVX2 only */
19 int isal_logtype_driver;
21 /* Verify and set private xform parameters */
23 isal_comp_set_priv_xform_parameters(struct isal_priv_xform *priv_xform,
24 const struct rte_comp_xform *xform)
29 /* Set compression private xform variables */
30 if (xform->type == RTE_COMP_COMPRESS) {
31 /* Set private xform type - COMPRESS/DECOMPRESS */
32 priv_xform->type = RTE_COMP_COMPRESS;
34 /* Set private xform algorithm */
35 if (xform->compress.algo != RTE_COMP_ALGO_DEFLATE) {
36 if (xform->compress.algo == RTE_COMP_ALGO_NULL) {
37 ISAL_PMD_LOG(ERR, "By-pass not supported\n");
40 ISAL_PMD_LOG(ERR, "Algorithm not supported\n");
43 priv_xform->compress.algo = RTE_COMP_ALGO_DEFLATE;
45 /* Set private xform checksum - raw deflate by default */
46 if (xform->compress.chksum != RTE_COMP_CHECKSUM_NONE) {
47 ISAL_PMD_LOG(ERR, "Checksum not supported\n");
51 /* Set private xform window size, 32K supported */
52 if (xform->compress.window_size == RTE_COMP_ISAL_WINDOW_SIZE)
53 priv_xform->compress.window_size =
54 RTE_COMP_ISAL_WINDOW_SIZE;
56 ISAL_PMD_LOG(ERR, "Window size not supported\n");
60 /* Set private xform huffman type */
61 switch (xform->compress.deflate.huffman) {
62 case(RTE_COMP_HUFFMAN_DEFAULT):
63 priv_xform->compress.deflate.huffman =
64 RTE_COMP_HUFFMAN_DEFAULT;
66 case(RTE_COMP_HUFFMAN_FIXED):
67 priv_xform->compress.deflate.huffman =
68 RTE_COMP_HUFFMAN_FIXED;
70 case(RTE_COMP_HUFFMAN_DYNAMIC):
71 priv_xform->compress.deflate.huffman =
72 RTE_COMP_HUFFMAN_DYNAMIC;
75 ISAL_PMD_LOG(ERR, "Huffman code not supported\n");
79 /* Set private xform level.
80 * Checking compliance with compressdev API, -1 <= level => 9
82 if (xform->compress.level < RTE_COMP_LEVEL_PMD_DEFAULT ||
83 xform->compress.level > RTE_COMP_LEVEL_MAX) {
84 ISAL_PMD_LOG(ERR, "Compression level out of range\n");
87 /* Check for Compressdev API level 0, No compression
88 * not supported in ISA-L
90 else if (xform->compress.level == RTE_COMP_LEVEL_NONE) {
91 ISAL_PMD_LOG(ERR, "No Compression not supported\n");
94 /* If using fixed huffman code, level must be 0 */
95 else if (priv_xform->compress.deflate.huffman ==
96 RTE_COMP_HUFFMAN_FIXED) {
97 ISAL_PMD_LOG(DEBUG, "ISA-L level 0 used due to a"
98 " fixed huffman code\n");
99 priv_xform->compress.level = RTE_COMP_ISAL_LEVEL_ZERO;
100 priv_xform->level_buffer_size =
101 ISAL_DEF_LVL0_DEFAULT;
103 /* Mapping API levels to ISA-L levels 1,2 & 3 */
104 switch (xform->compress.level) {
105 case RTE_COMP_LEVEL_PMD_DEFAULT:
106 /* Default is 1 if not using fixed huffman */
107 priv_xform->compress.level =
108 RTE_COMP_ISAL_LEVEL_ONE;
109 priv_xform->level_buffer_size =
110 ISAL_DEF_LVL1_DEFAULT;
112 case RTE_COMP_LEVEL_MIN:
113 priv_xform->compress.level =
114 RTE_COMP_ISAL_LEVEL_ONE;
115 priv_xform->level_buffer_size =
116 ISAL_DEF_LVL1_DEFAULT;
118 case RTE_COMP_ISAL_LEVEL_TWO:
119 priv_xform->compress.level =
120 RTE_COMP_ISAL_LEVEL_TWO;
121 priv_xform->level_buffer_size =
122 ISAL_DEF_LVL2_DEFAULT;
124 /* Level 3 or higher requested */
126 /* Check for AVX512, to use ISA-L level 3 */
127 if (rte_cpu_get_flag_enabled(
128 RTE_CPUFLAG_AVX512F)) {
129 priv_xform->compress.level =
130 RTE_COMP_ISAL_LEVEL_THREE;
131 priv_xform->level_buffer_size =
132 ISAL_DEF_LVL3_DEFAULT;
134 /* Check for AVX2, to use ISA-L level 3 */
135 else if (rte_cpu_get_flag_enabled(
137 priv_xform->compress.level =
138 RTE_COMP_ISAL_LEVEL_THREE;
139 priv_xform->level_buffer_size =
140 ISAL_DEF_LVL3_DEFAULT;
142 ISAL_PMD_LOG(DEBUG, "Requested ISA-L level"
143 " 3 or above; Level 3 optimized"
144 " for AVX512 & AVX2 only."
145 " level changed to 2.\n");
146 priv_xform->compress.level =
147 RTE_COMP_ISAL_LEVEL_TWO;
148 priv_xform->level_buffer_size =
149 ISAL_DEF_LVL2_DEFAULT;
155 /* Set decompression private xform variables */
156 else if (xform->type == RTE_COMP_DECOMPRESS) {
158 /* Set private xform type - COMPRESS/DECOMPRESS */
159 priv_xform->type = RTE_COMP_DECOMPRESS;
161 /* Set private xform algorithm */
162 if (xform->decompress.algo != RTE_COMP_ALGO_DEFLATE) {
163 if (xform->decompress.algo == RTE_COMP_ALGO_NULL) {
164 ISAL_PMD_LOG(ERR, "By pass not supported\n");
167 ISAL_PMD_LOG(ERR, "Algorithm not supported\n");
170 priv_xform->decompress.algo = RTE_COMP_ALGO_DEFLATE;
172 /* Set private xform checksum - raw deflate by default */
173 if (xform->compress.chksum != RTE_COMP_CHECKSUM_NONE) {
174 ISAL_PMD_LOG(ERR, "Checksum not supported\n");
178 /* Set private xform window size, 32K supported */
179 if (xform->decompress.window_size == RTE_COMP_ISAL_WINDOW_SIZE)
180 priv_xform->decompress.window_size =
181 RTE_COMP_ISAL_WINDOW_SIZE;
183 ISAL_PMD_LOG(ERR, "Window size not supported\n");
190 /* Process compression/decompression operation */
192 process_op(struct isal_comp_qp *qp __rte_unused,
193 struct rte_comp_op *op __rte_unused,
194 struct isal_priv_xform *priv_xform)
196 switch (priv_xform->type) {
197 case RTE_COMP_COMPRESS:
199 case RTE_COMP_DECOMPRESS:
202 ISAL_PMD_LOG(ERR, "Operation Not Supported\n");
210 isal_comp_pmd_enqueue_burst(void *queue_pair, struct rte_comp_op **ops,
213 struct isal_comp_qp *qp = queue_pair;
216 int16_t num_enq = RTE_MIN(qp->num_free_elements, nb_ops);
218 for (i = 0; i < num_enq; i++) {
219 if (unlikely(ops[i]->op_type != RTE_COMP_OP_STATELESS)) {
220 ops[i]->status = RTE_COMP_OP_STATUS_INVALID_ARGS;
221 ISAL_PMD_LOG(ERR, "Stateful operation not Supported\n");
222 qp->qp_stats.enqueue_err_count++;
225 retval = process_op(qp, ops[i], ops[i]->private_xform);
226 if (unlikely(retval < 0) ||
227 ops[i]->status != RTE_COMP_OP_STATUS_SUCCESS) {
228 qp->qp_stats.enqueue_err_count++;
232 retval = rte_ring_enqueue_burst(qp->processed_pkts, (void *)ops,
234 qp->num_free_elements -= retval;
235 qp->qp_stats.enqueued_count += retval;
242 isal_comp_pmd_dequeue_burst(void *queue_pair, struct rte_comp_op **ops,
245 struct isal_comp_qp *qp = queue_pair;
246 uint16_t nb_dequeued;
248 nb_dequeued = rte_ring_dequeue_burst(qp->processed_pkts, (void **)ops,
250 qp->num_free_elements += nb_dequeued;
251 qp->qp_stats.dequeued_count += nb_dequeued;
256 /* Create ISA-L compression device */
258 compdev_isal_create(const char *name, struct rte_vdev_device *vdev,
259 struct rte_compressdev_pmd_init_params *init_params)
261 struct rte_compressdev *dev;
263 dev = rte_compressdev_pmd_create(name, &vdev->device,
264 sizeof(struct isal_comp_private), init_params);
266 ISAL_PMD_LOG(ERR, "failed to create compressdev vdev");
270 dev->dev_ops = isal_compress_pmd_ops;
272 /* register rx/tx burst functions for data path */
273 dev->dequeue_burst = isal_comp_pmd_dequeue_burst;
274 dev->enqueue_burst = isal_comp_pmd_enqueue_burst;
279 /** Remove compression device */
281 compdev_isal_remove_dev(struct rte_vdev_device *vdev)
283 struct rte_compressdev *compdev;
286 name = rte_vdev_device_name(vdev);
290 compdev = rte_compressdev_pmd_get_named_dev(name);
294 return rte_compressdev_pmd_destroy(compdev);
297 /** Initialise ISA-L compression device */
299 compdev_isal_probe(struct rte_vdev_device *dev)
301 struct rte_compressdev_pmd_init_params init_params = {
305 const char *name, *args;
308 name = rte_vdev_device_name(dev);
312 args = rte_vdev_device_args(dev);
314 retval = rte_compressdev_pmd_parse_input_args(&init_params, args);
317 "Failed to parse initialisation arguments[%s]\n", args);
321 return compdev_isal_create(name, dev, &init_params);
324 static struct rte_vdev_driver compdev_isal_pmd_drv = {
325 .probe = compdev_isal_probe,
326 .remove = compdev_isal_remove_dev,
329 RTE_PMD_REGISTER_VDEV(COMPDEV_NAME_ISAL_PMD, compdev_isal_pmd_drv);
330 RTE_PMD_REGISTER_PARAM_STRING(COMPDEV_NAME_ISAL_PMD,
333 RTE_INIT(isal_init_log);
338 isal_logtype_driver = rte_log_register("comp_isal");
339 if (isal_logtype_driver >= 0)
340 rte_log_set_level(isal_logtype_driver, RTE_LOG_INFO);