drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   5  *   Copyright (c) 2016 NXP. All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <time.h>
  35 #include <net/if.h>
  36
  37 #include <rte_mbuf.h>
  38 #include <rte_cryptodev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_memcpy.h>
  41 #include <rte_string_fns.h>
  42 #include <rte_cycles.h>
  43 #include <rte_kvargs.h>
  44 #include <rte_dev.h>
  45 #include <rte_cryptodev_pmd.h>
  46 #include <rte_common.h>
  47 #include <rte_fslmc.h>
  48 #include <fslmc_vfio.h>
  49 #include <dpaa2_hw_pvt.h>
  50 #include <dpaa2_hw_dpio.h>
  51 #include <dpaa2_hw_mempool.h>
  52 #include <fsl_dpseci.h>
  53 #include <fsl_mc_sys.h>
  54
  55 #include "dpaa2_sec_priv.h"
  56 #include "dpaa2_sec_logs.h"
  57
  58 /* RTA header files */
  59 #include <hw/desc/ipsec.h>
  60 #include <hw/desc/algo.h>
  61
  62 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
  63  * a pointer to the shared descriptor
  64  */
  65 #define MIN_JOB_DESC_SIZE       (CAAM_CMD_SZ + CAAM_PTR_SZ)
  66 #define FSL_VENDOR_ID           0x1957
  67 #define FSL_DEVICE_ID           0x410
  68 #define FSL_SUBSYSTEM_SEC       1
  69 #define FSL_MC_DPSECI_DEVID     3
  70
  71 #define NO_PREFETCH 0
  72 /* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
  73 #define FLE_POOL_NUM_BUFS       32000
  74 #define FLE_POOL_BUF_SIZE       256
  75 #define FLE_POOL_CACHE_SIZE     512
  76
  77 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
  78
  79 static uint8_t cryptodev_driver_id;
  80
  81 static inline int
  82 build_authenc_gcm_fd(dpaa2_sec_session *sess,
  83                      struct rte_crypto_op *op,
  84                      struct qbman_fd *fd, uint16_t bpid)
  85 {
  86         struct rte_crypto_sym_op *sym_op = op->sym;
  87         struct ctxt_priv *priv = sess->ctxt;
  88         struct qbman_fle *fle, *sge;
  89         struct sec_flow_context *flc;
  90         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
  91         int icv_len = sess->digest_length, retval;
  92         uint8_t *old_icv;
  93         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
  94                         sess->iv.offset);
  95
  96         PMD_INIT_FUNC_TRACE();
  97
  98         /* TODO we are using the first FLE entry to store Mbuf and session ctxt.
  99          * Currently we donot know which FLE has the mbuf stored.
 100          * So while retreiving we can go back 1 FLE from the FD -ADDR
 101          * to get the MBUF Addr from the previous FLE.
 102          * We can have a better approach to use the inline Mbuf
 103          */
 104         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 105         if (retval) {
 106                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 107                 return -1;
 108         }
 109         memset(fle, 0, FLE_POOL_BUF_SIZE);
 110         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 111         DPAA2_FLE_SAVE_CTXT(fle, priv);
 112         fle = fle + 1;
 113         sge = fle + 2;
 114         if (likely(bpid < MAX_BPID)) {
 115                 DPAA2_SET_FD_BPID(fd, bpid);
 116                 DPAA2_SET_FLE_BPID(fle, bpid);
 117                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 118                 DPAA2_SET_FLE_BPID(sge, bpid);
 119                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 120                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 121                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 122         } else {
 123                 DPAA2_SET_FD_IVP(fd);
 124                 DPAA2_SET_FLE_IVP(fle);
 125                 DPAA2_SET_FLE_IVP((fle + 1));
 126                 DPAA2_SET_FLE_IVP(sge);
 127                 DPAA2_SET_FLE_IVP((sge + 1));
 128                 DPAA2_SET_FLE_IVP((sge + 2));
 129                 DPAA2_SET_FLE_IVP((sge + 3));
 130         }
 131
 132         /* Save the shared descriptor */
 133         flc = &priv->flc_desc[0].flc;
 134         /* Configure FD as a FRAME LIST */
 135         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 136         DPAA2_SET_FD_COMPOUND_FMT(fd);
 137         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 138
 139         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 140                    "iv-len=%d data_off: 0x%x\n",
 141                    sym_op->aead.data.offset,
 142                    sym_op->aead.data.length,
 143                    sym_op->aead.digest.length,
 144                    sess->iv.length,
 145                    sym_op->m_src->data_off);
 146
 147         /* Configure Output FLE with Scatter/Gather Entry */
 148         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 149         if (auth_only_len)
 150                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 151         fle->length = (sess->dir == DIR_ENC) ?
 152                         (sym_op->aead.data.length + icv_len + auth_only_len) :
 153                         sym_op->aead.data.length + auth_only_len;
 154
 155         DPAA2_SET_FLE_SG_EXT(fle);
 156
 157         /* Configure Output SGE for Encap/Decap */
 158         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 159         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 160                                 sym_op->m_src->data_off - auth_only_len);
 161         sge->length = sym_op->aead.data.length + auth_only_len;
 162
 163         if (sess->dir == DIR_ENC) {
 164                 sge++;
 165                 DPAA2_SET_FLE_ADDR(sge,
 166                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
 167                 sge->length = sess->digest_length;
 168                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 169                                         sess->iv.length + auth_only_len));
 170         }
 171         DPAA2_SET_FLE_FIN(sge);
 172
 173         sge++;
 174         fle++;
 175
 176         /* Configure Input FLE with Scatter/Gather Entry */
 177         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 178         DPAA2_SET_FLE_SG_EXT(fle);
 179         DPAA2_SET_FLE_FIN(fle);
 180         fle->length = (sess->dir == DIR_ENC) ?
 181                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
 182                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
 183                  sess->digest_length);
 184
 185         /* Configure Input SGE for Encap/Decap */
 186         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
 187         sge->length = sess->iv.length;
 188         sge++;
 189         if (auth_only_len) {
 190                 DPAA2_SET_FLE_ADDR(sge,
 191                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
 192                 sge->length = auth_only_len;
 193                 DPAA2_SET_FLE_BPID(sge, bpid);
 194                 sge++;
 195         }
 196
 197         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 198         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 199                                 sym_op->m_src->data_off);
 200         sge->length = sym_op->aead.data.length;
 201         if (sess->dir == DIR_DEC) {
 202                 sge++;
 203                 old_icv = (uint8_t *)(sge + 1);
 204                 memcpy(old_icv, sym_op->aead.digest.data,
 205                        sess->digest_length);
 206                 memset(sym_op->aead.digest.data, 0, sess->digest_length);
 207                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 208                 sge->length = sess->digest_length;
 209                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 210                                  sess->digest_length +
 211                                  sess->iv.length +
 212                                  auth_only_len));
 213         }
 214         DPAA2_SET_FLE_FIN(sge);
 215
 216         if (auth_only_len) {
 217                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 218                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 219         }
 220
 221         return 0;
 222 }
 223
 224 static inline int
 225 build_authenc_fd(dpaa2_sec_session *sess,
 226                  struct rte_crypto_op *op,
 227                  struct qbman_fd *fd, uint16_t bpid)
 228 {
 229         struct rte_crypto_sym_op *sym_op = op->sym;
 230         struct ctxt_priv *priv = sess->ctxt;
 231         struct qbman_fle *fle, *sge;
 232         struct sec_flow_context *flc;
 233         uint32_t auth_only_len = sym_op->auth.data.length -
 234                                 sym_op->cipher.data.length;
 235         int icv_len = sess->digest_length, retval;
 236         uint8_t *old_icv;
 237         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 238                         sess->iv.offset);
 239
 240         PMD_INIT_FUNC_TRACE();
 241
 242         /* we are using the first FLE entry to store Mbuf.
 243          * Currently we donot know which FLE has the mbuf stored.
 244          * So while retreiving we can go back 1 FLE from the FD -ADDR
 245          * to get the MBUF Addr from the previous FLE.
 246          * We can have a better approach to use the inline Mbuf
 247          */
 248         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 249         if (retval) {
 250                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 251                 return -1;
 252         }
 253         memset(fle, 0, FLE_POOL_BUF_SIZE);
 254         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 255         DPAA2_FLE_SAVE_CTXT(fle, priv);
 256         fle = fle + 1;
 257         sge = fle + 2;
 258         if (likely(bpid < MAX_BPID)) {
 259                 DPAA2_SET_FD_BPID(fd, bpid);
 260                 DPAA2_SET_FLE_BPID(fle, bpid);
 261                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 262                 DPAA2_SET_FLE_BPID(sge, bpid);
 263                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 264                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 265                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 266         } else {
 267                 DPAA2_SET_FD_IVP(fd);
 268                 DPAA2_SET_FLE_IVP(fle);
 269                 DPAA2_SET_FLE_IVP((fle + 1));
 270                 DPAA2_SET_FLE_IVP(sge);
 271                 DPAA2_SET_FLE_IVP((sge + 1));
 272                 DPAA2_SET_FLE_IVP((sge + 2));
 273                 DPAA2_SET_FLE_IVP((sge + 3));
 274         }
 275
 276         /* Save the shared descriptor */
 277         flc = &priv->flc_desc[0].flc;
 278         /* Configure FD as a FRAME LIST */
 279         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 280         DPAA2_SET_FD_COMPOUND_FMT(fd);
 281         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 282
 283         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 284                    "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
 285                    sym_op->auth.data.offset,
 286                    sym_op->auth.data.length,
 287                    sess->digest_length,
 288                    sym_op->cipher.data.offset,
 289                    sym_op->cipher.data.length,
 290                    sess->iv.length,
 291                    sym_op->m_src->data_off);
 292
 293         /* Configure Output FLE with Scatter/Gather Entry */
 294         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 295         if (auth_only_len)
 296                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 297         fle->length = (sess->dir == DIR_ENC) ?
 298                         (sym_op->cipher.data.length + icv_len) :
 299                         sym_op->cipher.data.length;
 300
 301         DPAA2_SET_FLE_SG_EXT(fle);
 302
 303         /* Configure Output SGE for Encap/Decap */
 304         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 305         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 306                                 sym_op->m_src->data_off);
 307         sge->length = sym_op->cipher.data.length;
 308
 309         if (sess->dir == DIR_ENC) {
 310                 sge++;
 311                 DPAA2_SET_FLE_ADDR(sge,
 312                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 313                 sge->length = sess->digest_length;
 314                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 315                                         sess->iv.length));
 316         }
 317         DPAA2_SET_FLE_FIN(sge);
 318
 319         sge++;
 320         fle++;
 321
 322         /* Configure Input FLE with Scatter/Gather Entry */
 323         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 324         DPAA2_SET_FLE_SG_EXT(fle);
 325         DPAA2_SET_FLE_FIN(fle);
 326         fle->length = (sess->dir == DIR_ENC) ?
 327                         (sym_op->auth.data.length + sess->iv.length) :
 328                         (sym_op->auth.data.length + sess->iv.length +
 329                          sess->digest_length);
 330
 331         /* Configure Input SGE for Encap/Decap */
 332         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 333         sge->length = sess->iv.length;
 334         sge++;
 335
 336         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 337         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 338                                 sym_op->m_src->data_off);
 339         sge->length = sym_op->auth.data.length;
 340         if (sess->dir == DIR_DEC) {
 341                 sge++;
 342                 old_icv = (uint8_t *)(sge + 1);
 343                 memcpy(old_icv, sym_op->auth.digest.data,
 344                        sess->digest_length);
 345                 memset(sym_op->auth.digest.data, 0, sess->digest_length);
 346                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 347                 sge->length = sess->digest_length;
 348                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 349                                  sess->digest_length +
 350                                  sess->iv.length));
 351         }
 352         DPAA2_SET_FLE_FIN(sge);
 353         if (auth_only_len) {
 354                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 355                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 356         }
 357         return 0;
 358 }
 359
 360 static inline int
 361 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 362               struct qbman_fd *fd, uint16_t bpid)
 363 {
 364         struct rte_crypto_sym_op *sym_op = op->sym;
 365         struct qbman_fle *fle, *sge;
 366         struct sec_flow_context *flc;
 367         struct ctxt_priv *priv = sess->ctxt;
 368         uint8_t *old_digest;
 369         int retval;
 370
 371         PMD_INIT_FUNC_TRACE();
 372
 373         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 374         if (retval) {
 375                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 376                 return -1;
 377         }
 378         memset(fle, 0, FLE_POOL_BUF_SIZE);
 379         /* TODO we are using the first FLE entry to store Mbuf.
 380          * Currently we donot know which FLE has the mbuf stored.
 381          * So while retreiving we can go back 1 FLE from the FD -ADDR
 382          * to get the MBUF Addr from the previous FLE.
 383          * We can have a better approach to use the inline Mbuf
 384          */
 385         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 386         DPAA2_FLE_SAVE_CTXT(fle, priv);
 387         fle = fle + 1;
 388
 389         if (likely(bpid < MAX_BPID)) {
 390                 DPAA2_SET_FD_BPID(fd, bpid);
 391                 DPAA2_SET_FLE_BPID(fle, bpid);
 392                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 393         } else {
 394                 DPAA2_SET_FD_IVP(fd);
 395                 DPAA2_SET_FLE_IVP(fle);
 396                 DPAA2_SET_FLE_IVP((fle + 1));
 397         }
 398         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 399         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 400
 401         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 402         fle->length = sess->digest_length;
 403
 404         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 405         DPAA2_SET_FD_COMPOUND_FMT(fd);
 406         fle++;
 407
 408         if (sess->dir == DIR_ENC) {
 409                 DPAA2_SET_FLE_ADDR(fle,
 410                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 411                 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
 412                                      sym_op->m_src->data_off);
 413                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
 414                 fle->length = sym_op->auth.data.length;
 415         } else {
 416                 sge = fle + 2;
 417                 DPAA2_SET_FLE_SG_EXT(fle);
 418                 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 419
 420                 if (likely(bpid < MAX_BPID)) {
 421                         DPAA2_SET_FLE_BPID(sge, bpid);
 422                         DPAA2_SET_FLE_BPID(sge + 1, bpid);
 423                 } else {
 424                         DPAA2_SET_FLE_IVP(sge);
 425                         DPAA2_SET_FLE_IVP((sge + 1));
 426                 }
 427                 DPAA2_SET_FLE_ADDR(sge,
 428                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 429                 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 430                                      sym_op->m_src->data_off);
 431
 432                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
 433                                  sess->digest_length);
 434                 sge->length = sym_op->auth.data.length;
 435                 sge++;
 436                 old_digest = (uint8_t *)(sge + 1);
 437                 rte_memcpy(old_digest, sym_op->auth.digest.data,
 438                            sess->digest_length);
 439                 memset(sym_op->auth.digest.data, 0, sess->digest_length);
 440                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
 441                 sge->length = sess->digest_length;
 442                 fle->length = sym_op->auth.data.length +
 443                                 sess->digest_length;
 444                 DPAA2_SET_FLE_FIN(sge);
 445         }
 446         DPAA2_SET_FLE_FIN(fle);
 447
 448         return 0;
 449 }
 450
 451 static int
 452 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 453                 struct qbman_fd *fd, uint16_t bpid)
 454 {
 455         struct rte_crypto_sym_op *sym_op = op->sym;
 456         struct qbman_fle *fle, *sge;
 457         int retval;
 458         struct sec_flow_context *flc;
 459         struct ctxt_priv *priv = sess->ctxt;
 460         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 461                         sess->iv.offset);
 462
 463         PMD_INIT_FUNC_TRACE();
 464
 465         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 466         if (retval) {
 467                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 468                 return -1;
 469         }
 470         memset(fle, 0, FLE_POOL_BUF_SIZE);
 471         /* TODO we are using the first FLE entry to store Mbuf.
 472          * Currently we donot know which FLE has the mbuf stored.
 473          * So while retreiving we can go back 1 FLE from the FD -ADDR
 474          * to get the MBUF Addr from the previous FLE.
 475          * We can have a better approach to use the inline Mbuf
 476          */
 477         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 478         DPAA2_FLE_SAVE_CTXT(fle, priv);
 479         fle = fle + 1;
 480         sge = fle + 2;
 481
 482         if (likely(bpid < MAX_BPID)) {
 483                 DPAA2_SET_FD_BPID(fd, bpid);
 484                 DPAA2_SET_FLE_BPID(fle, bpid);
 485                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 486                 DPAA2_SET_FLE_BPID(sge, bpid);
 487                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 488         } else {
 489                 DPAA2_SET_FD_IVP(fd);
 490                 DPAA2_SET_FLE_IVP(fle);
 491                 DPAA2_SET_FLE_IVP((fle + 1));
 492                 DPAA2_SET_FLE_IVP(sge);
 493                 DPAA2_SET_FLE_IVP((sge + 1));
 494         }
 495
 496         flc = &priv->flc_desc[0].flc;
 497         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 498         DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
 499                          sess->iv.length);
 500         DPAA2_SET_FD_COMPOUND_FMT(fd);
 501         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 502
 503         PMD_TX_LOG(DEBUG, "cipher_off: 0x%x/length %d,ivlen=%d data_off: 0x%x",
 504                    sym_op->cipher.data.offset,
 505                    sym_op->cipher.data.length,
 506                    sess->iv.length,
 507                    sym_op->m_src->data_off);
 508
 509         DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 510         DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
 511                              sym_op->m_src->data_off);
 512
 513         fle->length = sym_op->cipher.data.length + sess->iv.length;
 514
 515         PMD_TX_LOG(DEBUG, "1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
 516                    flc, fle, fle->addr_hi, fle->addr_lo, fle->length);
 517
 518         fle++;
 519
 520         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 521         fle->length = sym_op->cipher.data.length + sess->iv.length;
 522
 523         DPAA2_SET_FLE_SG_EXT(fle);
 524
 525         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 526         sge->length = sess->iv.length;
 527
 528         sge++;
 529         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 530         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 531                              sym_op->m_src->data_off);
 532
 533         sge->length = sym_op->cipher.data.length;
 534         DPAA2_SET_FLE_FIN(sge);
 535         DPAA2_SET_FLE_FIN(fle);
 536
 537         PMD_TX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 538                    (void *)DPAA2_GET_FD_ADDR(fd),
 539                    DPAA2_GET_FD_BPID(fd),
 540                    rte_dpaa2_bpid_info[bpid].meta_data_size,
 541                    DPAA2_GET_FD_OFFSET(fd),
 542                    DPAA2_GET_FD_LEN(fd));
 543
 544         return 0;
 545 }
 546
 547 static inline int
 548 build_sec_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 549              struct qbman_fd *fd, uint16_t bpid)
 550 {
 551         int ret = -1;
 552
 553         PMD_INIT_FUNC_TRACE();
 554
 555         switch (sess->ctxt_type) {
 556         case DPAA2_SEC_CIPHER:
 557                 ret = build_cipher_fd(sess, op, fd, bpid);
 558                 break;
 559         case DPAA2_SEC_AUTH:
 560                 ret = build_auth_fd(sess, op, fd, bpid);
 561                 break;
 562         case DPAA2_SEC_AEAD:
 563                 ret = build_authenc_gcm_fd(sess, op, fd, bpid);
 564                 break;
 565         case DPAA2_SEC_CIPHER_HASH:
 566                 ret = build_authenc_fd(sess, op, fd, bpid);
 567                 break;
 568         case DPAA2_SEC_HASH_CIPHER:
 569         default:
 570                 RTE_LOG(ERR, PMD, "error: Unsupported session\n");
 571         }
 572         return ret;
 573 }
 574
 575 static uint16_t
 576 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 577                         uint16_t nb_ops)
 578 {
 579         /* Function to transmit the frames to given device and VQ*/
 580         uint32_t loop;
 581         int32_t ret;
 582         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
 583         uint32_t frames_to_send;
 584         struct qbman_eq_desc eqdesc;
 585         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 586         struct qbman_swp *swp;
 587         uint16_t num_tx = 0;
 588         /*todo - need to support multiple buffer pools */
 589         uint16_t bpid;
 590         struct rte_mempool *mb_pool;
 591         dpaa2_sec_session *sess;
 592
 593         if (unlikely(nb_ops == 0))
 594                 return 0;
 595
 596         if (ops[0]->sess_type != RTE_CRYPTO_OP_WITH_SESSION) {
 597                 RTE_LOG(ERR, PMD, "sessionless crypto op not supported\n");
 598                 return 0;
 599         }
 600         /*Prepare enqueue descriptor*/
 601         qbman_eq_desc_clear(&eqdesc);
 602         qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
 603         qbman_eq_desc_set_response(&eqdesc, 0, 0);
 604         qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
 605
 606         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 607                 ret = dpaa2_affine_qbman_swp_sec();
 608                 if (ret) {
 609                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 610                         return 0;
 611                 }
 612         }
 613         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 614
 615         while (nb_ops) {
 616                 frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops;
 617
 618                 for (loop = 0; loop < frames_to_send; loop++) {
 619                         /*Clear the unused FD fields before sending*/
 620                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 621                         sess = (dpaa2_sec_session *)
 622                                 (*ops)->sym->session->_private;
 623                         mb_pool = (*ops)->sym->m_src->pool;
 624                         bpid = mempool_to_bpid(mb_pool);
 625                         ret = build_sec_fd(sess, *ops, &fd_arr[loop], bpid);
 626                         if (ret) {
 627                                 PMD_DRV_LOG(ERR, "error: Improper packet"
 628                                             " contents for crypto operation\n");
 629                                 goto skip_tx;
 630                         }
 631                         ops++;
 632                 }
 633                 loop = 0;
 634                 while (loop < frames_to_send) {
 635                         loop += qbman_swp_send_multiple(swp, &eqdesc,
 636                                                         &fd_arr[loop],
 637                                                         frames_to_send - loop);
 638                 }
 639
 640                 num_tx += frames_to_send;
 641                 nb_ops -= frames_to_send;
 642         }
 643 skip_tx:
 644         dpaa2_qp->tx_vq.tx_pkts += num_tx;
 645         dpaa2_qp->tx_vq.err_pkts += nb_ops;
 646         return num_tx;
 647 }
 648
 649 static inline struct rte_crypto_op *
 650 sec_fd_to_mbuf(const struct qbman_fd *fd)
 651 {
 652         struct qbman_fle *fle;
 653         struct rte_crypto_op *op;
 654         struct ctxt_priv *priv;
 655
 656         fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
 657
 658         PMD_RX_LOG(DEBUG, "FLE addr = %x - %x, offset = %x",
 659                    fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
 660
 661         /* we are using the first FLE entry to store Mbuf.
 662          * Currently we donot know which FLE has the mbuf stored.
 663          * So while retreiving we can go back 1 FLE from the FD -ADDR
 664          * to get the MBUF Addr from the previous FLE.
 665          * We can have a better approach to use the inline Mbuf
 666          */
 667
 668         if (unlikely(DPAA2_GET_FD_IVP(fd))) {
 669                 /* TODO complete it. */
 670                 RTE_LOG(ERR, PMD, "error: Non inline buffer - WHAT to DO?");
 671                 return NULL;
 672         }
 673         op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
 674                         DPAA2_GET_FLE_ADDR((fle - 1)));
 675
 676         /* Prefeth op */
 677         rte_prefetch0(op->sym->m_src);
 678
 679         PMD_RX_LOG(DEBUG, "mbuf %p BMAN buf addr %p",
 680                    (void *)op->sym->m_src, op->sym->m_src->buf_addr);
 681
 682         PMD_RX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 683                    (void *)DPAA2_GET_FD_ADDR(fd),
 684                    DPAA2_GET_FD_BPID(fd),
 685                    rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
 686                    DPAA2_GET_FD_OFFSET(fd),
 687                    DPAA2_GET_FD_LEN(fd));
 688
 689         /* free the fle memory */
 690         priv = (struct ctxt_priv *)DPAA2_GET_FLE_CTXT(fle - 1);
 691         rte_mempool_put(priv->fle_pool, (void *)(fle - 1));
 692
 693         return op;
 694 }
 695
 696 static uint16_t
 697 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 698                         uint16_t nb_ops)
 699 {
 700         /* Function is responsible to receive frames for a given device and VQ*/
 701         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 702         struct qbman_result *dq_storage;
 703         uint32_t fqid = dpaa2_qp->rx_vq.fqid;
 704         int ret, num_rx = 0;
 705         uint8_t is_last = 0, status;
 706         struct qbman_swp *swp;
 707         const struct qbman_fd *fd;
 708         struct qbman_pull_desc pulldesc;
 709
 710         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 711                 ret = dpaa2_affine_qbman_swp_sec();
 712                 if (ret) {
 713                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 714                         return 0;
 715                 }
 716         }
 717         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 718         dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
 719
 720         qbman_pull_desc_clear(&pulldesc);
 721         qbman_pull_desc_set_numframes(&pulldesc,
 722                                       (nb_ops > DPAA2_DQRR_RING_SIZE) ?
 723                                       DPAA2_DQRR_RING_SIZE : nb_ops);
 724         qbman_pull_desc_set_fq(&pulldesc, fqid);
 725         qbman_pull_desc_set_storage(&pulldesc, dq_storage,
 726                                     (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
 727                                     1);
 728
 729         /*Issue a volatile dequeue command. */
 730         while (1) {
 731                 if (qbman_swp_pull(swp, &pulldesc)) {
 732                         RTE_LOG(WARNING, PMD, "SEC VDQ command is not issued."
 733                                 "QBMAN is busy\n");
 734                         /* Portal was busy, try again */
 735                         continue;
 736                 }
 737                 break;
 738         };
 739
 740         /* Receive the packets till Last Dequeue entry is found with
 741          * respect to the above issues PULL command.
 742          */
 743         while (!is_last) {
 744                 /* Check if the previous issued command is completed.
 745                  * Also seems like the SWP is shared between the Ethernet Driver
 746                  * and the SEC driver.
 747                  */
 748                 while (!qbman_check_command_complete(swp, dq_storage))
 749                         ;
 750
 751                 /* Loop until the dq_storage is updated with
 752                  * new token by QBMAN
 753                  */
 754                 while (!qbman_result_has_new_result(swp, dq_storage))
 755                         ;
 756                 /* Check whether Last Pull command is Expired and
 757                  * setting Condition for Loop termination
 758                  */
 759                 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
 760                         is_last = 1;
 761                         /* Check for valid frame. */
 762                         status = (uint8_t)qbman_result_DQ_flags(dq_storage);
 763                         if (unlikely(
 764                                 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
 765                                 PMD_RX_LOG(DEBUG, "No frame is delivered");
 766                                 continue;
 767                         }
 768                 }
 769
 770                 fd = qbman_result_DQ_fd(dq_storage);
 771                 ops[num_rx] = sec_fd_to_mbuf(fd);
 772
 773                 if (unlikely(fd->simple.frc)) {
 774                         /* TODO Parse SEC errors */
 775                         RTE_LOG(ERR, PMD, "SEC returned Error - %x\n",
 776                                 fd->simple.frc);
 777                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
 778                 } else {
 779                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 780                 }
 781
 782                 num_rx++;
 783                 dq_storage++;
 784         } /* End of Packet Rx loop */
 785
 786         dpaa2_qp->rx_vq.rx_pkts += num_rx;
 787
 788         PMD_RX_LOG(DEBUG, "SEC Received %d Packets", num_rx);
 789         /*Return the total number of packets received to DPAA2 app*/
 790         return num_rx;
 791 }
 792
 793 /** Release queue pair */
 794 static int
 795 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 796 {
 797         struct dpaa2_sec_qp *qp =
 798                 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
 799
 800         PMD_INIT_FUNC_TRACE();
 801
 802         if (qp->rx_vq.q_storage) {
 803                 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
 804                 rte_free(qp->rx_vq.q_storage);
 805         }
 806         rte_free(qp);
 807
 808         dev->data->queue_pairs[queue_pair_id] = NULL;
 809
 810         return 0;
 811 }
 812
 813 /** Setup a queue pair */
 814 static int
 815 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 816                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
 817                 __rte_unused int socket_id)
 818 {
 819         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
 820         struct dpaa2_sec_qp *qp;
 821         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
 822         struct dpseci_rx_queue_cfg cfg;
 823         int32_t retcode;
 824
 825         PMD_INIT_FUNC_TRACE();
 826
 827         /* If qp is already in use free ring memory and qp metadata. */
 828         if (dev->data->queue_pairs[qp_id] != NULL) {
 829                 PMD_DRV_LOG(INFO, "QP already setup");
 830                 return 0;
 831         }
 832
 833         PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, conf =%p",
 834                     dev, qp_id, qp_conf);
 835
 836         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
 837
 838         qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
 839                         RTE_CACHE_LINE_SIZE);
 840         if (!qp) {
 841                 RTE_LOG(ERR, PMD, "malloc failed for rx/tx queues\n");
 842                 return -1;
 843         }
 844
 845         qp->rx_vq.dev = dev;
 846         qp->tx_vq.dev = dev;
 847         qp->rx_vq.q_storage = rte_malloc("sec dq storage",
 848                 sizeof(struct queue_storage_info_t),
 849                 RTE_CACHE_LINE_SIZE);
 850         if (!qp->rx_vq.q_storage) {
 851                 RTE_LOG(ERR, PMD, "malloc failed for q_storage\n");
 852                 return -1;
 853         }
 854         memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
 855
 856         if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
 857                 RTE_LOG(ERR, PMD, "dpaa2_alloc_dq_storage failed\n");
 858                 return -1;
 859         }
 860
 861         dev->data->queue_pairs[qp_id] = qp;
 862
 863         cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
 864         cfg.user_ctx = (uint64_t)(&qp->rx_vq);
 865         retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
 866                                       qp_id, &cfg);
 867         return retcode;
 868 }
 869
 870 /** Start queue pair */
 871 static int
 872 dpaa2_sec_queue_pair_start(__rte_unused struct rte_cryptodev *dev,
 873                            __rte_unused uint16_t queue_pair_id)
 874 {
 875         PMD_INIT_FUNC_TRACE();
 876
 877         return 0;
 878 }
 879
 880 /** Stop queue pair */
 881 static int
 882 dpaa2_sec_queue_pair_stop(__rte_unused struct rte_cryptodev *dev,
 883                           __rte_unused uint16_t queue_pair_id)
 884 {
 885         PMD_INIT_FUNC_TRACE();
 886
 887         return 0;
 888 }
 889
 890 /** Return the number of allocated queue pairs */
 891 static uint32_t
 892 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
 893 {
 894         PMD_INIT_FUNC_TRACE();
 895
 896         return dev->data->nb_queue_pairs;
 897 }
 898
 899 /** Returns the size of the aesni gcm session structure */
 900 static unsigned int
 901 dpaa2_sec_session_get_size(struct rte_cryptodev *dev __rte_unused)
 902 {
 903         PMD_INIT_FUNC_TRACE();
 904
 905         return sizeof(dpaa2_sec_session);
 906 }
 907
 908 static void
 909 dpaa2_sec_session_initialize(struct rte_mempool *mp __rte_unused,
 910                              void *sess __rte_unused)
 911 {
 912         PMD_INIT_FUNC_TRACE();
 913 }
 914
 915 static int
 916 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 917                       struct rte_crypto_sym_xform *xform,
 918                       dpaa2_sec_session *session)
 919 {
 920         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
 921         struct alginfo cipherdata;
 922         int bufsize, i;
 923         struct ctxt_priv *priv;
 924         struct sec_flow_context *flc;
 925
 926         PMD_INIT_FUNC_TRACE();
 927
 928         /* For SEC CIPHER only one descriptor is required. */
 929         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
 930                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
 931                         RTE_CACHE_LINE_SIZE);
 932         if (priv == NULL) {
 933                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
 934                 return -1;
 935         }
 936
 937         priv->fle_pool = dev_priv->fle_pool;
 938
 939         flc = &priv->flc_desc[0].flc;
 940
 941         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
 942                         RTE_CACHE_LINE_SIZE);
 943         if (session->cipher_key.data == NULL) {
 944                 RTE_LOG(ERR, PMD, "No Memory for cipher key");
 945                 rte_free(priv);
 946                 return -1;
 947         }
 948         session->cipher_key.length = xform->cipher.key.length;
 949
 950         memcpy(session->cipher_key.data, xform->cipher.key.data,
 951                xform->cipher.key.length);
 952         cipherdata.key = (uint64_t)session->cipher_key.data;
 953         cipherdata.keylen = session->cipher_key.length;
 954         cipherdata.key_enc_flags = 0;
 955         cipherdata.key_type = RTA_DATA_IMM;
 956
 957         /* Set IV parameters */
 958         session->iv.offset = xform->cipher.iv.offset;
 959         session->iv.length = xform->cipher.iv.length;
 960
 961         switch (xform->cipher.algo) {
 962         case RTE_CRYPTO_CIPHER_AES_CBC:
 963                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
 964                 cipherdata.algmode = OP_ALG_AAI_CBC;
 965                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
 966                 break;
 967         case RTE_CRYPTO_CIPHER_3DES_CBC:
 968                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
 969                 cipherdata.algmode = OP_ALG_AAI_CBC;
 970                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
 971                 break;
 972         case RTE_CRYPTO_CIPHER_AES_CTR:
 973                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
 974                 cipherdata.algmode = OP_ALG_AAI_CTR;
 975                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
 976                 break;
 977         case RTE_CRYPTO_CIPHER_3DES_CTR:
 978         case RTE_CRYPTO_CIPHER_AES_ECB:
 979         case RTE_CRYPTO_CIPHER_3DES_ECB:
 980         case RTE_CRYPTO_CIPHER_AES_XTS:
 981         case RTE_CRYPTO_CIPHER_AES_F8:
 982         case RTE_CRYPTO_CIPHER_ARC4:
 983         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 984         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 985         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 986         case RTE_CRYPTO_CIPHER_NULL:
 987                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u",
 988                         xform->cipher.algo);
 989                 goto error_out;
 990         default:
 991                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
 992                         xform->cipher.algo);
 993                 goto error_out;
 994         }
 995         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
 996                                 DIR_ENC : DIR_DEC;
 997
 998         bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
 999                                         &cipherdata, NULL, session->iv.length,
1000                                         session->dir);
1001         if (bufsize < 0) {
1002                 RTE_LOG(ERR, PMD, "Crypto: Descriptor build failed\n");
1003                 goto error_out;
1004         }
1005         flc->dhr = 0;
1006         flc->bpv0 = 0x1;
1007         flc->mode_bits = 0x8000;
1008
1009         flc->word1_sdl = (uint8_t)bufsize;
1010         flc->word2_rflc_31_0 = lower_32_bits(
1011                         (uint64_t)&(((struct dpaa2_sec_qp *)
1012                         dev->data->queue_pairs[0])->rx_vq));
1013         flc->word3_rflc_63_32 = upper_32_bits(
1014                         (uint64_t)&(((struct dpaa2_sec_qp *)
1015                         dev->data->queue_pairs[0])->rx_vq));
1016         session->ctxt = priv;
1017
1018         for (i = 0; i < bufsize; i++)
1019                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1020                             i, priv->flc_desc[0].desc[i]);
1021
1022         return 0;
1023
1024 error_out:
1025         rte_free(session->cipher_key.data);
1026         rte_free(priv);
1027         return -1;
1028 }
1029
1030 static int
1031 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
1032                     struct rte_crypto_sym_xform *xform,
1033                     dpaa2_sec_session *session)
1034 {
1035         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1036         struct alginfo authdata;
1037         unsigned int bufsize, i;
1038         struct ctxt_priv *priv;
1039         struct sec_flow_context *flc;
1040
1041         PMD_INIT_FUNC_TRACE();
1042
1043         /* For SEC AUTH three descriptors are required for various stages */
1044         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1045                         sizeof(struct ctxt_priv) + 3 *
1046                         sizeof(struct sec_flc_desc),
1047                         RTE_CACHE_LINE_SIZE);
1048         if (priv == NULL) {
1049                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
1050                 return -1;
1051         }
1052
1053         priv->fle_pool = dev_priv->fle_pool;
1054         flc = &priv->flc_desc[DESC_INITFINAL].flc;
1055
1056         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1057                         RTE_CACHE_LINE_SIZE);
1058         if (session->auth_key.data == NULL) {
1059                 RTE_LOG(ERR, PMD, "No Memory for auth key");
1060                 rte_free(priv);
1061                 return -1;
1062         }
1063         session->auth_key.length = xform->auth.key.length;
1064
1065         memcpy(session->auth_key.data, xform->auth.key.data,
1066                xform->auth.key.length);
1067         authdata.key = (uint64_t)session->auth_key.data;
1068         authdata.keylen = session->auth_key.length;
1069         authdata.key_enc_flags = 0;
1070         authdata.key_type = RTA_DATA_IMM;
1071
1072         session->digest_length = xform->auth.digest_length;
1073
1074         switch (xform->auth.algo) {
1075         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1076                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1077                 authdata.algmode = OP_ALG_AAI_HMAC;
1078                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1079                 break;
1080         case RTE_CRYPTO_AUTH_MD5_HMAC:
1081                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1082                 authdata.algmode = OP_ALG_AAI_HMAC;
1083                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1084                 break;
1085         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1086                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1087                 authdata.algmode = OP_ALG_AAI_HMAC;
1088                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1089                 break;
1090         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1091                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1092                 authdata.algmode = OP_ALG_AAI_HMAC;
1093                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1094                 break;
1095         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1096                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1097                 authdata.algmode = OP_ALG_AAI_HMAC;
1098                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1099                 break;
1100         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1101                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1102                 authdata.algmode = OP_ALG_AAI_HMAC;
1103                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1104                 break;
1105         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1106         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1107         case RTE_CRYPTO_AUTH_NULL:
1108         case RTE_CRYPTO_AUTH_SHA1:
1109         case RTE_CRYPTO_AUTH_SHA256:
1110         case RTE_CRYPTO_AUTH_SHA512:
1111         case RTE_CRYPTO_AUTH_SHA224:
1112         case RTE_CRYPTO_AUTH_SHA384:
1113         case RTE_CRYPTO_AUTH_MD5:
1114         case RTE_CRYPTO_AUTH_AES_GMAC:
1115         case RTE_CRYPTO_AUTH_KASUMI_F9:
1116         case RTE_CRYPTO_AUTH_AES_CMAC:
1117         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1118         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1119                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u",
1120                         xform->auth.algo);
1121                 goto error_out;
1122         default:
1123                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1124                         xform->auth.algo);
1125                 goto error_out;
1126         }
1127         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1128                                 DIR_ENC : DIR_DEC;
1129
1130         bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
1131                                    1, 0, &authdata, !session->dir,
1132                                    session->digest_length);
1133
1134         flc->word1_sdl = (uint8_t)bufsize;
1135         flc->word2_rflc_31_0 = lower_32_bits(
1136                         (uint64_t)&(((struct dpaa2_sec_qp *)
1137                         dev->data->queue_pairs[0])->rx_vq));
1138         flc->word3_rflc_63_32 = upper_32_bits(
1139                         (uint64_t)&(((struct dpaa2_sec_qp *)
1140                         dev->data->queue_pairs[0])->rx_vq));
1141         session->ctxt = priv;
1142         for (i = 0; i < bufsize; i++)
1143                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1144                             i, priv->flc_desc[DESC_INITFINAL].desc[i]);
1145
1146
1147         return 0;
1148
1149 error_out:
1150         rte_free(session->auth_key.data);
1151         rte_free(priv);
1152         return -1;
1153 }
1154
1155 static int
1156 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
1157                     struct rte_crypto_sym_xform *xform,
1158                     dpaa2_sec_session *session)
1159 {
1160         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1161         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1162         struct alginfo aeaddata;
1163         unsigned int bufsize, i;
1164         struct ctxt_priv *priv;
1165         struct sec_flow_context *flc;
1166         struct rte_crypto_aead_xform *aead_xform = &xform->aead;
1167         int err;
1168
1169         PMD_INIT_FUNC_TRACE();
1170
1171         /* Set IV parameters */
1172         session->iv.offset = aead_xform->iv.offset;
1173         session->iv.length = aead_xform->iv.length;
1174         session->ctxt_type = DPAA2_SEC_AEAD;
1175
1176         /* For SEC AEAD only one descriptor is required */
1177         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1178                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1179                         RTE_CACHE_LINE_SIZE);
1180         if (priv == NULL) {
1181                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
1182                 return -1;
1183         }
1184
1185         priv->fle_pool = dev_priv->fle_pool;
1186         flc = &priv->flc_desc[0].flc;
1187
1188         session->aead_key.data = rte_zmalloc(NULL, aead_xform->key.length,
1189                                                RTE_CACHE_LINE_SIZE);
1190         if (session->aead_key.data == NULL && aead_xform->key.length > 0) {
1191                 RTE_LOG(ERR, PMD, "No Memory for aead key");
1192                 rte_free(priv);
1193                 return -1;
1194         }
1195         memcpy(session->aead_key.data, aead_xform->key.data,
1196                aead_xform->key.length);
1197
1198         session->digest_length = aead_xform->digest_length;
1199         session->aead_key.length = aead_xform->key.length;
1200         ctxt->auth_only_len = aead_xform->add_auth_data_length;
1201
1202         aeaddata.key = (uint64_t)session->aead_key.data;
1203         aeaddata.keylen = session->aead_key.length;
1204         aeaddata.key_enc_flags = 0;
1205         aeaddata.key_type = RTA_DATA_IMM;
1206
1207         switch (aead_xform->algo) {
1208         case RTE_CRYPTO_AEAD_AES_GCM:
1209                 aeaddata.algtype = OP_ALG_ALGSEL_AES;
1210                 aeaddata.algmode = OP_ALG_AAI_GCM;
1211                 session->cipher_alg = RTE_CRYPTO_AEAD_AES_GCM;
1212                 break;
1213         case RTE_CRYPTO_AEAD_AES_CCM:
1214                 RTE_LOG(ERR, PMD, "Crypto: Unsupported AEAD alg %u",
1215                         aead_xform->algo);
1216                 goto error_out;
1217         default:
1218                 RTE_LOG(ERR, PMD, "Crypto: Undefined AEAD specified %u\n",
1219                         aead_xform->algo);
1220                 goto error_out;
1221         }
1222         session->dir = (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1223                                 DIR_ENC : DIR_DEC;
1224
1225         priv->flc_desc[0].desc[0] = aeaddata.keylen;
1226         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1227                                MIN_JOB_DESC_SIZE,
1228                                (unsigned int *)priv->flc_desc[0].desc,
1229                                &priv->flc_desc[0].desc[1], 1);
1230
1231         if (err < 0) {
1232                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths");
1233                 goto error_out;
1234         }
1235         if (priv->flc_desc[0].desc[1] & 1) {
1236                 aeaddata.key_type = RTA_DATA_IMM;
1237         } else {
1238                 aeaddata.key = DPAA2_VADDR_TO_IOVA(aeaddata.key);
1239                 aeaddata.key_type = RTA_DATA_PTR;
1240         }
1241         priv->flc_desc[0].desc[0] = 0;
1242         priv->flc_desc[0].desc[1] = 0;
1243
1244         if (session->dir == DIR_ENC)
1245                 bufsize = cnstr_shdsc_gcm_encap(
1246                                 priv->flc_desc[0].desc, 1, 0,
1247                                 &aeaddata, session->iv.length,
1248                                 session->digest_length);
1249         else
1250                 bufsize = cnstr_shdsc_gcm_decap(
1251                                 priv->flc_desc[0].desc, 1, 0,
1252                                 &aeaddata, session->iv.length,
1253                                 session->digest_length);
1254         flc->word1_sdl = (uint8_t)bufsize;
1255         flc->word2_rflc_31_0 = lower_32_bits(
1256                         (uint64_t)&(((struct dpaa2_sec_qp *)
1257                         dev->data->queue_pairs[0])->rx_vq));
1258         flc->word3_rflc_63_32 = upper_32_bits(
1259                         (uint64_t)&(((struct dpaa2_sec_qp *)
1260                         dev->data->queue_pairs[0])->rx_vq));
1261         session->ctxt = priv;
1262         for (i = 0; i < bufsize; i++)
1263                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1264                             i, priv->flc_desc[0].desc[i]);
1265
1266         return 0;
1267
1268 error_out:
1269         rte_free(session->aead_key.data);
1270         rte_free(priv);
1271         return -1;
1272 }
1273
1274
1275 static int
1276 dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
1277                     struct rte_crypto_sym_xform *xform,
1278                     dpaa2_sec_session *session)
1279 {
1280         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1281         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1282         struct alginfo authdata, cipherdata;
1283         unsigned int bufsize, i;
1284         struct ctxt_priv *priv;
1285         struct sec_flow_context *flc;
1286         struct rte_crypto_cipher_xform *cipher_xform;
1287         struct rte_crypto_auth_xform *auth_xform;
1288         int err;
1289
1290         PMD_INIT_FUNC_TRACE();
1291
1292         if (session->ext_params.aead_ctxt.auth_cipher_text) {
1293                 cipher_xform = &xform->cipher;
1294                 auth_xform = &xform->next->auth;
1295                 session->ctxt_type =
1296                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1297                         DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1298         } else {
1299                 cipher_xform = &xform->next->cipher;
1300                 auth_xform = &xform->auth;
1301                 session->ctxt_type =
1302                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1303                         DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1304         }
1305
1306         /* Set IV parameters */
1307         session->iv.offset = cipher_xform->iv.offset;
1308         session->iv.length = cipher_xform->iv.length;
1309
1310         /* For SEC AEAD only one descriptor is required */
1311         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1312                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1313                         RTE_CACHE_LINE_SIZE);
1314         if (priv == NULL) {
1315                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT");
1316                 return -1;
1317         }
1318
1319         priv->fle_pool = dev_priv->fle_pool;
1320         flc = &priv->flc_desc[0].flc;
1321
1322         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1323                                                RTE_CACHE_LINE_SIZE);
1324         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1325                 RTE_LOG(ERR, PMD, "No Memory for cipher key");
1326                 rte_free(priv);
1327                 return -1;
1328         }
1329         session->cipher_key.length = cipher_xform->key.length;
1330         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
1331                                              RTE_CACHE_LINE_SIZE);
1332         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
1333                 RTE_LOG(ERR, PMD, "No Memory for auth key");
1334                 rte_free(session->cipher_key.data);
1335                 rte_free(priv);
1336                 return -1;
1337         }
1338         session->auth_key.length = auth_xform->key.length;
1339         memcpy(session->cipher_key.data, cipher_xform->key.data,
1340                cipher_xform->key.length);
1341         memcpy(session->auth_key.data, auth_xform->key.data,
1342                auth_xform->key.length);
1343
1344         authdata.key = (uint64_t)session->auth_key.data;
1345         authdata.keylen = session->auth_key.length;
1346         authdata.key_enc_flags = 0;
1347         authdata.key_type = RTA_DATA_IMM;
1348
1349         session->digest_length = auth_xform->digest_length;
1350
1351         switch (auth_xform->algo) {
1352         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1353                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1354                 authdata.algmode = OP_ALG_AAI_HMAC;
1355                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1356                 break;
1357         case RTE_CRYPTO_AUTH_MD5_HMAC:
1358                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1359                 authdata.algmode = OP_ALG_AAI_HMAC;
1360                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1361                 break;
1362         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1363                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1364                 authdata.algmode = OP_ALG_AAI_HMAC;
1365                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1366                 break;
1367         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1368                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1369                 authdata.algmode = OP_ALG_AAI_HMAC;
1370                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1371                 break;
1372         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1373                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1374                 authdata.algmode = OP_ALG_AAI_HMAC;
1375                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1376                 break;
1377         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1378                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1379                 authdata.algmode = OP_ALG_AAI_HMAC;
1380                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1381                 break;
1382         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1383         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1384         case RTE_CRYPTO_AUTH_NULL:
1385         case RTE_CRYPTO_AUTH_SHA1:
1386         case RTE_CRYPTO_AUTH_SHA256:
1387         case RTE_CRYPTO_AUTH_SHA512:
1388         case RTE_CRYPTO_AUTH_SHA224:
1389         case RTE_CRYPTO_AUTH_SHA384:
1390         case RTE_CRYPTO_AUTH_MD5:
1391         case RTE_CRYPTO_AUTH_AES_GMAC:
1392         case RTE_CRYPTO_AUTH_KASUMI_F9:
1393         case RTE_CRYPTO_AUTH_AES_CMAC:
1394         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1395         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1396                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u",
1397                         auth_xform->algo);
1398                 goto error_out;
1399         default:
1400                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1401                         auth_xform->algo);
1402                 goto error_out;
1403         }
1404         cipherdata.key = (uint64_t)session->cipher_key.data;
1405         cipherdata.keylen = session->cipher_key.length;
1406         cipherdata.key_enc_flags = 0;
1407         cipherdata.key_type = RTA_DATA_IMM;
1408
1409         switch (cipher_xform->algo) {
1410         case RTE_CRYPTO_CIPHER_AES_CBC:
1411                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1412                 cipherdata.algmode = OP_ALG_AAI_CBC;
1413                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1414                 break;
1415         case RTE_CRYPTO_CIPHER_3DES_CBC:
1416                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1417                 cipherdata.algmode = OP_ALG_AAI_CBC;
1418                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1419                 break;
1420         case RTE_CRYPTO_CIPHER_AES_CTR:
1421                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1422                 cipherdata.algmode = OP_ALG_AAI_CTR;
1423                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1424                 break;
1425         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1426         case RTE_CRYPTO_CIPHER_NULL:
1427         case RTE_CRYPTO_CIPHER_3DES_ECB:
1428         case RTE_CRYPTO_CIPHER_AES_ECB:
1429         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1430                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u",
1431                         cipher_xform->algo);
1432                 goto error_out;
1433         default:
1434                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1435                         cipher_xform->algo);
1436                 goto error_out;
1437         }
1438         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1439                                 DIR_ENC : DIR_DEC;
1440
1441         priv->flc_desc[0].desc[0] = cipherdata.keylen;
1442         priv->flc_desc[0].desc[1] = authdata.keylen;
1443         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1444                                MIN_JOB_DESC_SIZE,
1445                                (unsigned int *)priv->flc_desc[0].desc,
1446                                &priv->flc_desc[0].desc[2], 2);
1447
1448         if (err < 0) {
1449                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths");
1450                 goto error_out;
1451         }
1452         if (priv->flc_desc[0].desc[2] & 1) {
1453                 cipherdata.key_type = RTA_DATA_IMM;
1454         } else {
1455                 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
1456                 cipherdata.key_type = RTA_DATA_PTR;
1457         }
1458         if (priv->flc_desc[0].desc[2] & (1 << 1)) {
1459                 authdata.key_type = RTA_DATA_IMM;
1460         } else {
1461                 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
1462                 authdata.key_type = RTA_DATA_PTR;
1463         }
1464         priv->flc_desc[0].desc[0] = 0;
1465         priv->flc_desc[0].desc[1] = 0;
1466         priv->flc_desc[0].desc[2] = 0;
1467
1468         if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
1469                 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
1470                                               0, &cipherdata, &authdata,
1471                                               session->iv.length,
1472                                               ctxt->auth_only_len,
1473                                               session->digest_length,
1474                                               session->dir);
1475         } else {
1476                 RTE_LOG(ERR, PMD, "Hash before cipher not supported");
1477                 goto error_out;
1478         }
1479
1480         flc->word1_sdl = (uint8_t)bufsize;
1481         flc->word2_rflc_31_0 = lower_32_bits(
1482                         (uint64_t)&(((struct dpaa2_sec_qp *)
1483                         dev->data->queue_pairs[0])->rx_vq));
1484         flc->word3_rflc_63_32 = upper_32_bits(
1485                         (uint64_t)&(((struct dpaa2_sec_qp *)
1486                         dev->data->queue_pairs[0])->rx_vq));
1487         session->ctxt = priv;
1488         for (i = 0; i < bufsize; i++)
1489                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1490                             i, priv->flc_desc[0].desc[i]);
1491
1492         return 0;
1493
1494 error_out:
1495         rte_free(session->cipher_key.data);
1496         rte_free(session->auth_key.data);
1497         rte_free(priv);
1498         return -1;
1499 }
1500
1501 static void *
1502 dpaa2_sec_session_configure(struct rte_cryptodev *dev,
1503                             struct rte_crypto_sym_xform *xform, void *sess)
1504 {
1505         dpaa2_sec_session *session = sess;
1506
1507         PMD_INIT_FUNC_TRACE();
1508
1509         if (unlikely(sess == NULL)) {
1510                 RTE_LOG(ERR, PMD, "invalid session struct");
1511                 return NULL;
1512         }
1513
1514         /* Default IV length = 0 */
1515         session->iv.length = 0;
1516
1517         /* Cipher Only */
1518         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1519                 session->ctxt_type = DPAA2_SEC_CIPHER;
1520                 dpaa2_sec_cipher_init(dev, xform, session);
1521
1522         /* Authentication Only */
1523         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1524                    xform->next == NULL) {
1525                 session->ctxt_type = DPAA2_SEC_AUTH;
1526                 dpaa2_sec_auth_init(dev, xform, session);
1527
1528         /* Cipher then Authenticate */
1529         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1530                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1531                 session->ext_params.aead_ctxt.auth_cipher_text = true;
1532                 dpaa2_sec_aead_chain_init(dev, xform, session);
1533
1534         /* Authenticate then Cipher */
1535         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1536                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1537                 session->ext_params.aead_ctxt.auth_cipher_text = false;
1538                 dpaa2_sec_aead_chain_init(dev, xform, session);
1539
1540         /* AEAD operation for AES-GCM kind of Algorithms */
1541         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
1542                    xform->next == NULL) {
1543                 dpaa2_sec_aead_init(dev, xform, session);
1544
1545         } else {
1546                 RTE_LOG(ERR, PMD, "Invalid crypto type");
1547                 return NULL;
1548         }
1549
1550         return session;
1551 }
1552
1553 /** Clear the memory of session so it doesn't leave key material behind */
1554 static void
1555 dpaa2_sec_session_clear(struct rte_cryptodev *dev __rte_unused, void *sess)
1556 {
1557         PMD_INIT_FUNC_TRACE();
1558         dpaa2_sec_session *s = (dpaa2_sec_session *)sess;
1559
1560         if (s) {
1561                 rte_free(s->ctxt);
1562                 rte_free(s->cipher_key.data);
1563                 rte_free(s->auth_key.data);
1564                 memset(sess, 0, sizeof(dpaa2_sec_session));
1565         }
1566 }
1567
1568 static int
1569 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
1570                         struct rte_cryptodev_config *config __rte_unused)
1571 {
1572         PMD_INIT_FUNC_TRACE();
1573
1574         return 0;
1575 }
1576
1577 static int
1578 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
1579 {
1580         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1581         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1582         struct dpseci_attr attr;
1583         struct dpaa2_queue *dpaa2_q;
1584         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1585                                         dev->data->queue_pairs;
1586         struct dpseci_rx_queue_attr rx_attr;
1587         struct dpseci_tx_queue_attr tx_attr;
1588         int ret, i;
1589
1590         PMD_INIT_FUNC_TRACE();
1591
1592         memset(&attr, 0, sizeof(struct dpseci_attr));
1593
1594         ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
1595         if (ret) {
1596                 PMD_INIT_LOG(ERR, "DPSECI with HW_ID = %d ENABLE FAILED\n",
1597                              priv->hw_id);
1598                 goto get_attr_failure;
1599         }
1600         ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
1601         if (ret) {
1602                 PMD_INIT_LOG(ERR,
1603                              "DPSEC ATTRIBUTE READ FAILED, disabling DPSEC\n");
1604                 goto get_attr_failure;
1605         }
1606         for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
1607                 dpaa2_q = &qp[i]->rx_vq;
1608                 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1609                                     &rx_attr);
1610                 dpaa2_q->fqid = rx_attr.fqid;
1611                 PMD_INIT_LOG(DEBUG, "rx_fqid: %d", dpaa2_q->fqid);
1612         }
1613         for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
1614                 dpaa2_q = &qp[i]->tx_vq;
1615                 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1616                                     &tx_attr);
1617                 dpaa2_q->fqid = tx_attr.fqid;
1618                 PMD_INIT_LOG(DEBUG, "tx_fqid: %d", dpaa2_q->fqid);
1619         }
1620
1621         return 0;
1622 get_attr_failure:
1623         dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1624         return -1;
1625 }
1626
1627 static void
1628 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
1629 {
1630         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1631         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1632         int ret;
1633
1634         PMD_INIT_FUNC_TRACE();
1635
1636         ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1637         if (ret) {
1638                 PMD_INIT_LOG(ERR, "Failure in disabling dpseci %d device",
1639                              priv->hw_id);
1640                 return;
1641         }
1642
1643         ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
1644         if (ret < 0) {
1645                 PMD_INIT_LOG(ERR, "SEC Device cannot be reset:Error = %0x\n",
1646                              ret);
1647                 return;
1648         }
1649 }
1650
1651 static int
1652 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
1653 {
1654         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1655         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1656         int ret;
1657
1658         PMD_INIT_FUNC_TRACE();
1659
1660         /* Function is reverse of dpaa2_sec_dev_init.
1661          * It does the following:
1662          * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
1663          * 2. Close the DPSECI device
1664          * 3. Free the allocated resources.
1665          */
1666
1667         /*Close the device at underlying layer*/
1668         ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
1669         if (ret) {
1670                 PMD_INIT_LOG(ERR, "Failure closing dpseci device with"
1671                              " error code %d\n", ret);
1672                 return -1;
1673         }
1674
1675         /*Free the allocated memory for ethernet private data and dpseci*/
1676         priv->hw = NULL;
1677         free(dpseci);
1678
1679         return 0;
1680 }
1681
1682 static void
1683 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
1684                         struct rte_cryptodev_info *info)
1685 {
1686         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
1687
1688         PMD_INIT_FUNC_TRACE();
1689         if (info != NULL) {
1690                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
1691                 info->feature_flags = dev->feature_flags;
1692                 info->capabilities = dpaa2_sec_capabilities;
1693                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1694                 info->driver_id = cryptodev_driver_id;
1695         }
1696 }
1697
1698 static
1699 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
1700                          struct rte_cryptodev_stats *stats)
1701 {
1702         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1703         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1704         struct dpseci_sec_counters counters = {0};
1705         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1706                                         dev->data->queue_pairs;
1707         int ret, i;
1708
1709         PMD_INIT_FUNC_TRACE();
1710         if (stats == NULL) {
1711                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1712                 return;
1713         }
1714         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1715                 if (qp[i] == NULL) {
1716                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1717                         continue;
1718                 }
1719
1720                 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
1721                 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
1722                 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
1723                 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
1724         }
1725
1726         ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
1727                                       &counters);
1728         if (ret) {
1729                 PMD_DRV_LOG(ERR, "dpseci_get_sec_counters failed\n");
1730         } else {
1731                 PMD_DRV_LOG(INFO, "dpseci hw stats:"
1732                             "\n\tNumber of Requests Dequeued = %lu"
1733                             "\n\tNumber of Outbound Encrypt Requests = %lu"
1734                             "\n\tNumber of Inbound Decrypt Requests = %lu"
1735                             "\n\tNumber of Outbound Bytes Encrypted = %lu"
1736                             "\n\tNumber of Outbound Bytes Protected = %lu"
1737                             "\n\tNumber of Inbound Bytes Decrypted = %lu"
1738                             "\n\tNumber of Inbound Bytes Validated = %lu",
1739                             counters.dequeued_requests,
1740                             counters.ob_enc_requests,
1741                             counters.ib_dec_requests,
1742                             counters.ob_enc_bytes,
1743                             counters.ob_prot_bytes,
1744                             counters.ib_dec_bytes,
1745                             counters.ib_valid_bytes);
1746         }
1747 }
1748
1749 static
1750 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
1751 {
1752         int i;
1753         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1754                                    (dev->data->queue_pairs);
1755
1756         PMD_INIT_FUNC_TRACE();
1757
1758         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1759                 if (qp[i] == NULL) {
1760                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1761                         continue;
1762                 }
1763                 qp[i]->tx_vq.rx_pkts = 0;
1764                 qp[i]->tx_vq.tx_pkts = 0;
1765                 qp[i]->tx_vq.err_pkts = 0;
1766                 qp[i]->rx_vq.rx_pkts = 0;
1767                 qp[i]->rx_vq.tx_pkts = 0;
1768                 qp[i]->rx_vq.err_pkts = 0;
1769         }
1770 }
1771
1772 static struct rte_cryptodev_ops crypto_ops = {
1773         .dev_configure        = dpaa2_sec_dev_configure,
1774         .dev_start            = dpaa2_sec_dev_start,
1775         .dev_stop             = dpaa2_sec_dev_stop,
1776         .dev_close            = dpaa2_sec_dev_close,
1777         .dev_infos_get        = dpaa2_sec_dev_infos_get,
1778         .stats_get            = dpaa2_sec_stats_get,
1779         .stats_reset          = dpaa2_sec_stats_reset,
1780         .queue_pair_setup     = dpaa2_sec_queue_pair_setup,
1781         .queue_pair_release   = dpaa2_sec_queue_pair_release,
1782         .queue_pair_start     = dpaa2_sec_queue_pair_start,
1783         .queue_pair_stop      = dpaa2_sec_queue_pair_stop,
1784         .queue_pair_count     = dpaa2_sec_queue_pair_count,
1785         .session_get_size     = dpaa2_sec_session_get_size,
1786         .session_initialize   = dpaa2_sec_session_initialize,
1787         .session_configure    = dpaa2_sec_session_configure,
1788         .session_clear        = dpaa2_sec_session_clear,
1789 };
1790
1791 static int
1792 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
1793 {
1794         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
1795
1796         rte_mempool_free(internals->fle_pool);
1797
1798         PMD_INIT_LOG(INFO, "Closing DPAA2_SEC device %s on numa socket %u\n",
1799                      dev->data->name, rte_socket_id());
1800
1801         return 0;
1802 }
1803
1804 static int
1805 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
1806 {
1807         struct dpaa2_sec_dev_private *internals;
1808         struct rte_device *dev = cryptodev->device;
1809         struct rte_dpaa2_device *dpaa2_dev;
1810         struct fsl_mc_io *dpseci;
1811         uint16_t token;
1812         struct dpseci_attr attr;
1813         int retcode, hw_id;
1814         char str[20];
1815
1816         PMD_INIT_FUNC_TRACE();
1817         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1818         if (dpaa2_dev == NULL) {
1819                 PMD_INIT_LOG(ERR, "dpaa2_device not found\n");
1820                 return -1;
1821         }
1822         hw_id = dpaa2_dev->object_id;
1823
1824         cryptodev->driver_id = cryptodev_driver_id;
1825         cryptodev->dev_ops = &crypto_ops;
1826
1827         cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
1828         cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
1829         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
1830                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
1831                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
1832
1833         internals = cryptodev->data->dev_private;
1834         internals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;
1835
1836         /*
1837          * For secondary processes, we don't initialise any further as primary
1838          * has already done this work. Only check we don't need a different
1839          * RX function
1840          */
1841         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1842                 PMD_INIT_LOG(DEBUG, "Device already init by primary process");
1843                 return 0;
1844         }
1845         /*Open the rte device via MC and save the handle for further use*/
1846         dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
1847                                 sizeof(struct fsl_mc_io), 0);
1848         if (!dpseci) {
1849                 PMD_INIT_LOG(ERR,
1850                              "Error in allocating the memory for dpsec object");
1851                 return -1;
1852         }
1853         dpseci->regs = rte_mcp_ptr_list[0];
1854
1855         retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
1856         if (retcode != 0) {
1857                 PMD_INIT_LOG(ERR, "Cannot open the dpsec device: Error = %x",
1858                              retcode);
1859                 goto init_error;
1860         }
1861         retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
1862         if (retcode != 0) {
1863                 PMD_INIT_LOG(ERR,
1864                              "Cannot get dpsec device attributed: Error = %x",
1865                              retcode);
1866                 goto init_error;
1867         }
1868         sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
1869
1870         internals->max_nb_queue_pairs = attr.num_tx_queues;
1871         cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
1872         internals->hw = dpseci;
1873         internals->token = token;
1874
1875         sprintf(str, "fle_pool_%d", cryptodev->data->dev_id);
1876         internals->fle_pool = rte_mempool_create((const char *)str,
1877                         FLE_POOL_NUM_BUFS,
1878                         FLE_POOL_BUF_SIZE,
1879                         FLE_POOL_CACHE_SIZE, 0,
1880                         NULL, NULL, NULL, NULL,
1881                         SOCKET_ID_ANY, 0);
1882         if (!internals->fle_pool) {
1883                 RTE_LOG(ERR, PMD, "%s create failed", str);
1884                 goto init_error;
1885         } else
1886                 RTE_LOG(INFO, PMD, "%s created: %p\n", str,
1887                                 internals->fle_pool);
1888
1889         PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
1890         return 0;
1891
1892 init_error:
1893         PMD_INIT_LOG(ERR, "driver %s: create failed\n", cryptodev->data->name);
1894
1895         /* dpaa2_sec_uninit(crypto_dev_name); */
1896         return -EFAULT;
1897 }
1898
1899 static int
1900 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv,
1901                           struct rte_dpaa2_device *dpaa2_dev)
1902 {
1903         struct rte_cryptodev *cryptodev;
1904         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
1905
1906         int retval;
1907
1908         sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
1909
1910         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
1911         if (cryptodev == NULL)
1912                 return -ENOMEM;
1913
1914         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1915                 cryptodev->data->dev_private = rte_zmalloc_socket(
1916                                         "cryptodev private structure",
1917                                         sizeof(struct dpaa2_sec_dev_private),
1918                                         RTE_CACHE_LINE_SIZE,
1919                                         rte_socket_id());
1920
1921                 if (cryptodev->data->dev_private == NULL)
1922                         rte_panic("Cannot allocate memzone for private "
1923                                         "device data");
1924         }
1925
1926         dpaa2_dev->cryptodev = cryptodev;
1927         cryptodev->device = &dpaa2_dev->device;
1928         cryptodev->device->driver = &dpaa2_drv->driver;
1929
1930         /* init user callbacks */
1931         TAILQ_INIT(&(cryptodev->link_intr_cbs));
1932
1933         /* Invoke PMD device initialization function */
1934         retval = dpaa2_sec_dev_init(cryptodev);
1935         if (retval == 0)
1936                 return 0;
1937
1938         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1939                 rte_free(cryptodev->data->dev_private);
1940
1941         cryptodev->attached = RTE_CRYPTODEV_DETACHED;
1942
1943         return -ENXIO;
1944 }
1945
1946 static int
1947 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
1948 {
1949         struct rte_cryptodev *cryptodev;
1950         int ret;
1951
1952         cryptodev = dpaa2_dev->cryptodev;
1953         if (cryptodev == NULL)
1954                 return -ENODEV;
1955
1956         ret = dpaa2_sec_uninit(cryptodev);
1957         if (ret)
1958                 return ret;
1959
1960         /* free crypto device */
1961         rte_cryptodev_pmd_release_device(cryptodev);
1962
1963         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1964                 rte_free(cryptodev->data->dev_private);
1965
1966         cryptodev->device = NULL;
1967         cryptodev->data = NULL;
1968
1969         return 0;
1970 }
1971
1972 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
1973         .drv_type = DPAA2_MC_DPSECI_DEVID,
1974         .driver = {
1975                 .name = "DPAA2 SEC PMD"
1976         },
1977         .probe = cryptodev_dpaa2_sec_probe,
1978         .remove = cryptodev_dpaa2_sec_remove,
1979 };
1980
1981 RTE_PMD_REGISTER_DPAA2(CRYPTODEV_NAME_DPAA2_SEC_PMD, rte_dpaa2_sec_driver);
1982 RTE_PMD_REGISTER_CRYPTO_DRIVER(rte_dpaa2_sec_driver, cryptodev_driver_id);