drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   5  *   Copyright 2016 NXP.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <time.h>
  35 #include <net/if.h>
  36
  37 #include <rte_mbuf.h>
  38 #include <rte_cryptodev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_memcpy.h>
  41 #include <rte_string_fns.h>
  42 #include <rte_cycles.h>
  43 #include <rte_kvargs.h>
  44 #include <rte_dev.h>
  45 #include <rte_cryptodev_pmd.h>
  46 #include <rte_common.h>
  47 #include <rte_fslmc.h>
  48 #include <fslmc_vfio.h>
  49 #include <dpaa2_hw_pvt.h>
  50 #include <dpaa2_hw_dpio.h>
  51 #include <dpaa2_hw_mempool.h>
  52 #include <fsl_dpseci.h>
  53 #include <fsl_mc_sys.h>
  54
  55 #include "dpaa2_sec_priv.h"
  56 #include "dpaa2_sec_logs.h"
  57
  58 /* RTA header files */
  59 #include <hw/desc/ipsec.h>
  60 #include <hw/desc/algo.h>
  61
  62 /* Minimum job descriptor consists of a oneword job descriptor HEADER and
  63  * a pointer to the shared descriptor
  64  */
  65 #define MIN_JOB_DESC_SIZE       (CAAM_CMD_SZ + CAAM_PTR_SZ)
  66 #define FSL_VENDOR_ID           0x1957
  67 #define FSL_DEVICE_ID           0x410
  68 #define FSL_SUBSYSTEM_SEC       1
  69 #define FSL_MC_DPSECI_DEVID     3
  70
  71 #define NO_PREFETCH 0
  72 /* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
  73 #define FLE_POOL_NUM_BUFS       32000
  74 #define FLE_POOL_BUF_SIZE       256
  75 #define FLE_POOL_CACHE_SIZE     512
  76
  77 enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;
  78
  79 static uint8_t cryptodev_driver_id;
  80
  81 static inline int
  82 build_authenc_gcm_fd(dpaa2_sec_session *sess,
  83                      struct rte_crypto_op *op,
  84                      struct qbman_fd *fd, uint16_t bpid)
  85 {
  86         struct rte_crypto_sym_op *sym_op = op->sym;
  87         struct ctxt_priv *priv = sess->ctxt;
  88         struct qbman_fle *fle, *sge;
  89         struct sec_flow_context *flc;
  90         uint32_t auth_only_len = sess->ext_params.aead_ctxt.auth_only_len;
  91         int icv_len = sess->digest_length, retval;
  92         uint8_t *old_icv;
  93         struct rte_mbuf *dst;
  94         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
  95                         sess->iv.offset);
  96
  97         PMD_INIT_FUNC_TRACE();
  98
  99         if (sym_op->m_dst)
 100                 dst = sym_op->m_dst;
 101         else
 102                 dst = sym_op->m_src;
 103
 104         /* TODO we are using the first FLE entry to store Mbuf and session ctxt.
 105          * Currently we donot know which FLE has the mbuf stored.
 106          * So while retreiving we can go back 1 FLE from the FD -ADDR
 107          * to get the MBUF Addr from the previous FLE.
 108          * We can have a better approach to use the inline Mbuf
 109          */
 110         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 111         if (retval) {
 112                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 113                 return -1;
 114         }
 115         memset(fle, 0, FLE_POOL_BUF_SIZE);
 116         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 117         DPAA2_FLE_SAVE_CTXT(fle, priv);
 118         fle = fle + 1;
 119         sge = fle + 2;
 120         if (likely(bpid < MAX_BPID)) {
 121                 DPAA2_SET_FD_BPID(fd, bpid);
 122                 DPAA2_SET_FLE_BPID(fle, bpid);
 123                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 124                 DPAA2_SET_FLE_BPID(sge, bpid);
 125                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 126                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 127                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 128         } else {
 129                 DPAA2_SET_FD_IVP(fd);
 130                 DPAA2_SET_FLE_IVP(fle);
 131                 DPAA2_SET_FLE_IVP((fle + 1));
 132                 DPAA2_SET_FLE_IVP(sge);
 133                 DPAA2_SET_FLE_IVP((sge + 1));
 134                 DPAA2_SET_FLE_IVP((sge + 2));
 135                 DPAA2_SET_FLE_IVP((sge + 3));
 136         }
 137
 138         /* Save the shared descriptor */
 139         flc = &priv->flc_desc[0].flc;
 140         /* Configure FD as a FRAME LIST */
 141         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 142         DPAA2_SET_FD_COMPOUND_FMT(fd);
 143         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 144
 145         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 146                    "iv-len=%d data_off: 0x%x\n",
 147                    sym_op->aead.data.offset,
 148                    sym_op->aead.data.length,
 149                    sym_op->aead.digest.length,
 150                    sess->iv.length,
 151                    sym_op->m_src->data_off);
 152
 153         /* Configure Output FLE with Scatter/Gather Entry */
 154         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 155         if (auth_only_len)
 156                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 157         fle->length = (sess->dir == DIR_ENC) ?
 158                         (sym_op->aead.data.length + icv_len + auth_only_len) :
 159                         sym_op->aead.data.length + auth_only_len;
 160
 161         DPAA2_SET_FLE_SG_EXT(fle);
 162
 163         /* Configure Output SGE for Encap/Decap */
 164         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 165         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 166                                 dst->data_off - auth_only_len);
 167         sge->length = sym_op->aead.data.length + auth_only_len;
 168
 169         if (sess->dir == DIR_ENC) {
 170                 sge++;
 171                 DPAA2_SET_FLE_ADDR(sge,
 172                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.digest.data));
 173                 sge->length = sess->digest_length;
 174                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 175                                         sess->iv.length + auth_only_len));
 176         }
 177         DPAA2_SET_FLE_FIN(sge);
 178
 179         sge++;
 180         fle++;
 181
 182         /* Configure Input FLE with Scatter/Gather Entry */
 183         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 184         DPAA2_SET_FLE_SG_EXT(fle);
 185         DPAA2_SET_FLE_FIN(fle);
 186         fle->length = (sess->dir == DIR_ENC) ?
 187                 (sym_op->aead.data.length + sess->iv.length + auth_only_len) :
 188                 (sym_op->aead.data.length + sess->iv.length + auth_only_len +
 189                  sess->digest_length);
 190
 191         /* Configure Input SGE for Encap/Decap */
 192         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(IV_ptr));
 193         sge->length = sess->iv.length;
 194         sge++;
 195         if (auth_only_len) {
 196                 DPAA2_SET_FLE_ADDR(sge,
 197                                 DPAA2_VADDR_TO_IOVA(sym_op->aead.aad.data));
 198                 sge->length = auth_only_len;
 199                 DPAA2_SET_FLE_BPID(sge, bpid);
 200                 sge++;
 201         }
 202
 203         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 204         DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
 205                                 sym_op->m_src->data_off);
 206         sge->length = sym_op->aead.data.length;
 207         if (sess->dir == DIR_DEC) {
 208                 sge++;
 209                 old_icv = (uint8_t *)(sge + 1);
 210                 memcpy(old_icv, sym_op->aead.digest.data,
 211                        sess->digest_length);
 212                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 213                 sge->length = sess->digest_length;
 214                 DPAA2_SET_FD_LEN(fd, (sym_op->aead.data.length +
 215                                  sess->digest_length +
 216                                  sess->iv.length +
 217                                  auth_only_len));
 218         }
 219         DPAA2_SET_FLE_FIN(sge);
 220
 221         if (auth_only_len) {
 222                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 223                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 224         }
 225
 226         return 0;
 227 }
 228
 229 static inline int
 230 build_authenc_fd(dpaa2_sec_session *sess,
 231                  struct rte_crypto_op *op,
 232                  struct qbman_fd *fd, uint16_t bpid)
 233 {
 234         struct rte_crypto_sym_op *sym_op = op->sym;
 235         struct ctxt_priv *priv = sess->ctxt;
 236         struct qbman_fle *fle, *sge;
 237         struct sec_flow_context *flc;
 238         uint32_t auth_only_len = sym_op->auth.data.length -
 239                                 sym_op->cipher.data.length;
 240         int icv_len = sess->digest_length, retval;
 241         uint8_t *old_icv;
 242         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 243                         sess->iv.offset);
 244         struct rte_mbuf *dst;
 245
 246         PMD_INIT_FUNC_TRACE();
 247
 248         if (sym_op->m_dst)
 249                 dst = sym_op->m_dst;
 250         else
 251                 dst = sym_op->m_src;
 252
 253         /* we are using the first FLE entry to store Mbuf.
 254          * Currently we donot know which FLE has the mbuf stored.
 255          * So while retreiving we can go back 1 FLE from the FD -ADDR
 256          * to get the MBUF Addr from the previous FLE.
 257          * We can have a better approach to use the inline Mbuf
 258          */
 259         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 260         if (retval) {
 261                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 262                 return -1;
 263         }
 264         memset(fle, 0, FLE_POOL_BUF_SIZE);
 265         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 266         DPAA2_FLE_SAVE_CTXT(fle, priv);
 267         fle = fle + 1;
 268         sge = fle + 2;
 269         if (likely(bpid < MAX_BPID)) {
 270                 DPAA2_SET_FD_BPID(fd, bpid);
 271                 DPAA2_SET_FLE_BPID(fle, bpid);
 272                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 273                 DPAA2_SET_FLE_BPID(sge, bpid);
 274                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 275                 DPAA2_SET_FLE_BPID(sge + 2, bpid);
 276                 DPAA2_SET_FLE_BPID(sge + 3, bpid);
 277         } else {
 278                 DPAA2_SET_FD_IVP(fd);
 279                 DPAA2_SET_FLE_IVP(fle);
 280                 DPAA2_SET_FLE_IVP((fle + 1));
 281                 DPAA2_SET_FLE_IVP(sge);
 282                 DPAA2_SET_FLE_IVP((sge + 1));
 283                 DPAA2_SET_FLE_IVP((sge + 2));
 284                 DPAA2_SET_FLE_IVP((sge + 3));
 285         }
 286
 287         /* Save the shared descriptor */
 288         flc = &priv->flc_desc[0].flc;
 289         /* Configure FD as a FRAME LIST */
 290         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 291         DPAA2_SET_FD_COMPOUND_FMT(fd);
 292         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 293
 294         PMD_TX_LOG(DEBUG, "auth_off: 0x%x/length %d, digest-len=%d\n"
 295                    "cipher_off: 0x%x/length %d, iv-len=%d data_off: 0x%x\n",
 296                    sym_op->auth.data.offset,
 297                    sym_op->auth.data.length,
 298                    sess->digest_length,
 299                    sym_op->cipher.data.offset,
 300                    sym_op->cipher.data.length,
 301                    sess->iv.length,
 302                    sym_op->m_src->data_off);
 303
 304         /* Configure Output FLE with Scatter/Gather Entry */
 305         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 306         if (auth_only_len)
 307                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 308         fle->length = (sess->dir == DIR_ENC) ?
 309                         (sym_op->cipher.data.length + icv_len) :
 310                         sym_op->cipher.data.length;
 311
 312         DPAA2_SET_FLE_SG_EXT(fle);
 313
 314         /* Configure Output SGE for Encap/Decap */
 315         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 316         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 317                                 dst->data_off);
 318         sge->length = sym_op->cipher.data.length;
 319
 320         if (sess->dir == DIR_ENC) {
 321                 sge++;
 322                 DPAA2_SET_FLE_ADDR(sge,
 323                                 DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 324                 sge->length = sess->digest_length;
 325                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 326                                         sess->iv.length));
 327         }
 328         DPAA2_SET_FLE_FIN(sge);
 329
 330         sge++;
 331         fle++;
 332
 333         /* Configure Input FLE with Scatter/Gather Entry */
 334         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 335         DPAA2_SET_FLE_SG_EXT(fle);
 336         DPAA2_SET_FLE_FIN(fle);
 337         fle->length = (sess->dir == DIR_ENC) ?
 338                         (sym_op->auth.data.length + sess->iv.length) :
 339                         (sym_op->auth.data.length + sess->iv.length +
 340                          sess->digest_length);
 341
 342         /* Configure Input SGE for Encap/Decap */
 343         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 344         sge->length = sess->iv.length;
 345         sge++;
 346
 347         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 348         DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 349                                 sym_op->m_src->data_off);
 350         sge->length = sym_op->auth.data.length;
 351         if (sess->dir == DIR_DEC) {
 352                 sge++;
 353                 old_icv = (uint8_t *)(sge + 1);
 354                 memcpy(old_icv, sym_op->auth.digest.data,
 355                        sess->digest_length);
 356                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));
 357                 sge->length = sess->digest_length;
 358                 DPAA2_SET_FD_LEN(fd, (sym_op->auth.data.length +
 359                                  sess->digest_length +
 360                                  sess->iv.length));
 361         }
 362         DPAA2_SET_FLE_FIN(sge);
 363         if (auth_only_len) {
 364                 DPAA2_SET_FLE_INTERNAL_JD(fle, auth_only_len);
 365                 DPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);
 366         }
 367         return 0;
 368 }
 369
 370 static inline int
 371 build_auth_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 372               struct qbman_fd *fd, uint16_t bpid)
 373 {
 374         struct rte_crypto_sym_op *sym_op = op->sym;
 375         struct qbman_fle *fle, *sge;
 376         struct sec_flow_context *flc;
 377         struct ctxt_priv *priv = sess->ctxt;
 378         uint8_t *old_digest;
 379         int retval;
 380
 381         PMD_INIT_FUNC_TRACE();
 382
 383         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 384         if (retval) {
 385                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 386                 return -1;
 387         }
 388         memset(fle, 0, FLE_POOL_BUF_SIZE);
 389         /* TODO we are using the first FLE entry to store Mbuf.
 390          * Currently we donot know which FLE has the mbuf stored.
 391          * So while retreiving we can go back 1 FLE from the FD -ADDR
 392          * to get the MBUF Addr from the previous FLE.
 393          * We can have a better approach to use the inline Mbuf
 394          */
 395         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 396         DPAA2_FLE_SAVE_CTXT(fle, priv);
 397         fle = fle + 1;
 398
 399         if (likely(bpid < MAX_BPID)) {
 400                 DPAA2_SET_FD_BPID(fd, bpid);
 401                 DPAA2_SET_FLE_BPID(fle, bpid);
 402                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 403         } else {
 404                 DPAA2_SET_FD_IVP(fd);
 405                 DPAA2_SET_FLE_IVP(fle);
 406                 DPAA2_SET_FLE_IVP((fle + 1));
 407         }
 408         flc = &priv->flc_desc[DESC_INITFINAL].flc;
 409         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 410
 411         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sym_op->auth.digest.data));
 412         fle->length = sess->digest_length;
 413
 414         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 415         DPAA2_SET_FD_COMPOUND_FMT(fd);
 416         fle++;
 417
 418         if (sess->dir == DIR_ENC) {
 419                 DPAA2_SET_FLE_ADDR(fle,
 420                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 421                 DPAA2_SET_FLE_OFFSET(fle, sym_op->auth.data.offset +
 422                                      sym_op->m_src->data_off);
 423                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length);
 424                 fle->length = sym_op->auth.data.length;
 425         } else {
 426                 sge = fle + 2;
 427                 DPAA2_SET_FLE_SG_EXT(fle);
 428                 DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 429
 430                 if (likely(bpid < MAX_BPID)) {
 431                         DPAA2_SET_FLE_BPID(sge, bpid);
 432                         DPAA2_SET_FLE_BPID(sge + 1, bpid);
 433                 } else {
 434                         DPAA2_SET_FLE_IVP(sge);
 435                         DPAA2_SET_FLE_IVP((sge + 1));
 436                 }
 437                 DPAA2_SET_FLE_ADDR(sge,
 438                                    DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 439                 DPAA2_SET_FLE_OFFSET(sge, sym_op->auth.data.offset +
 440                                      sym_op->m_src->data_off);
 441
 442                 DPAA2_SET_FD_LEN(fd, sym_op->auth.data.length +
 443                                  sess->digest_length);
 444                 sge->length = sym_op->auth.data.length;
 445                 sge++;
 446                 old_digest = (uint8_t *)(sge + 1);
 447                 rte_memcpy(old_digest, sym_op->auth.digest.data,
 448                            sess->digest_length);
 449                 DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_digest));
 450                 sge->length = sess->digest_length;
 451                 fle->length = sym_op->auth.data.length +
 452                                 sess->digest_length;
 453                 DPAA2_SET_FLE_FIN(sge);
 454         }
 455         DPAA2_SET_FLE_FIN(fle);
 456
 457         return 0;
 458 }
 459
 460 static int
 461 build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 462                 struct qbman_fd *fd, uint16_t bpid)
 463 {
 464         struct rte_crypto_sym_op *sym_op = op->sym;
 465         struct qbman_fle *fle, *sge;
 466         int retval;
 467         struct sec_flow_context *flc;
 468         struct ctxt_priv *priv = sess->ctxt;
 469         uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 470                         sess->iv.offset);
 471         struct rte_mbuf *dst;
 472
 473         PMD_INIT_FUNC_TRACE();
 474
 475         if (sym_op->m_dst)
 476                 dst = sym_op->m_dst;
 477         else
 478                 dst = sym_op->m_src;
 479
 480         retval = rte_mempool_get(priv->fle_pool, (void **)(&fle));
 481         if (retval) {
 482                 RTE_LOG(ERR, PMD, "Memory alloc failed for SGE\n");
 483                 return -1;
 484         }
 485         memset(fle, 0, FLE_POOL_BUF_SIZE);
 486         /* TODO we are using the first FLE entry to store Mbuf.
 487          * Currently we donot know which FLE has the mbuf stored.
 488          * So while retreiving we can go back 1 FLE from the FD -ADDR
 489          * to get the MBUF Addr from the previous FLE.
 490          * We can have a better approach to use the inline Mbuf
 491          */
 492         DPAA2_SET_FLE_ADDR(fle, DPAA2_OP_VADDR_TO_IOVA(op));
 493         DPAA2_FLE_SAVE_CTXT(fle, priv);
 494         fle = fle + 1;
 495         sge = fle + 2;
 496
 497         if (likely(bpid < MAX_BPID)) {
 498                 DPAA2_SET_FD_BPID(fd, bpid);
 499                 DPAA2_SET_FLE_BPID(fle, bpid);
 500                 DPAA2_SET_FLE_BPID(fle + 1, bpid);
 501                 DPAA2_SET_FLE_BPID(sge, bpid);
 502                 DPAA2_SET_FLE_BPID(sge + 1, bpid);
 503         } else {
 504                 DPAA2_SET_FD_IVP(fd);
 505                 DPAA2_SET_FLE_IVP(fle);
 506                 DPAA2_SET_FLE_IVP((fle + 1));
 507                 DPAA2_SET_FLE_IVP(sge);
 508                 DPAA2_SET_FLE_IVP((sge + 1));
 509         }
 510
 511         flc = &priv->flc_desc[0].flc;
 512         DPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(fle));
 513         DPAA2_SET_FD_LEN(fd, sym_op->cipher.data.length +
 514                          sess->iv.length);
 515         DPAA2_SET_FD_COMPOUND_FMT(fd);
 516         DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 517
 518         PMD_TX_LOG(DEBUG, "cipher_off: 0x%x/length %d,ivlen=%d data_off: 0x%x",
 519                    sym_op->cipher.data.offset,
 520                    sym_op->cipher.data.length,
 521                    sess->iv.length,
 522                    sym_op->m_src->data_off);
 523
 524         DPAA2_SET_FLE_ADDR(fle, DPAA2_MBUF_VADDR_TO_IOVA(dst));
 525         DPAA2_SET_FLE_OFFSET(fle, sym_op->cipher.data.offset +
 526                              dst->data_off);
 527
 528         fle->length = sym_op->cipher.data.length + sess->iv.length;
 529
 530         PMD_TX_LOG(DEBUG, "1 - flc = %p, fle = %p FLEaddr = %x-%x, length %d",
 531                    flc, fle, fle->addr_hi, fle->addr_lo, fle->length);
 532
 533         fle++;
 534
 535         DPAA2_SET_FLE_ADDR(fle, DPAA2_VADDR_TO_IOVA(sge));
 536         fle->length = sym_op->cipher.data.length + sess->iv.length;
 537
 538         DPAA2_SET_FLE_SG_EXT(fle);
 539
 540         DPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));
 541         sge->length = sess->iv.length;
 542
 543         sge++;
 544         DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));
 545         DPAA2_SET_FLE_OFFSET(sge, sym_op->cipher.data.offset +
 546                              sym_op->m_src->data_off);
 547
 548         sge->length = sym_op->cipher.data.length;
 549         DPAA2_SET_FLE_FIN(sge);
 550         DPAA2_SET_FLE_FIN(fle);
 551
 552         PMD_TX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 553                    (void *)DPAA2_GET_FD_ADDR(fd),
 554                    DPAA2_GET_FD_BPID(fd),
 555                    rte_dpaa2_bpid_info[bpid].meta_data_size,
 556                    DPAA2_GET_FD_OFFSET(fd),
 557                    DPAA2_GET_FD_LEN(fd));
 558
 559         return 0;
 560 }
 561
 562 static inline int
 563 build_sec_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
 564              struct qbman_fd *fd, uint16_t bpid)
 565 {
 566         int ret = -1;
 567
 568         PMD_INIT_FUNC_TRACE();
 569         /*
 570          * Segmented buffer is not supported.
 571          */
 572         if (!rte_pktmbuf_is_contiguous(op->sym->m_src)) {
 573                 op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 574                 return -ENOTSUP;
 575         }
 576         switch (sess->ctxt_type) {
 577         case DPAA2_SEC_CIPHER:
 578                 ret = build_cipher_fd(sess, op, fd, bpid);
 579                 break;
 580         case DPAA2_SEC_AUTH:
 581                 ret = build_auth_fd(sess, op, fd, bpid);
 582                 break;
 583         case DPAA2_SEC_AEAD:
 584                 ret = build_authenc_gcm_fd(sess, op, fd, bpid);
 585                 break;
 586         case DPAA2_SEC_CIPHER_HASH:
 587                 ret = build_authenc_fd(sess, op, fd, bpid);
 588                 break;
 589         case DPAA2_SEC_HASH_CIPHER:
 590         default:
 591                 RTE_LOG(ERR, PMD, "error: Unsupported session\n");
 592         }
 593         return ret;
 594 }
 595
 596 static uint16_t
 597 dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 598                         uint16_t nb_ops)
 599 {
 600         /* Function to transmit the frames to given device and VQ*/
 601         uint32_t loop;
 602         int32_t ret;
 603         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
 604         uint32_t frames_to_send;
 605         struct qbman_eq_desc eqdesc;
 606         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 607         struct qbman_swp *swp;
 608         uint16_t num_tx = 0;
 609         /*todo - need to support multiple buffer pools */
 610         uint16_t bpid;
 611         struct rte_mempool *mb_pool;
 612         dpaa2_sec_session *sess;
 613
 614         if (unlikely(nb_ops == 0))
 615                 return 0;
 616
 617         if (ops[0]->sess_type != RTE_CRYPTO_OP_WITH_SESSION) {
 618                 RTE_LOG(ERR, PMD, "sessionless crypto op not supported\n");
 619                 return 0;
 620         }
 621         /*Prepare enqueue descriptor*/
 622         qbman_eq_desc_clear(&eqdesc);
 623         qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
 624         qbman_eq_desc_set_response(&eqdesc, 0, 0);
 625         qbman_eq_desc_set_fq(&eqdesc, dpaa2_qp->tx_vq.fqid);
 626
 627         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 628                 ret = dpaa2_affine_qbman_swp_sec();
 629                 if (ret) {
 630                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 631                         return 0;
 632                 }
 633         }
 634         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 635
 636         while (nb_ops) {
 637                 frames_to_send = (nb_ops >> 3) ? MAX_TX_RING_SLOTS : nb_ops;
 638
 639                 for (loop = 0; loop < frames_to_send; loop++) {
 640                         /*Clear the unused FD fields before sending*/
 641                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 642                         sess = (dpaa2_sec_session *)
 643                                         get_session_private_data(
 644                                         (*ops)->sym->session,
 645                                         cryptodev_driver_id);
 646                         mb_pool = (*ops)->sym->m_src->pool;
 647                         bpid = mempool_to_bpid(mb_pool);
 648                         ret = build_sec_fd(sess, *ops, &fd_arr[loop], bpid);
 649                         if (ret) {
 650                                 PMD_DRV_LOG(ERR, "error: Improper packet"
 651                                             " contents for crypto operation\n");
 652                                 goto skip_tx;
 653                         }
 654                         ops++;
 655                 }
 656                 loop = 0;
 657                 while (loop < frames_to_send) {
 658                         loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
 659                                                         &fd_arr[loop],
 660                                                         frames_to_send - loop);
 661                 }
 662
 663                 num_tx += frames_to_send;
 664                 nb_ops -= frames_to_send;
 665         }
 666 skip_tx:
 667         dpaa2_qp->tx_vq.tx_pkts += num_tx;
 668         dpaa2_qp->tx_vq.err_pkts += nb_ops;
 669         return num_tx;
 670 }
 671
 672 static inline struct rte_crypto_op *
 673 sec_fd_to_mbuf(const struct qbman_fd *fd)
 674 {
 675         struct qbman_fle *fle;
 676         struct rte_crypto_op *op;
 677         struct ctxt_priv *priv;
 678         struct rte_mbuf *dst, *src;
 679
 680         fle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
 681
 682         PMD_RX_LOG(DEBUG, "FLE addr = %x - %x, offset = %x",
 683                    fle->addr_hi, fle->addr_lo, fle->fin_bpid_offset);
 684
 685         /* we are using the first FLE entry to store Mbuf.
 686          * Currently we donot know which FLE has the mbuf stored.
 687          * So while retreiving we can go back 1 FLE from the FD -ADDR
 688          * to get the MBUF Addr from the previous FLE.
 689          * We can have a better approach to use the inline Mbuf
 690          */
 691
 692         if (unlikely(DPAA2_GET_FD_IVP(fd))) {
 693                 /* TODO complete it. */
 694                 RTE_LOG(ERR, PMD, "error: Non inline buffer - WHAT to DO?\n");
 695                 return NULL;
 696         }
 697         op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
 698                         DPAA2_GET_FLE_ADDR((fle - 1)));
 699
 700         /* Prefeth op */
 701         src = op->sym->m_src;
 702         rte_prefetch0(src);
 703
 704         if (op->sym->m_dst) {
 705                 dst = op->sym->m_dst;
 706                 rte_prefetch0(dst);
 707         } else
 708                 dst = src;
 709
 710         PMD_RX_LOG(DEBUG, "mbuf %p BMAN buf addr %p",
 711                    (void *)dst, dst->buf_addr);
 712
 713         PMD_RX_LOG(DEBUG, "fdaddr =%p bpid =%d meta =%d off =%d, len =%d",
 714                    (void *)DPAA2_GET_FD_ADDR(fd),
 715                    DPAA2_GET_FD_BPID(fd),
 716                    rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
 717                    DPAA2_GET_FD_OFFSET(fd),
 718                    DPAA2_GET_FD_LEN(fd));
 719
 720         /* free the fle memory */
 721         priv = (struct ctxt_priv *)DPAA2_GET_FLE_CTXT(fle - 1);
 722         rte_mempool_put(priv->fle_pool, (void *)(fle - 1));
 723
 724         return op;
 725 }
 726
 727 static uint16_t
 728 dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
 729                         uint16_t nb_ops)
 730 {
 731         /* Function is responsible to receive frames for a given device and VQ*/
 732         struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 733         struct qbman_result *dq_storage;
 734         uint32_t fqid = dpaa2_qp->rx_vq.fqid;
 735         int ret, num_rx = 0;
 736         uint8_t is_last = 0, status;
 737         struct qbman_swp *swp;
 738         const struct qbman_fd *fd;
 739         struct qbman_pull_desc pulldesc;
 740
 741         if (!DPAA2_PER_LCORE_SEC_DPIO) {
 742                 ret = dpaa2_affine_qbman_swp_sec();
 743                 if (ret) {
 744                         RTE_LOG(ERR, PMD, "Failure in affining portal\n");
 745                         return 0;
 746                 }
 747         }
 748         swp = DPAA2_PER_LCORE_SEC_PORTAL;
 749         dq_storage = dpaa2_qp->rx_vq.q_storage->dq_storage[0];
 750
 751         qbman_pull_desc_clear(&pulldesc);
 752         qbman_pull_desc_set_numframes(&pulldesc,
 753                                       (nb_ops > DPAA2_DQRR_RING_SIZE) ?
 754                                       DPAA2_DQRR_RING_SIZE : nb_ops);
 755         qbman_pull_desc_set_fq(&pulldesc, fqid);
 756         qbman_pull_desc_set_storage(&pulldesc, dq_storage,
 757                                     (dma_addr_t)DPAA2_VADDR_TO_IOVA(dq_storage),
 758                                     1);
 759
 760         /*Issue a volatile dequeue command. */
 761         while (1) {
 762                 if (qbman_swp_pull(swp, &pulldesc)) {
 763                         RTE_LOG(WARNING, PMD,
 764                                 "SEC VDQ command is not issued : QBMAN busy\n");
 765                         /* Portal was busy, try again */
 766                         continue;
 767                 }
 768                 break;
 769         };
 770
 771         /* Receive the packets till Last Dequeue entry is found with
 772          * respect to the above issues PULL command.
 773          */
 774         while (!is_last) {
 775                 /* Check if the previous issued command is completed.
 776                  * Also seems like the SWP is shared between the Ethernet Driver
 777                  * and the SEC driver.
 778                  */
 779                 while (!qbman_check_command_complete(dq_storage))
 780                         ;
 781
 782                 /* Loop until the dq_storage is updated with
 783                  * new token by QBMAN
 784                  */
 785                 while (!qbman_check_new_result(dq_storage))
 786                         ;
 787                 /* Check whether Last Pull command is Expired and
 788                  * setting Condition for Loop termination
 789                  */
 790                 if (qbman_result_DQ_is_pull_complete(dq_storage)) {
 791                         is_last = 1;
 792                         /* Check for valid frame. */
 793                         status = (uint8_t)qbman_result_DQ_flags(dq_storage);
 794                         if (unlikely(
 795                                 (status & QBMAN_DQ_STAT_VALIDFRAME) == 0)) {
 796                                 PMD_RX_LOG(DEBUG, "No frame is delivered");
 797                                 continue;
 798                         }
 799                 }
 800
 801                 fd = qbman_result_DQ_fd(dq_storage);
 802                 ops[num_rx] = sec_fd_to_mbuf(fd);
 803
 804                 if (unlikely(fd->simple.frc)) {
 805                         /* TODO Parse SEC errors */
 806                         RTE_LOG(ERR, PMD, "SEC returned Error - %x\n",
 807                                 fd->simple.frc);
 808                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_ERROR;
 809                 } else {
 810                         ops[num_rx]->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 811                 }
 812
 813                 num_rx++;
 814                 dq_storage++;
 815         } /* End of Packet Rx loop */
 816
 817         dpaa2_qp->rx_vq.rx_pkts += num_rx;
 818
 819         PMD_RX_LOG(DEBUG, "SEC Received %d Packets", num_rx);
 820         /*Return the total number of packets received to DPAA2 app*/
 821         return num_rx;
 822 }
 823
 824 /** Release queue pair */
 825 static int
 826 dpaa2_sec_queue_pair_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
 827 {
 828         struct dpaa2_sec_qp *qp =
 829                 (struct dpaa2_sec_qp *)dev->data->queue_pairs[queue_pair_id];
 830
 831         PMD_INIT_FUNC_TRACE();
 832
 833         if (qp->rx_vq.q_storage) {
 834                 dpaa2_free_dq_storage(qp->rx_vq.q_storage);
 835                 rte_free(qp->rx_vq.q_storage);
 836         }
 837         rte_free(qp);
 838
 839         dev->data->queue_pairs[queue_pair_id] = NULL;
 840
 841         return 0;
 842 }
 843
 844 /** Setup a queue pair */
 845 static int
 846 dpaa2_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 847                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
 848                 __rte_unused int socket_id,
 849                 __rte_unused struct rte_mempool *session_pool)
 850 {
 851         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
 852         struct dpaa2_sec_qp *qp;
 853         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
 854         struct dpseci_rx_queue_cfg cfg;
 855         int32_t retcode;
 856
 857         PMD_INIT_FUNC_TRACE();
 858
 859         /* If qp is already in use free ring memory and qp metadata. */
 860         if (dev->data->queue_pairs[qp_id] != NULL) {
 861                 PMD_DRV_LOG(INFO, "QP already setup");
 862                 return 0;
 863         }
 864
 865         PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, conf =%p",
 866                     dev, qp_id, qp_conf);
 867
 868         memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
 869
 870         qp = rte_malloc(NULL, sizeof(struct dpaa2_sec_qp),
 871                         RTE_CACHE_LINE_SIZE);
 872         if (!qp) {
 873                 RTE_LOG(ERR, PMD, "malloc failed for rx/tx queues\n");
 874                 return -1;
 875         }
 876
 877         qp->rx_vq.dev = dev;
 878         qp->tx_vq.dev = dev;
 879         qp->rx_vq.q_storage = rte_malloc("sec dq storage",
 880                 sizeof(struct queue_storage_info_t),
 881                 RTE_CACHE_LINE_SIZE);
 882         if (!qp->rx_vq.q_storage) {
 883                 RTE_LOG(ERR, PMD, "malloc failed for q_storage\n");
 884                 return -1;
 885         }
 886         memset(qp->rx_vq.q_storage, 0, sizeof(struct queue_storage_info_t));
 887
 888         if (dpaa2_alloc_dq_storage(qp->rx_vq.q_storage)) {
 889                 RTE_LOG(ERR, PMD, "dpaa2_alloc_dq_storage failed\n");
 890                 return -1;
 891         }
 892
 893         dev->data->queue_pairs[qp_id] = qp;
 894
 895         cfg.options = cfg.options | DPSECI_QUEUE_OPT_USER_CTX;
 896         cfg.user_ctx = (uint64_t)(&qp->rx_vq);
 897         retcode = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
 898                                       qp_id, &cfg);
 899         return retcode;
 900 }
 901
 902 /** Start queue pair */
 903 static int
 904 dpaa2_sec_queue_pair_start(__rte_unused struct rte_cryptodev *dev,
 905                            __rte_unused uint16_t queue_pair_id)
 906 {
 907         PMD_INIT_FUNC_TRACE();
 908
 909         return 0;
 910 }
 911
 912 /** Stop queue pair */
 913 static int
 914 dpaa2_sec_queue_pair_stop(__rte_unused struct rte_cryptodev *dev,
 915                           __rte_unused uint16_t queue_pair_id)
 916 {
 917         PMD_INIT_FUNC_TRACE();
 918
 919         return 0;
 920 }
 921
 922 /** Return the number of allocated queue pairs */
 923 static uint32_t
 924 dpaa2_sec_queue_pair_count(struct rte_cryptodev *dev)
 925 {
 926         PMD_INIT_FUNC_TRACE();
 927
 928         return dev->data->nb_queue_pairs;
 929 }
 930
 931 /** Returns the size of the aesni gcm session structure */
 932 static unsigned int
 933 dpaa2_sec_session_get_size(struct rte_cryptodev *dev __rte_unused)
 934 {
 935         PMD_INIT_FUNC_TRACE();
 936
 937         return sizeof(dpaa2_sec_session);
 938 }
 939
 940 static int
 941 dpaa2_sec_cipher_init(struct rte_cryptodev *dev,
 942                       struct rte_crypto_sym_xform *xform,
 943                       dpaa2_sec_session *session)
 944 {
 945         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
 946         struct alginfo cipherdata;
 947         int bufsize, i;
 948         struct ctxt_priv *priv;
 949         struct sec_flow_context *flc;
 950
 951         PMD_INIT_FUNC_TRACE();
 952
 953         /* For SEC CIPHER only one descriptor is required. */
 954         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
 955                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
 956                         RTE_CACHE_LINE_SIZE);
 957         if (priv == NULL) {
 958                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
 959                 return -1;
 960         }
 961
 962         priv->fle_pool = dev_priv->fle_pool;
 963
 964         flc = &priv->flc_desc[0].flc;
 965
 966         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
 967                         RTE_CACHE_LINE_SIZE);
 968         if (session->cipher_key.data == NULL) {
 969                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
 970                 rte_free(priv);
 971                 return -1;
 972         }
 973         session->cipher_key.length = xform->cipher.key.length;
 974
 975         memcpy(session->cipher_key.data, xform->cipher.key.data,
 976                xform->cipher.key.length);
 977         cipherdata.key = (uint64_t)session->cipher_key.data;
 978         cipherdata.keylen = session->cipher_key.length;
 979         cipherdata.key_enc_flags = 0;
 980         cipherdata.key_type = RTA_DATA_IMM;
 981
 982         /* Set IV parameters */
 983         session->iv.offset = xform->cipher.iv.offset;
 984         session->iv.length = xform->cipher.iv.length;
 985
 986         switch (xform->cipher.algo) {
 987         case RTE_CRYPTO_CIPHER_AES_CBC:
 988                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
 989                 cipherdata.algmode = OP_ALG_AAI_CBC;
 990                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
 991                 break;
 992         case RTE_CRYPTO_CIPHER_3DES_CBC:
 993                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
 994                 cipherdata.algmode = OP_ALG_AAI_CBC;
 995                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
 996                 break;
 997         case RTE_CRYPTO_CIPHER_AES_CTR:
 998                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
 999                 cipherdata.algmode = OP_ALG_AAI_CTR;
1000                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1001                 break;
1002         case RTE_CRYPTO_CIPHER_3DES_CTR:
1003         case RTE_CRYPTO_CIPHER_AES_ECB:
1004         case RTE_CRYPTO_CIPHER_3DES_ECB:
1005         case RTE_CRYPTO_CIPHER_AES_XTS:
1006         case RTE_CRYPTO_CIPHER_AES_F8:
1007         case RTE_CRYPTO_CIPHER_ARC4:
1008         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1009         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1010         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
1011         case RTE_CRYPTO_CIPHER_NULL:
1012                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
1013                         xform->cipher.algo);
1014                 goto error_out;
1015         default:
1016                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1017                         xform->cipher.algo);
1018                 goto error_out;
1019         }
1020         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1021                                 DIR_ENC : DIR_DEC;
1022
1023         bufsize = cnstr_shdsc_blkcipher(priv->flc_desc[0].desc, 1, 0,
1024                                         &cipherdata, NULL, session->iv.length,
1025                                         session->dir);
1026         if (bufsize < 0) {
1027                 RTE_LOG(ERR, PMD, "Crypto: Descriptor build failed\n");
1028                 goto error_out;
1029         }
1030         flc->dhr = 0;
1031         flc->bpv0 = 0x1;
1032         flc->mode_bits = 0x8000;
1033
1034         flc->word1_sdl = (uint8_t)bufsize;
1035         flc->word2_rflc_31_0 = lower_32_bits(
1036                         (uint64_t)&(((struct dpaa2_sec_qp *)
1037                         dev->data->queue_pairs[0])->rx_vq));
1038         flc->word3_rflc_63_32 = upper_32_bits(
1039                         (uint64_t)&(((struct dpaa2_sec_qp *)
1040                         dev->data->queue_pairs[0])->rx_vq));
1041         session->ctxt = priv;
1042
1043         for (i = 0; i < bufsize; i++)
1044                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1045                             i, priv->flc_desc[0].desc[i]);
1046
1047         return 0;
1048
1049 error_out:
1050         rte_free(session->cipher_key.data);
1051         rte_free(priv);
1052         return -1;
1053 }
1054
1055 static int
1056 dpaa2_sec_auth_init(struct rte_cryptodev *dev,
1057                     struct rte_crypto_sym_xform *xform,
1058                     dpaa2_sec_session *session)
1059 {
1060         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1061         struct alginfo authdata;
1062         unsigned int bufsize, i;
1063         struct ctxt_priv *priv;
1064         struct sec_flow_context *flc;
1065
1066         PMD_INIT_FUNC_TRACE();
1067
1068         /* For SEC AUTH three descriptors are required for various stages */
1069         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1070                         sizeof(struct ctxt_priv) + 3 *
1071                         sizeof(struct sec_flc_desc),
1072                         RTE_CACHE_LINE_SIZE);
1073         if (priv == NULL) {
1074                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1075                 return -1;
1076         }
1077
1078         priv->fle_pool = dev_priv->fle_pool;
1079         flc = &priv->flc_desc[DESC_INITFINAL].flc;
1080
1081         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1082                         RTE_CACHE_LINE_SIZE);
1083         if (session->auth_key.data == NULL) {
1084                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1085                 rte_free(priv);
1086                 return -1;
1087         }
1088         session->auth_key.length = xform->auth.key.length;
1089
1090         memcpy(session->auth_key.data, xform->auth.key.data,
1091                xform->auth.key.length);
1092         authdata.key = (uint64_t)session->auth_key.data;
1093         authdata.keylen = session->auth_key.length;
1094         authdata.key_enc_flags = 0;
1095         authdata.key_type = RTA_DATA_IMM;
1096
1097         session->digest_length = xform->auth.digest_length;
1098
1099         switch (xform->auth.algo) {
1100         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1101                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1102                 authdata.algmode = OP_ALG_AAI_HMAC;
1103                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1104                 break;
1105         case RTE_CRYPTO_AUTH_MD5_HMAC:
1106                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1107                 authdata.algmode = OP_ALG_AAI_HMAC;
1108                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1109                 break;
1110         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1111                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1112                 authdata.algmode = OP_ALG_AAI_HMAC;
1113                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1114                 break;
1115         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1116                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1117                 authdata.algmode = OP_ALG_AAI_HMAC;
1118                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1119                 break;
1120         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1121                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1122                 authdata.algmode = OP_ALG_AAI_HMAC;
1123                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1124                 break;
1125         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1126                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1127                 authdata.algmode = OP_ALG_AAI_HMAC;
1128                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1129                 break;
1130         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1131         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1132         case RTE_CRYPTO_AUTH_NULL:
1133         case RTE_CRYPTO_AUTH_SHA1:
1134         case RTE_CRYPTO_AUTH_SHA256:
1135         case RTE_CRYPTO_AUTH_SHA512:
1136         case RTE_CRYPTO_AUTH_SHA224:
1137         case RTE_CRYPTO_AUTH_SHA384:
1138         case RTE_CRYPTO_AUTH_MD5:
1139         case RTE_CRYPTO_AUTH_AES_GMAC:
1140         case RTE_CRYPTO_AUTH_KASUMI_F9:
1141         case RTE_CRYPTO_AUTH_AES_CMAC:
1142         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1143         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1144                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1145                         xform->auth.algo);
1146                 goto error_out;
1147         default:
1148                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1149                         xform->auth.algo);
1150                 goto error_out;
1151         }
1152         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1153                                 DIR_ENC : DIR_DEC;
1154
1155         bufsize = cnstr_shdsc_hmac(priv->flc_desc[DESC_INITFINAL].desc,
1156                                    1, 0, &authdata, !session->dir,
1157                                    session->digest_length);
1158
1159         flc->word1_sdl = (uint8_t)bufsize;
1160         flc->word2_rflc_31_0 = lower_32_bits(
1161                         (uint64_t)&(((struct dpaa2_sec_qp *)
1162                         dev->data->queue_pairs[0])->rx_vq));
1163         flc->word3_rflc_63_32 = upper_32_bits(
1164                         (uint64_t)&(((struct dpaa2_sec_qp *)
1165                         dev->data->queue_pairs[0])->rx_vq));
1166         session->ctxt = priv;
1167         for (i = 0; i < bufsize; i++)
1168                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1169                             i, priv->flc_desc[DESC_INITFINAL].desc[i]);
1170
1171
1172         return 0;
1173
1174 error_out:
1175         rte_free(session->auth_key.data);
1176         rte_free(priv);
1177         return -1;
1178 }
1179
1180 static int
1181 dpaa2_sec_aead_init(struct rte_cryptodev *dev,
1182                     struct rte_crypto_sym_xform *xform,
1183                     dpaa2_sec_session *session)
1184 {
1185         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1186         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1187         struct alginfo aeaddata;
1188         unsigned int bufsize, i;
1189         struct ctxt_priv *priv;
1190         struct sec_flow_context *flc;
1191         struct rte_crypto_aead_xform *aead_xform = &xform->aead;
1192         int err;
1193
1194         PMD_INIT_FUNC_TRACE();
1195
1196         /* Set IV parameters */
1197         session->iv.offset = aead_xform->iv.offset;
1198         session->iv.length = aead_xform->iv.length;
1199         session->ctxt_type = DPAA2_SEC_AEAD;
1200
1201         /* For SEC AEAD only one descriptor is required */
1202         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1203                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1204                         RTE_CACHE_LINE_SIZE);
1205         if (priv == NULL) {
1206                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1207                 return -1;
1208         }
1209
1210         priv->fle_pool = dev_priv->fle_pool;
1211         flc = &priv->flc_desc[0].flc;
1212
1213         session->aead_key.data = rte_zmalloc(NULL, aead_xform->key.length,
1214                                                RTE_CACHE_LINE_SIZE);
1215         if (session->aead_key.data == NULL && aead_xform->key.length > 0) {
1216                 RTE_LOG(ERR, PMD, "No Memory for aead key\n");
1217                 rte_free(priv);
1218                 return -1;
1219         }
1220         memcpy(session->aead_key.data, aead_xform->key.data,
1221                aead_xform->key.length);
1222
1223         session->digest_length = aead_xform->digest_length;
1224         session->aead_key.length = aead_xform->key.length;
1225         ctxt->auth_only_len = aead_xform->aad_length;
1226
1227         aeaddata.key = (uint64_t)session->aead_key.data;
1228         aeaddata.keylen = session->aead_key.length;
1229         aeaddata.key_enc_flags = 0;
1230         aeaddata.key_type = RTA_DATA_IMM;
1231
1232         switch (aead_xform->algo) {
1233         case RTE_CRYPTO_AEAD_AES_GCM:
1234                 aeaddata.algtype = OP_ALG_ALGSEL_AES;
1235                 aeaddata.algmode = OP_ALG_AAI_GCM;
1236                 session->cipher_alg = RTE_CRYPTO_AEAD_AES_GCM;
1237                 break;
1238         case RTE_CRYPTO_AEAD_AES_CCM:
1239                 RTE_LOG(ERR, PMD, "Crypto: Unsupported AEAD alg %u\n",
1240                         aead_xform->algo);
1241                 goto error_out;
1242         default:
1243                 RTE_LOG(ERR, PMD, "Crypto: Undefined AEAD specified %u\n",
1244                         aead_xform->algo);
1245                 goto error_out;
1246         }
1247         session->dir = (aead_xform->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1248                                 DIR_ENC : DIR_DEC;
1249
1250         priv->flc_desc[0].desc[0] = aeaddata.keylen;
1251         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1252                                MIN_JOB_DESC_SIZE,
1253                                (unsigned int *)priv->flc_desc[0].desc,
1254                                &priv->flc_desc[0].desc[1], 1);
1255
1256         if (err < 0) {
1257                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths\n");
1258                 goto error_out;
1259         }
1260         if (priv->flc_desc[0].desc[1] & 1) {
1261                 aeaddata.key_type = RTA_DATA_IMM;
1262         } else {
1263                 aeaddata.key = DPAA2_VADDR_TO_IOVA(aeaddata.key);
1264                 aeaddata.key_type = RTA_DATA_PTR;
1265         }
1266         priv->flc_desc[0].desc[0] = 0;
1267         priv->flc_desc[0].desc[1] = 0;
1268
1269         if (session->dir == DIR_ENC)
1270                 bufsize = cnstr_shdsc_gcm_encap(
1271                                 priv->flc_desc[0].desc, 1, 0,
1272                                 &aeaddata, session->iv.length,
1273                                 session->digest_length);
1274         else
1275                 bufsize = cnstr_shdsc_gcm_decap(
1276                                 priv->flc_desc[0].desc, 1, 0,
1277                                 &aeaddata, session->iv.length,
1278                                 session->digest_length);
1279         flc->word1_sdl = (uint8_t)bufsize;
1280         flc->word2_rflc_31_0 = lower_32_bits(
1281                         (uint64_t)&(((struct dpaa2_sec_qp *)
1282                         dev->data->queue_pairs[0])->rx_vq));
1283         flc->word3_rflc_63_32 = upper_32_bits(
1284                         (uint64_t)&(((struct dpaa2_sec_qp *)
1285                         dev->data->queue_pairs[0])->rx_vq));
1286         session->ctxt = priv;
1287         for (i = 0; i < bufsize; i++)
1288                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1289                             i, priv->flc_desc[0].desc[i]);
1290
1291         return 0;
1292
1293 error_out:
1294         rte_free(session->aead_key.data);
1295         rte_free(priv);
1296         return -1;
1297 }
1298
1299
1300 static int
1301 dpaa2_sec_aead_chain_init(struct rte_cryptodev *dev,
1302                     struct rte_crypto_sym_xform *xform,
1303                     dpaa2_sec_session *session)
1304 {
1305         struct dpaa2_sec_aead_ctxt *ctxt = &session->ext_params.aead_ctxt;
1306         struct dpaa2_sec_dev_private *dev_priv = dev->data->dev_private;
1307         struct alginfo authdata, cipherdata;
1308         unsigned int bufsize, i;
1309         struct ctxt_priv *priv;
1310         struct sec_flow_context *flc;
1311         struct rte_crypto_cipher_xform *cipher_xform;
1312         struct rte_crypto_auth_xform *auth_xform;
1313         int err;
1314
1315         PMD_INIT_FUNC_TRACE();
1316
1317         if (session->ext_params.aead_ctxt.auth_cipher_text) {
1318                 cipher_xform = &xform->cipher;
1319                 auth_xform = &xform->next->auth;
1320                 session->ctxt_type =
1321                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1322                         DPAA2_SEC_CIPHER_HASH : DPAA2_SEC_HASH_CIPHER;
1323         } else {
1324                 cipher_xform = &xform->next->cipher;
1325                 auth_xform = &xform->auth;
1326                 session->ctxt_type =
1327                         (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1328                         DPAA2_SEC_HASH_CIPHER : DPAA2_SEC_CIPHER_HASH;
1329         }
1330
1331         /* Set IV parameters */
1332         session->iv.offset = cipher_xform->iv.offset;
1333         session->iv.length = cipher_xform->iv.length;
1334
1335         /* For SEC AEAD only one descriptor is required */
1336         priv = (struct ctxt_priv *)rte_zmalloc(NULL,
1337                         sizeof(struct ctxt_priv) + sizeof(struct sec_flc_desc),
1338                         RTE_CACHE_LINE_SIZE);
1339         if (priv == NULL) {
1340                 RTE_LOG(ERR, PMD, "No Memory for priv CTXT\n");
1341                 return -1;
1342         }
1343
1344         priv->fle_pool = dev_priv->fle_pool;
1345         flc = &priv->flc_desc[0].flc;
1346
1347         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
1348                                                RTE_CACHE_LINE_SIZE);
1349         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
1350                 RTE_LOG(ERR, PMD, "No Memory for cipher key\n");
1351                 rte_free(priv);
1352                 return -1;
1353         }
1354         session->cipher_key.length = cipher_xform->key.length;
1355         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
1356                                              RTE_CACHE_LINE_SIZE);
1357         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
1358                 RTE_LOG(ERR, PMD, "No Memory for auth key\n");
1359                 rte_free(session->cipher_key.data);
1360                 rte_free(priv);
1361                 return -1;
1362         }
1363         session->auth_key.length = auth_xform->key.length;
1364         memcpy(session->cipher_key.data, cipher_xform->key.data,
1365                cipher_xform->key.length);
1366         memcpy(session->auth_key.data, auth_xform->key.data,
1367                auth_xform->key.length);
1368
1369         authdata.key = (uint64_t)session->auth_key.data;
1370         authdata.keylen = session->auth_key.length;
1371         authdata.key_enc_flags = 0;
1372         authdata.key_type = RTA_DATA_IMM;
1373
1374         session->digest_length = auth_xform->digest_length;
1375
1376         switch (auth_xform->algo) {
1377         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1378                 authdata.algtype = OP_ALG_ALGSEL_SHA1;
1379                 authdata.algmode = OP_ALG_AAI_HMAC;
1380                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1381                 break;
1382         case RTE_CRYPTO_AUTH_MD5_HMAC:
1383                 authdata.algtype = OP_ALG_ALGSEL_MD5;
1384                 authdata.algmode = OP_ALG_AAI_HMAC;
1385                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1386                 break;
1387         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1388                 authdata.algtype = OP_ALG_ALGSEL_SHA224;
1389                 authdata.algmode = OP_ALG_AAI_HMAC;
1390                 session->auth_alg = RTE_CRYPTO_AUTH_SHA224_HMAC;
1391                 break;
1392         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1393                 authdata.algtype = OP_ALG_ALGSEL_SHA256;
1394                 authdata.algmode = OP_ALG_AAI_HMAC;
1395                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1396                 break;
1397         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1398                 authdata.algtype = OP_ALG_ALGSEL_SHA384;
1399                 authdata.algmode = OP_ALG_AAI_HMAC;
1400                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1401                 break;
1402         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1403                 authdata.algtype = OP_ALG_ALGSEL_SHA512;
1404                 authdata.algmode = OP_ALG_AAI_HMAC;
1405                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1406                 break;
1407         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1408         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1409         case RTE_CRYPTO_AUTH_NULL:
1410         case RTE_CRYPTO_AUTH_SHA1:
1411         case RTE_CRYPTO_AUTH_SHA256:
1412         case RTE_CRYPTO_AUTH_SHA512:
1413         case RTE_CRYPTO_AUTH_SHA224:
1414         case RTE_CRYPTO_AUTH_SHA384:
1415         case RTE_CRYPTO_AUTH_MD5:
1416         case RTE_CRYPTO_AUTH_AES_GMAC:
1417         case RTE_CRYPTO_AUTH_KASUMI_F9:
1418         case RTE_CRYPTO_AUTH_AES_CMAC:
1419         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1420         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1421                 RTE_LOG(ERR, PMD, "Crypto: Unsupported auth alg %u\n",
1422                         auth_xform->algo);
1423                 goto error_out;
1424         default:
1425                 RTE_LOG(ERR, PMD, "Crypto: Undefined Auth specified %u\n",
1426                         auth_xform->algo);
1427                 goto error_out;
1428         }
1429         cipherdata.key = (uint64_t)session->cipher_key.data;
1430         cipherdata.keylen = session->cipher_key.length;
1431         cipherdata.key_enc_flags = 0;
1432         cipherdata.key_type = RTA_DATA_IMM;
1433
1434         switch (cipher_xform->algo) {
1435         case RTE_CRYPTO_CIPHER_AES_CBC:
1436                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1437                 cipherdata.algmode = OP_ALG_AAI_CBC;
1438                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1439                 break;
1440         case RTE_CRYPTO_CIPHER_3DES_CBC:
1441                 cipherdata.algtype = OP_ALG_ALGSEL_3DES;
1442                 cipherdata.algmode = OP_ALG_AAI_CBC;
1443                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1444                 break;
1445         case RTE_CRYPTO_CIPHER_AES_CTR:
1446                 cipherdata.algtype = OP_ALG_ALGSEL_AES;
1447                 cipherdata.algmode = OP_ALG_AAI_CTR;
1448                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1449                 break;
1450         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1451         case RTE_CRYPTO_CIPHER_NULL:
1452         case RTE_CRYPTO_CIPHER_3DES_ECB:
1453         case RTE_CRYPTO_CIPHER_AES_ECB:
1454         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1455                 RTE_LOG(ERR, PMD, "Crypto: Unsupported Cipher alg %u\n",
1456                         cipher_xform->algo);
1457                 goto error_out;
1458         default:
1459                 RTE_LOG(ERR, PMD, "Crypto: Undefined Cipher specified %u\n",
1460                         cipher_xform->algo);
1461                 goto error_out;
1462         }
1463         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1464                                 DIR_ENC : DIR_DEC;
1465
1466         priv->flc_desc[0].desc[0] = cipherdata.keylen;
1467         priv->flc_desc[0].desc[1] = authdata.keylen;
1468         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
1469                                MIN_JOB_DESC_SIZE,
1470                                (unsigned int *)priv->flc_desc[0].desc,
1471                                &priv->flc_desc[0].desc[2], 2);
1472
1473         if (err < 0) {
1474                 PMD_DRV_LOG(ERR, "Crypto: Incorrect key lengths\n");
1475                 goto error_out;
1476         }
1477         if (priv->flc_desc[0].desc[2] & 1) {
1478                 cipherdata.key_type = RTA_DATA_IMM;
1479         } else {
1480                 cipherdata.key = DPAA2_VADDR_TO_IOVA(cipherdata.key);
1481                 cipherdata.key_type = RTA_DATA_PTR;
1482         }
1483         if (priv->flc_desc[0].desc[2] & (1 << 1)) {
1484                 authdata.key_type = RTA_DATA_IMM;
1485         } else {
1486                 authdata.key = DPAA2_VADDR_TO_IOVA(authdata.key);
1487                 authdata.key_type = RTA_DATA_PTR;
1488         }
1489         priv->flc_desc[0].desc[0] = 0;
1490         priv->flc_desc[0].desc[1] = 0;
1491         priv->flc_desc[0].desc[2] = 0;
1492
1493         if (session->ctxt_type == DPAA2_SEC_CIPHER_HASH) {
1494                 bufsize = cnstr_shdsc_authenc(priv->flc_desc[0].desc, 1,
1495                                               0, &cipherdata, &authdata,
1496                                               session->iv.length,
1497                                               ctxt->auth_only_len,
1498                                               session->digest_length,
1499                                               session->dir);
1500         } else {
1501                 RTE_LOG(ERR, PMD, "Hash before cipher not supported\n");
1502                 goto error_out;
1503         }
1504
1505         flc->word1_sdl = (uint8_t)bufsize;
1506         flc->word2_rflc_31_0 = lower_32_bits(
1507                         (uint64_t)&(((struct dpaa2_sec_qp *)
1508                         dev->data->queue_pairs[0])->rx_vq));
1509         flc->word3_rflc_63_32 = upper_32_bits(
1510                         (uint64_t)&(((struct dpaa2_sec_qp *)
1511                         dev->data->queue_pairs[0])->rx_vq));
1512         session->ctxt = priv;
1513         for (i = 0; i < bufsize; i++)
1514                 PMD_DRV_LOG(DEBUG, "DESC[%d]:0x%x\n",
1515                             i, priv->flc_desc[0].desc[i]);
1516
1517         return 0;
1518
1519 error_out:
1520         rte_free(session->cipher_key.data);
1521         rte_free(session->auth_key.data);
1522         rte_free(priv);
1523         return -1;
1524 }
1525
1526 static int
1527 dpaa2_sec_set_session_parameters(struct rte_cryptodev *dev,
1528                             struct rte_crypto_sym_xform *xform, void *sess)
1529 {
1530         dpaa2_sec_session *session = sess;
1531
1532         PMD_INIT_FUNC_TRACE();
1533
1534         if (unlikely(sess == NULL)) {
1535                 RTE_LOG(ERR, PMD, "invalid session struct\n");
1536                 return -1;
1537         }
1538
1539         /* Default IV length = 0 */
1540         session->iv.length = 0;
1541
1542         /* Cipher Only */
1543         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1544                 session->ctxt_type = DPAA2_SEC_CIPHER;
1545                 dpaa2_sec_cipher_init(dev, xform, session);
1546
1547         /* Authentication Only */
1548         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1549                    xform->next == NULL) {
1550                 session->ctxt_type = DPAA2_SEC_AUTH;
1551                 dpaa2_sec_auth_init(dev, xform, session);
1552
1553         /* Cipher then Authenticate */
1554         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1555                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1556                 session->ext_params.aead_ctxt.auth_cipher_text = true;
1557                 dpaa2_sec_aead_chain_init(dev, xform, session);
1558
1559         /* Authenticate then Cipher */
1560         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1561                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1562                 session->ext_params.aead_ctxt.auth_cipher_text = false;
1563                 dpaa2_sec_aead_chain_init(dev, xform, session);
1564
1565         /* AEAD operation for AES-GCM kind of Algorithms */
1566         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
1567                    xform->next == NULL) {
1568                 dpaa2_sec_aead_init(dev, xform, session);
1569
1570         } else {
1571                 RTE_LOG(ERR, PMD, "Invalid crypto type\n");
1572                 return -EINVAL;
1573         }
1574
1575         return 0;
1576 }
1577
1578 static int
1579 dpaa2_sec_session_configure(struct rte_cryptodev *dev,
1580                 struct rte_crypto_sym_xform *xform,
1581                 struct rte_cryptodev_sym_session *sess,
1582                 struct rte_mempool *mempool)
1583 {
1584         void *sess_private_data;
1585         int ret;
1586
1587         if (rte_mempool_get(mempool, &sess_private_data)) {
1588                 CDEV_LOG_ERR(
1589                         "Couldn't get object from session mempool");
1590                 return -ENOMEM;
1591         }
1592
1593         ret = dpaa2_sec_set_session_parameters(dev, xform, sess_private_data);
1594         if (ret != 0) {
1595                 PMD_DRV_LOG(ERR, "DPAA2 PMD: failed to configure "
1596                                 "session parameters");
1597
1598                 /* Return session to mempool */
1599                 rte_mempool_put(mempool, sess_private_data);
1600                 return ret;
1601         }
1602
1603         set_session_private_data(sess, dev->driver_id,
1604                 sess_private_data);
1605
1606         return 0;
1607 }
1608
1609 /** Clear the memory of session so it doesn't leave key material behind */
1610 static void
1611 dpaa2_sec_session_clear(struct rte_cryptodev *dev,
1612                 struct rte_cryptodev_sym_session *sess)
1613 {
1614         PMD_INIT_FUNC_TRACE();
1615         uint8_t index = dev->driver_id;
1616         void *sess_priv = get_session_private_data(sess, index);
1617         dpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;
1618
1619         if (sess_priv) {
1620                 rte_free(s->ctxt);
1621                 rte_free(s->cipher_key.data);
1622                 rte_free(s->auth_key.data);
1623                 memset(sess, 0, sizeof(dpaa2_sec_session));
1624                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
1625                 set_session_private_data(sess, index, NULL);
1626                 rte_mempool_put(sess_mp, sess_priv);
1627         }
1628 }
1629
1630 static int
1631 dpaa2_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
1632                         struct rte_cryptodev_config *config __rte_unused)
1633 {
1634         PMD_INIT_FUNC_TRACE();
1635
1636         return 0;
1637 }
1638
1639 static int
1640 dpaa2_sec_dev_start(struct rte_cryptodev *dev)
1641 {
1642         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1643         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1644         struct dpseci_attr attr;
1645         struct dpaa2_queue *dpaa2_q;
1646         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1647                                         dev->data->queue_pairs;
1648         struct dpseci_rx_queue_attr rx_attr;
1649         struct dpseci_tx_queue_attr tx_attr;
1650         int ret, i;
1651
1652         PMD_INIT_FUNC_TRACE();
1653
1654         memset(&attr, 0, sizeof(struct dpseci_attr));
1655
1656         ret = dpseci_enable(dpseci, CMD_PRI_LOW, priv->token);
1657         if (ret) {
1658                 PMD_INIT_LOG(ERR, "DPSECI with HW_ID = %d ENABLE FAILED\n",
1659                              priv->hw_id);
1660                 goto get_attr_failure;
1661         }
1662         ret = dpseci_get_attributes(dpseci, CMD_PRI_LOW, priv->token, &attr);
1663         if (ret) {
1664                 PMD_INIT_LOG(ERR,
1665                              "DPSEC ATTRIBUTE READ FAILED, disabling DPSEC\n");
1666                 goto get_attr_failure;
1667         }
1668         for (i = 0; i < attr.num_rx_queues && qp[i]; i++) {
1669                 dpaa2_q = &qp[i]->rx_vq;
1670                 dpseci_get_rx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1671                                     &rx_attr);
1672                 dpaa2_q->fqid = rx_attr.fqid;
1673                 PMD_INIT_LOG(DEBUG, "rx_fqid: %d", dpaa2_q->fqid);
1674         }
1675         for (i = 0; i < attr.num_tx_queues && qp[i]; i++) {
1676                 dpaa2_q = &qp[i]->tx_vq;
1677                 dpseci_get_tx_queue(dpseci, CMD_PRI_LOW, priv->token, i,
1678                                     &tx_attr);
1679                 dpaa2_q->fqid = tx_attr.fqid;
1680                 PMD_INIT_LOG(DEBUG, "tx_fqid: %d", dpaa2_q->fqid);
1681         }
1682
1683         return 0;
1684 get_attr_failure:
1685         dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1686         return -1;
1687 }
1688
1689 static void
1690 dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
1691 {
1692         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1693         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1694         int ret;
1695
1696         PMD_INIT_FUNC_TRACE();
1697
1698         ret = dpseci_disable(dpseci, CMD_PRI_LOW, priv->token);
1699         if (ret) {
1700                 PMD_INIT_LOG(ERR, "Failure in disabling dpseci %d device",
1701                              priv->hw_id);
1702                 return;
1703         }
1704
1705         ret = dpseci_reset(dpseci, CMD_PRI_LOW, priv->token);
1706         if (ret < 0) {
1707                 PMD_INIT_LOG(ERR, "SEC Device cannot be reset:Error = %0x\n",
1708                              ret);
1709                 return;
1710         }
1711 }
1712
1713 static int
1714 dpaa2_sec_dev_close(struct rte_cryptodev *dev)
1715 {
1716         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1717         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1718         int ret;
1719
1720         PMD_INIT_FUNC_TRACE();
1721
1722         /* Function is reverse of dpaa2_sec_dev_init.
1723          * It does the following:
1724          * 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
1725          * 2. Close the DPSECI device
1726          * 3. Free the allocated resources.
1727          */
1728
1729         /*Close the device at underlying layer*/
1730         ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
1731         if (ret) {
1732                 PMD_INIT_LOG(ERR, "Failure closing dpseci device with"
1733                              " error code %d\n", ret);
1734                 return -1;
1735         }
1736
1737         /*Free the allocated memory for ethernet private data and dpseci*/
1738         priv->hw = NULL;
1739         rte_free(dpseci);
1740
1741         return 0;
1742 }
1743
1744 static void
1745 dpaa2_sec_dev_infos_get(struct rte_cryptodev *dev,
1746                         struct rte_cryptodev_info *info)
1747 {
1748         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
1749
1750         PMD_INIT_FUNC_TRACE();
1751         if (info != NULL) {
1752                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
1753                 info->feature_flags = dev->feature_flags;
1754                 info->capabilities = dpaa2_sec_capabilities;
1755                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1756                 info->driver_id = cryptodev_driver_id;
1757         }
1758 }
1759
1760 static
1761 void dpaa2_sec_stats_get(struct rte_cryptodev *dev,
1762                          struct rte_cryptodev_stats *stats)
1763 {
1764         struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
1765         struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
1766         struct dpseci_sec_counters counters = {0};
1767         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1768                                         dev->data->queue_pairs;
1769         int ret, i;
1770
1771         PMD_INIT_FUNC_TRACE();
1772         if (stats == NULL) {
1773                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1774                 return;
1775         }
1776         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1777                 if (qp[i] == NULL) {
1778                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1779                         continue;
1780                 }
1781
1782                 stats->enqueued_count += qp[i]->tx_vq.tx_pkts;
1783                 stats->dequeued_count += qp[i]->rx_vq.rx_pkts;
1784                 stats->enqueue_err_count += qp[i]->tx_vq.err_pkts;
1785                 stats->dequeue_err_count += qp[i]->rx_vq.err_pkts;
1786         }
1787
1788         ret = dpseci_get_sec_counters(dpseci, CMD_PRI_LOW, priv->token,
1789                                       &counters);
1790         if (ret) {
1791                 PMD_DRV_LOG(ERR, "dpseci_get_sec_counters failed\n");
1792         } else {
1793                 PMD_DRV_LOG(INFO, "dpseci hw stats:"
1794                             "\n\tNumber of Requests Dequeued = %lu"
1795                             "\n\tNumber of Outbound Encrypt Requests = %lu"
1796                             "\n\tNumber of Inbound Decrypt Requests = %lu"
1797                             "\n\tNumber of Outbound Bytes Encrypted = %lu"
1798                             "\n\tNumber of Outbound Bytes Protected = %lu"
1799                             "\n\tNumber of Inbound Bytes Decrypted = %lu"
1800                             "\n\tNumber of Inbound Bytes Validated = %lu",
1801                             counters.dequeued_requests,
1802                             counters.ob_enc_requests,
1803                             counters.ib_dec_requests,
1804                             counters.ob_enc_bytes,
1805                             counters.ob_prot_bytes,
1806                             counters.ib_dec_bytes,
1807                             counters.ib_valid_bytes);
1808         }
1809 }
1810
1811 static
1812 void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
1813 {
1814         int i;
1815         struct dpaa2_sec_qp **qp = (struct dpaa2_sec_qp **)
1816                                    (dev->data->queue_pairs);
1817
1818         PMD_INIT_FUNC_TRACE();
1819
1820         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1821                 if (qp[i] == NULL) {
1822                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1823                         continue;
1824                 }
1825                 qp[i]->tx_vq.rx_pkts = 0;
1826                 qp[i]->tx_vq.tx_pkts = 0;
1827                 qp[i]->tx_vq.err_pkts = 0;
1828                 qp[i]->rx_vq.rx_pkts = 0;
1829                 qp[i]->rx_vq.tx_pkts = 0;
1830                 qp[i]->rx_vq.err_pkts = 0;
1831         }
1832 }
1833
1834 static struct rte_cryptodev_ops crypto_ops = {
1835         .dev_configure        = dpaa2_sec_dev_configure,
1836         .dev_start            = dpaa2_sec_dev_start,
1837         .dev_stop             = dpaa2_sec_dev_stop,
1838         .dev_close            = dpaa2_sec_dev_close,
1839         .dev_infos_get        = dpaa2_sec_dev_infos_get,
1840         .stats_get            = dpaa2_sec_stats_get,
1841         .stats_reset          = dpaa2_sec_stats_reset,
1842         .queue_pair_setup     = dpaa2_sec_queue_pair_setup,
1843         .queue_pair_release   = dpaa2_sec_queue_pair_release,
1844         .queue_pair_start     = dpaa2_sec_queue_pair_start,
1845         .queue_pair_stop      = dpaa2_sec_queue_pair_stop,
1846         .queue_pair_count     = dpaa2_sec_queue_pair_count,
1847         .session_get_size     = dpaa2_sec_session_get_size,
1848         .session_configure    = dpaa2_sec_session_configure,
1849         .session_clear        = dpaa2_sec_session_clear,
1850 };
1851
1852 static int
1853 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
1854 {
1855         struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
1856
1857         rte_mempool_free(internals->fle_pool);
1858
1859         PMD_INIT_LOG(INFO, "Closing DPAA2_SEC device %s on numa socket %u\n",
1860                      dev->data->name, rte_socket_id());
1861
1862         return 0;
1863 }
1864
1865 static int
1866 dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)
1867 {
1868         struct dpaa2_sec_dev_private *internals;
1869         struct rte_device *dev = cryptodev->device;
1870         struct rte_dpaa2_device *dpaa2_dev;
1871         struct fsl_mc_io *dpseci;
1872         uint16_t token;
1873         struct dpseci_attr attr;
1874         int retcode, hw_id;
1875         char str[20];
1876
1877         PMD_INIT_FUNC_TRACE();
1878         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1879         if (dpaa2_dev == NULL) {
1880                 PMD_INIT_LOG(ERR, "dpaa2_device not found\n");
1881                 return -1;
1882         }
1883         hw_id = dpaa2_dev->object_id;
1884
1885         cryptodev->driver_id = cryptodev_driver_id;
1886         cryptodev->dev_ops = &crypto_ops;
1887
1888         cryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;
1889         cryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;
1890         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
1891                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
1892                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
1893
1894         internals = cryptodev->data->dev_private;
1895         internals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;
1896
1897         /*
1898          * For secondary processes, we don't initialise any further as primary
1899          * has already done this work. Only check we don't need a different
1900          * RX function
1901          */
1902         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1903                 PMD_INIT_LOG(DEBUG, "Device already init by primary process");
1904                 return 0;
1905         }
1906         /*Open the rte device via MC and save the handle for further use*/
1907         dpseci = (struct fsl_mc_io *)rte_calloc(NULL, 1,
1908                                 sizeof(struct fsl_mc_io), 0);
1909         if (!dpseci) {
1910                 PMD_INIT_LOG(ERR,
1911                              "Error in allocating the memory for dpsec object");
1912                 return -1;
1913         }
1914         dpseci->regs = rte_mcp_ptr_list[0];
1915
1916         retcode = dpseci_open(dpseci, CMD_PRI_LOW, hw_id, &token);
1917         if (retcode != 0) {
1918                 PMD_INIT_LOG(ERR, "Cannot open the dpsec device: Error = %x",
1919                              retcode);
1920                 goto init_error;
1921         }
1922         retcode = dpseci_get_attributes(dpseci, CMD_PRI_LOW, token, &attr);
1923         if (retcode != 0) {
1924                 PMD_INIT_LOG(ERR,
1925                              "Cannot get dpsec device attributed: Error = %x",
1926                              retcode);
1927                 goto init_error;
1928         }
1929         sprintf(cryptodev->data->name, "dpsec-%u", hw_id);
1930
1931         internals->max_nb_queue_pairs = attr.num_tx_queues;
1932         cryptodev->data->nb_queue_pairs = internals->max_nb_queue_pairs;
1933         internals->hw = dpseci;
1934         internals->token = token;
1935
1936         sprintf(str, "fle_pool_%d", cryptodev->data->dev_id);
1937         internals->fle_pool = rte_mempool_create((const char *)str,
1938                         FLE_POOL_NUM_BUFS,
1939                         FLE_POOL_BUF_SIZE,
1940                         FLE_POOL_CACHE_SIZE, 0,
1941                         NULL, NULL, NULL, NULL,
1942                         SOCKET_ID_ANY, 0);
1943         if (!internals->fle_pool) {
1944                 RTE_LOG(ERR, PMD, "%s create failed\n", str);
1945                 goto init_error;
1946         }
1947
1948         PMD_INIT_LOG(DEBUG, "driver %s: created\n", cryptodev->data->name);
1949         return 0;
1950
1951 init_error:
1952         PMD_INIT_LOG(ERR, "driver %s: create failed\n", cryptodev->data->name);
1953
1954         /* dpaa2_sec_uninit(crypto_dev_name); */
1955         return -EFAULT;
1956 }
1957
1958 static int
1959 cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver *dpaa2_drv,
1960                           struct rte_dpaa2_device *dpaa2_dev)
1961 {
1962         struct rte_cryptodev *cryptodev;
1963         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
1964
1965         int retval;
1966
1967         sprintf(cryptodev_name, "dpsec-%d", dpaa2_dev->object_id);
1968
1969         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
1970         if (cryptodev == NULL)
1971                 return -ENOMEM;
1972
1973         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1974                 cryptodev->data->dev_private = rte_zmalloc_socket(
1975                                         "cryptodev private structure",
1976                                         sizeof(struct dpaa2_sec_dev_private),
1977                                         RTE_CACHE_LINE_SIZE,
1978                                         rte_socket_id());
1979
1980                 if (cryptodev->data->dev_private == NULL)
1981                         rte_panic("Cannot allocate memzone for private "
1982                                         "device data");
1983         }
1984
1985         dpaa2_dev->cryptodev = cryptodev;
1986         cryptodev->device = &dpaa2_dev->device;
1987         cryptodev->device->driver = &dpaa2_drv->driver;
1988
1989         /* init user callbacks */
1990         TAILQ_INIT(&(cryptodev->link_intr_cbs));
1991
1992         /* Invoke PMD device initialization function */
1993         retval = dpaa2_sec_dev_init(cryptodev);
1994         if (retval == 0)
1995                 return 0;
1996
1997         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1998                 rte_free(cryptodev->data->dev_private);
1999
2000         cryptodev->attached = RTE_CRYPTODEV_DETACHED;
2001
2002         return -ENXIO;
2003 }
2004
2005 static int
2006 cryptodev_dpaa2_sec_remove(struct rte_dpaa2_device *dpaa2_dev)
2007 {
2008         struct rte_cryptodev *cryptodev;
2009         int ret;
2010
2011         cryptodev = dpaa2_dev->cryptodev;
2012         if (cryptodev == NULL)
2013                 return -ENODEV;
2014
2015         ret = dpaa2_sec_uninit(cryptodev);
2016         if (ret)
2017                 return ret;
2018
2019         return rte_cryptodev_pmd_destroy(cryptodev);
2020 }
2021
2022 static struct rte_dpaa2_driver rte_dpaa2_sec_driver = {
2023         .drv_type = DPAA2_CRYPTO,
2024         .driver = {
2025                 .name = "DPAA2 SEC PMD"
2026         },
2027         .probe = cryptodev_dpaa2_sec_probe,
2028         .remove = cryptodev_dpaa2_sec_remove,
2029 };
2030
2031 static struct cryptodev_driver dpaa2_sec_crypto_drv;
2032
2033 RTE_PMD_REGISTER_DPAA2(CRYPTODEV_NAME_DPAA2_SEC_PMD, rte_dpaa2_sec_driver);
2034 RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa2_sec_crypto_drv, rte_dpaa2_sec_driver,
2035                 cryptodev_driver_id);