drivers/crypto/dpaa_sec/dpaa_sec.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017-2019 NXP
   5  *
   6  */
   7
   8 #include <fcntl.h>
   9 #include <unistd.h>
  10 #include <sched.h>
  11 #include <net/if.h>
  12
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cryptodev_pmd.h>
  16 #include <rte_crypto.h>
  17 #include <rte_cryptodev.h>
  18 #ifdef RTE_LIBRTE_SECURITY
  19 #include <rte_security_driver.h>
  20 #endif
  21 #include <rte_cycles.h>
  22 #include <rte_dev.h>
  23 #include <rte_kvargs.h>
  24 #include <rte_malloc.h>
  25 #include <rte_mbuf.h>
  26 #include <rte_memcpy.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_spinlock.h>
  29
  30 #include <fsl_usd.h>
  31 #include <fsl_qman.h>
  32 #include <dpaa_of.h>
  33
  34 /* RTA header files */
  35 #include <desc/common.h>
  36 #include <desc/algo.h>
  37 #include <desc/ipsec.h>
  38 #include <desc/pdcp.h>
  39
  40 #include <rte_dpaa_bus.h>
  41 #include <dpaa_sec.h>
  42 #include <dpaa_sec_event.h>
  43 #include <dpaa_sec_log.h>
  44 #include <dpaax_iova_table.h>
  45
  46 enum rta_sec_era rta_sec_era;
  47
  48 int dpaa_logtype_sec;
  49
  50 static uint8_t cryptodev_driver_id;
  51
  52 static __thread struct rte_crypto_op **dpaa_sec_ops;
  53 static __thread int dpaa_sec_op_nb;
  54
  55 static int
  56 dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess);
  57
  58 static inline void
  59 dpaa_sec_op_ending(struct dpaa_sec_op_ctx *ctx)
  60 {
  61         if (!ctx->fd_status) {
  62                 ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
  63         } else {
  64                 DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
  65                 ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
  66         }
  67 }
  68
  69 static inline struct dpaa_sec_op_ctx *
  70 dpaa_sec_alloc_ctx(dpaa_sec_session *ses, int sg_count)
  71 {
  72         struct dpaa_sec_op_ctx *ctx;
  73         int i, retval;
  74
  75         retval = rte_mempool_get(
  76                         ses->qp[rte_lcore_id() % MAX_DPAA_CORES]->ctx_pool,
  77                         (void **)(&ctx));
  78         if (!ctx || retval) {
  79                 DPAA_SEC_DP_WARN("Alloc sec descriptor failed!");
  80                 return NULL;
  81         }
  82         /*
  83          * Clear SG memory. There are 16 SG entries of 16 Bytes each.
  84          * one call to dcbz_64() clear 64 bytes, hence calling it 4 times
  85          * to clear all the SG entries. dpaa_sec_alloc_ctx() is called for
  86          * each packet, memset is costlier than dcbz_64().
  87          */
  88         for (i = 0; i < sg_count && i < MAX_JOB_SG_ENTRIES; i += 4)
  89                 dcbz_64(&ctx->job.sg[i]);
  90
  91         ctx->ctx_pool = ses->qp[rte_lcore_id() % MAX_DPAA_CORES]->ctx_pool;
  92         ctx->vtop_offset = (size_t) ctx - rte_mempool_virt2iova(ctx);
  93
  94         return ctx;
  95 }
  96
  97 static inline rte_iova_t
  98 dpaa_mem_vtop(void *vaddr)
  99 {
 100         const struct rte_memseg *ms;
 101
 102         ms = rte_mem_virt2memseg(vaddr, NULL);
 103         if (ms) {
 104                 dpaax_iova_table_update(ms->iova, ms->addr, ms->len);
 105                 return ms->iova + RTE_PTR_DIFF(vaddr, ms->addr);
 106         }
 107         return (size_t)NULL;
 108 }
 109
 110 static inline void *
 111 dpaa_mem_ptov(rte_iova_t paddr)
 112 {
 113         void *va;
 114
 115         va = (void *)dpaax_iova_table_get_va(paddr);
 116         if (likely(va))
 117                 return va;
 118
 119         return rte_mem_iova2virt(paddr);
 120 }
 121
 122 static void
 123 ern_sec_fq_handler(struct qman_portal *qm __rte_unused,
 124                    struct qman_fq *fq,
 125                    const struct qm_mr_entry *msg)
 126 {
 127         DPAA_SEC_DP_ERR("sec fq %d error, RC = %x, seqnum = %x\n",
 128                         fq->fqid, msg->ern.rc, msg->ern.seqnum);
 129 }
 130
 131 /* initialize the queue with dest chan as caam chan so that
 132  * all the packets in this queue could be dispatched into caam
 133  */
 134 static int
 135 dpaa_sec_init_rx(struct qman_fq *fq_in, rte_iova_t hwdesc,
 136                  uint32_t fqid_out)
 137 {
 138         struct qm_mcc_initfq fq_opts;
 139         uint32_t flags;
 140         int ret = -1;
 141
 142         /* Clear FQ options */
 143         memset(&fq_opts, 0x00, sizeof(struct qm_mcc_initfq));
 144
 145         flags = QMAN_INITFQ_FLAG_SCHED;
 146         fq_opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_CONTEXTA |
 147                           QM_INITFQ_WE_CONTEXTB;
 148
 149         qm_fqd_context_a_set64(&fq_opts.fqd, hwdesc);
 150         fq_opts.fqd.context_b = fqid_out;
 151         fq_opts.fqd.dest.channel = qm_channel_caam;
 152         fq_opts.fqd.dest.wq = 0;
 153
 154         fq_in->cb.ern  = ern_sec_fq_handler;
 155
 156         DPAA_SEC_DEBUG("in-%x out-%x", fq_in->fqid, fqid_out);
 157
 158         ret = qman_init_fq(fq_in, flags, &fq_opts);
 159         if (unlikely(ret != 0))
 160                 DPAA_SEC_ERR("qman_init_fq failed %d", ret);
 161
 162         return ret;
 163 }
 164
 165 /* something is put into in_fq and caam put the crypto result into out_fq */
 166 static enum qman_cb_dqrr_result
 167 dqrr_out_fq_cb_rx(struct qman_portal *qm __always_unused,
 168                   struct qman_fq *fq __always_unused,
 169                   const struct qm_dqrr_entry *dqrr)
 170 {
 171         const struct qm_fd *fd;
 172         struct dpaa_sec_job *job;
 173         struct dpaa_sec_op_ctx *ctx;
 174
 175         if (dpaa_sec_op_nb >= DPAA_SEC_BURST)
 176                 return qman_cb_dqrr_defer;
 177
 178         if (!(dqrr->stat & QM_DQRR_STAT_FD_VALID))
 179                 return qman_cb_dqrr_consume;
 180
 181         fd = &dqrr->fd;
 182         /* sg is embedded in an op ctx,
 183          * sg[0] is for output
 184          * sg[1] for input
 185          */
 186         job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
 187
 188         ctx = container_of(job, struct dpaa_sec_op_ctx, job);
 189         ctx->fd_status = fd->status;
 190         if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 191                 struct qm_sg_entry *sg_out;
 192                 uint32_t len;
 193                 struct rte_mbuf *mbuf = (ctx->op->sym->m_dst == NULL) ?
 194                                 ctx->op->sym->m_src : ctx->op->sym->m_dst;
 195
 196                 sg_out = &job->sg[0];
 197                 hw_sg_to_cpu(sg_out);
 198                 len = sg_out->length;
 199                 mbuf->pkt_len = len;
 200                 while (mbuf->next != NULL) {
 201                         len -= mbuf->data_len;
 202                         mbuf = mbuf->next;
 203                 }
 204                 mbuf->data_len = len;
 205         }
 206         dpaa_sec_ops[dpaa_sec_op_nb++] = ctx->op;
 207         dpaa_sec_op_ending(ctx);
 208
 209         return qman_cb_dqrr_consume;
 210 }
 211
 212 /* caam result is put into this queue */
 213 static int
 214 dpaa_sec_init_tx(struct qman_fq *fq)
 215 {
 216         int ret;
 217         struct qm_mcc_initfq opts;
 218         uint32_t flags;
 219
 220         flags = QMAN_FQ_FLAG_NO_ENQUEUE | QMAN_FQ_FLAG_LOCKED |
 221                 QMAN_FQ_FLAG_DYNAMIC_FQID;
 222
 223         ret = qman_create_fq(0, flags, fq);
 224         if (unlikely(ret)) {
 225                 DPAA_SEC_ERR("qman_create_fq failed");
 226                 return ret;
 227         }
 228
 229         memset(&opts, 0, sizeof(opts));
 230         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
 231                        QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
 232
 233         /* opts.fqd.dest.channel = dpaa_sec_pool_chan; */
 234
 235         fq->cb.dqrr = dqrr_out_fq_cb_rx;
 236         fq->cb.ern  = ern_sec_fq_handler;
 237
 238         ret = qman_init_fq(fq, 0, &opts);
 239         if (unlikely(ret)) {
 240                 DPAA_SEC_ERR("unable to init caam source fq!");
 241                 return ret;
 242         }
 243
 244         return ret;
 245 }
 246
 247 static inline int is_encode(dpaa_sec_session *ses)
 248 {
 249         return ses->dir == DIR_ENC;
 250 }
 251
 252 static inline int is_decode(dpaa_sec_session *ses)
 253 {
 254         return ses->dir == DIR_DEC;
 255 }
 256
 257 #ifdef RTE_LIBRTE_SECURITY
 258 static int
 259 dpaa_sec_prep_pdcp_cdb(dpaa_sec_session *ses)
 260 {
 261         struct alginfo authdata = {0}, cipherdata = {0};
 262         struct sec_cdb *cdb = &ses->cdb;
 263         struct alginfo *p_authdata = NULL;
 264         int32_t shared_desc_len = 0;
 265         int err;
 266 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
 267         int swap = false;
 268 #else
 269         int swap = true;
 270 #endif
 271
 272         cipherdata.key = (size_t)ses->cipher_key.data;
 273         cipherdata.keylen = ses->cipher_key.length;
 274         cipherdata.key_enc_flags = 0;
 275         cipherdata.key_type = RTA_DATA_IMM;
 276         cipherdata.algtype = ses->cipher_key.alg;
 277         cipherdata.algmode = ses->cipher_key.algmode;
 278
 279         cdb->sh_desc[0] = cipherdata.keylen;
 280         cdb->sh_desc[1] = 0;
 281         cdb->sh_desc[2] = 0;
 282
 283         if (ses->auth_alg) {
 284                 authdata.key = (size_t)ses->auth_key.data;
 285                 authdata.keylen = ses->auth_key.length;
 286                 authdata.key_enc_flags = 0;
 287                 authdata.key_type = RTA_DATA_IMM;
 288                 authdata.algtype = ses->auth_key.alg;
 289                 authdata.algmode = ses->auth_key.algmode;
 290
 291                 p_authdata = &authdata;
 292
 293                 cdb->sh_desc[1] = authdata.keylen;
 294         }
 295
 296         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
 297                                MIN_JOB_DESC_SIZE,
 298                                (unsigned int *)cdb->sh_desc,
 299                                &cdb->sh_desc[2], 2);
 300         if (err < 0) {
 301                 DPAA_SEC_ERR("Crypto: Incorrect key lengths");
 302                 return err;
 303         }
 304
 305         if (!(cdb->sh_desc[2] & 1) && cipherdata.keylen) {
 306                 cipherdata.key =
 307                         (size_t)dpaa_mem_vtop((void *)(size_t)cipherdata.key);
 308                 cipherdata.key_type = RTA_DATA_PTR;
 309         }
 310         if (!(cdb->sh_desc[2] & (1 << 1)) &&  authdata.keylen) {
 311                 authdata.key =
 312                         (size_t)dpaa_mem_vtop((void *)(size_t)authdata.key);
 313                 authdata.key_type = RTA_DATA_PTR;
 314         }
 315
 316         cdb->sh_desc[0] = 0;
 317         cdb->sh_desc[1] = 0;
 318         cdb->sh_desc[2] = 0;
 319
 320         if (ses->pdcp.domain == RTE_SECURITY_PDCP_MODE_CONTROL) {
 321                 if (ses->dir == DIR_ENC)
 322                         shared_desc_len = cnstr_shdsc_pdcp_c_plane_encap(
 323                                         cdb->sh_desc, 1, swap,
 324                                         ses->pdcp.hfn,
 325                                         ses->pdcp.sn_size,
 326                                         ses->pdcp.bearer,
 327                                         ses->pdcp.pkt_dir,
 328                                         ses->pdcp.hfn_threshold,
 329                                         &cipherdata, &authdata,
 330                                         0);
 331                 else if (ses->dir == DIR_DEC)
 332                         shared_desc_len = cnstr_shdsc_pdcp_c_plane_decap(
 333                                         cdb->sh_desc, 1, swap,
 334                                         ses->pdcp.hfn,
 335                                         ses->pdcp.sn_size,
 336                                         ses->pdcp.bearer,
 337                                         ses->pdcp.pkt_dir,
 338                                         ses->pdcp.hfn_threshold,
 339                                         &cipherdata, &authdata,
 340                                         0);
 341         } else {
 342                 if (ses->dir == DIR_ENC)
 343                         shared_desc_len = cnstr_shdsc_pdcp_u_plane_encap(
 344                                         cdb->sh_desc, 1, swap,
 345                                         ses->pdcp.sn_size,
 346                                         ses->pdcp.hfn,
 347                                         ses->pdcp.bearer,
 348                                         ses->pdcp.pkt_dir,
 349                                         ses->pdcp.hfn_threshold,
 350                                         &cipherdata, p_authdata, 0);
 351                 else if (ses->dir == DIR_DEC)
 352                         shared_desc_len = cnstr_shdsc_pdcp_u_plane_decap(
 353                                         cdb->sh_desc, 1, swap,
 354                                         ses->pdcp.sn_size,
 355                                         ses->pdcp.hfn,
 356                                         ses->pdcp.bearer,
 357                                         ses->pdcp.pkt_dir,
 358                                         ses->pdcp.hfn_threshold,
 359                                         &cipherdata, p_authdata, 0);
 360         }
 361         return shared_desc_len;
 362 }
 363
 364 /* prepare ipsec proto command block of the session */
 365 static int
 366 dpaa_sec_prep_ipsec_cdb(dpaa_sec_session *ses)
 367 {
 368         struct alginfo cipherdata = {0}, authdata = {0};
 369         struct sec_cdb *cdb = &ses->cdb;
 370         int32_t shared_desc_len = 0;
 371         int err;
 372 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
 373         int swap = false;
 374 #else
 375         int swap = true;
 376 #endif
 377
 378         cipherdata.key = (size_t)ses->cipher_key.data;
 379         cipherdata.keylen = ses->cipher_key.length;
 380         cipherdata.key_enc_flags = 0;
 381         cipherdata.key_type = RTA_DATA_IMM;
 382         cipherdata.algtype = ses->cipher_key.alg;
 383         cipherdata.algmode = ses->cipher_key.algmode;
 384
 385         authdata.key = (size_t)ses->auth_key.data;
 386         authdata.keylen = ses->auth_key.length;
 387         authdata.key_enc_flags = 0;
 388         authdata.key_type = RTA_DATA_IMM;
 389         authdata.algtype = ses->auth_key.alg;
 390         authdata.algmode = ses->auth_key.algmode;
 391
 392         cdb->sh_desc[0] = cipherdata.keylen;
 393         cdb->sh_desc[1] = authdata.keylen;
 394         err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
 395                                MIN_JOB_DESC_SIZE,
 396                                (unsigned int *)cdb->sh_desc,
 397                                &cdb->sh_desc[2], 2);
 398
 399         if (err < 0) {
 400                 DPAA_SEC_ERR("Crypto: Incorrect key lengths");
 401                 return err;
 402         }
 403         if (cdb->sh_desc[2] & 1)
 404                 cipherdata.key_type = RTA_DATA_IMM;
 405         else {
 406                 cipherdata.key = (size_t)dpaa_mem_vtop(
 407                                         (void *)(size_t)cipherdata.key);
 408                 cipherdata.key_type = RTA_DATA_PTR;
 409         }
 410         if (cdb->sh_desc[2] & (1<<1))
 411                 authdata.key_type = RTA_DATA_IMM;
 412         else {
 413                 authdata.key = (size_t)dpaa_mem_vtop(
 414                                         (void *)(size_t)authdata.key);
 415                 authdata.key_type = RTA_DATA_PTR;
 416         }
 417
 418         cdb->sh_desc[0] = 0;
 419         cdb->sh_desc[1] = 0;
 420         cdb->sh_desc[2] = 0;
 421         if (ses->dir == DIR_ENC) {
 422                 shared_desc_len = cnstr_shdsc_ipsec_new_encap(
 423                                 cdb->sh_desc,
 424                                 true, swap, SHR_SERIAL,
 425                                 &ses->encap_pdb,
 426                                 (uint8_t *)&ses->ip4_hdr,
 427                                 &cipherdata, &authdata);
 428         } else if (ses->dir == DIR_DEC) {
 429                 shared_desc_len = cnstr_shdsc_ipsec_new_decap(
 430                                 cdb->sh_desc,
 431                                 true, swap, SHR_SERIAL,
 432                                 &ses->decap_pdb,
 433                                 &cipherdata, &authdata);
 434         }
 435         return shared_desc_len;
 436 }
 437 #endif
 438 /* prepare command block of the session */
 439 static int
 440 dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 441 {
 442         struct alginfo alginfo_c = {0}, alginfo_a = {0}, alginfo = {0};
 443         int32_t shared_desc_len = 0;
 444         struct sec_cdb *cdb = &ses->cdb;
 445         int err;
 446 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
 447         int swap = false;
 448 #else
 449         int swap = true;
 450 #endif
 451
 452         memset(cdb, 0, sizeof(struct sec_cdb));
 453
 454         switch (ses->ctxt) {
 455 #ifdef RTE_LIBRTE_SECURITY
 456         case DPAA_SEC_IPSEC:
 457                 shared_desc_len = dpaa_sec_prep_ipsec_cdb(ses);
 458                 break;
 459         case DPAA_SEC_PDCP:
 460                 shared_desc_len = dpaa_sec_prep_pdcp_cdb(ses);
 461                 break;
 462 #endif
 463         case DPAA_SEC_CIPHER:
 464                 alginfo_c.key = (size_t)ses->cipher_key.data;
 465                 alginfo_c.keylen = ses->cipher_key.length;
 466                 alginfo_c.key_enc_flags = 0;
 467                 alginfo_c.key_type = RTA_DATA_IMM;
 468                 alginfo_c.algtype = ses->cipher_key.alg;
 469                 alginfo_c.algmode = ses->cipher_key.algmode;
 470
 471                 switch (ses->cipher_alg) {
 472                 case RTE_CRYPTO_CIPHER_AES_CBC:
 473                 case RTE_CRYPTO_CIPHER_3DES_CBC:
 474                 case RTE_CRYPTO_CIPHER_AES_CTR:
 475                 case RTE_CRYPTO_CIPHER_3DES_CTR:
 476                         shared_desc_len = cnstr_shdsc_blkcipher(
 477                                         cdb->sh_desc, true,
 478                                         swap, SHR_NEVER, &alginfo_c,
 479                                         NULL,
 480                                         ses->iv.length,
 481                                         ses->dir);
 482                         break;
 483                 case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 484                         shared_desc_len = cnstr_shdsc_snow_f8(
 485                                         cdb->sh_desc, true, swap,
 486                                         &alginfo_c,
 487                                         ses->dir);
 488                         break;
 489                 case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 490                         shared_desc_len = cnstr_shdsc_zuce(
 491                                         cdb->sh_desc, true, swap,
 492                                         &alginfo_c,
 493                                         ses->dir);
 494                         break;
 495                 default:
 496                         DPAA_SEC_ERR("unsupported cipher alg %d",
 497                                      ses->cipher_alg);
 498                         return -ENOTSUP;
 499                 }
 500                 break;
 501         case DPAA_SEC_AUTH:
 502                 alginfo_a.key = (size_t)ses->auth_key.data;
 503                 alginfo_a.keylen = ses->auth_key.length;
 504                 alginfo_a.key_enc_flags = 0;
 505                 alginfo_a.key_type = RTA_DATA_IMM;
 506                 alginfo_a.algtype = ses->auth_key.alg;
 507                 alginfo_a.algmode = ses->auth_key.algmode;
 508                 switch (ses->auth_alg) {
 509                 case RTE_CRYPTO_AUTH_MD5_HMAC:
 510                 case RTE_CRYPTO_AUTH_SHA1_HMAC:
 511                 case RTE_CRYPTO_AUTH_SHA224_HMAC:
 512                 case RTE_CRYPTO_AUTH_SHA256_HMAC:
 513                 case RTE_CRYPTO_AUTH_SHA384_HMAC:
 514                 case RTE_CRYPTO_AUTH_SHA512_HMAC:
 515                         shared_desc_len = cnstr_shdsc_hmac(
 516                                                 cdb->sh_desc, true,
 517                                                 swap, SHR_NEVER, &alginfo_a,
 518                                                 !ses->dir,
 519                                                 ses->digest_length);
 520                         break;
 521                 case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 522                         shared_desc_len = cnstr_shdsc_snow_f9(
 523                                                 cdb->sh_desc, true, swap,
 524                                                 &alginfo_a,
 525                                                 !ses->dir,
 526                                                 ses->digest_length);
 527                         break;
 528                 case RTE_CRYPTO_AUTH_ZUC_EIA3:
 529                         shared_desc_len = cnstr_shdsc_zuca(
 530                                                 cdb->sh_desc, true, swap,
 531                                                 &alginfo_a,
 532                                                 !ses->dir,
 533                                                 ses->digest_length);
 534                         break;
 535                 default:
 536                         DPAA_SEC_ERR("unsupported auth alg %u", ses->auth_alg);
 537                 }
 538                 break;
 539         case DPAA_SEC_AEAD:
 540                 if (alginfo.algtype == (unsigned int)DPAA_SEC_ALG_UNSUPPORT) {
 541                         DPAA_SEC_ERR("not supported aead alg");
 542                         return -ENOTSUP;
 543                 }
 544                 alginfo.key = (size_t)ses->aead_key.data;
 545                 alginfo.keylen = ses->aead_key.length;
 546                 alginfo.key_enc_flags = 0;
 547                 alginfo.key_type = RTA_DATA_IMM;
 548                 alginfo.algtype = ses->aead_key.alg;
 549                 alginfo.algmode = ses->aead_key.algmode;
 550
 551                 if (ses->dir == DIR_ENC)
 552                         shared_desc_len = cnstr_shdsc_gcm_encap(
 553                                         cdb->sh_desc, true, swap, SHR_NEVER,
 554                                         &alginfo,
 555                                         ses->iv.length,
 556                                         ses->digest_length);
 557                 else
 558                         shared_desc_len = cnstr_shdsc_gcm_decap(
 559                                         cdb->sh_desc, true, swap, SHR_NEVER,
 560                                         &alginfo,
 561                                         ses->iv.length,
 562                                         ses->digest_length);
 563                 break;
 564         case DPAA_SEC_CIPHER_HASH:
 565                 alginfo_c.key = (size_t)ses->cipher_key.data;
 566                 alginfo_c.keylen = ses->cipher_key.length;
 567                 alginfo_c.key_enc_flags = 0;
 568                 alginfo_c.key_type = RTA_DATA_IMM;
 569                 alginfo_c.algtype = ses->cipher_key.alg;
 570                 alginfo_c.algmode = ses->cipher_key.algmode;
 571
 572                 alginfo_a.key = (size_t)ses->auth_key.data;
 573                 alginfo_a.keylen = ses->auth_key.length;
 574                 alginfo_a.key_enc_flags = 0;
 575                 alginfo_a.key_type = RTA_DATA_IMM;
 576                 alginfo_a.algtype = ses->auth_key.alg;
 577                 alginfo_a.algmode = ses->auth_key.algmode;
 578
 579                 cdb->sh_desc[0] = alginfo_c.keylen;
 580                 cdb->sh_desc[1] = alginfo_a.keylen;
 581                 err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
 582                                        MIN_JOB_DESC_SIZE,
 583                                        (unsigned int *)cdb->sh_desc,
 584                                        &cdb->sh_desc[2], 2);
 585
 586                 if (err < 0) {
 587                         DPAA_SEC_ERR("Crypto: Incorrect key lengths");
 588                         return err;
 589                 }
 590                 if (cdb->sh_desc[2] & 1)
 591                         alginfo_c.key_type = RTA_DATA_IMM;
 592                 else {
 593                         alginfo_c.key = (size_t)dpaa_mem_vtop(
 594                                                 (void *)(size_t)alginfo_c.key);
 595                         alginfo_c.key_type = RTA_DATA_PTR;
 596                 }
 597                 if (cdb->sh_desc[2] & (1<<1))
 598                         alginfo_a.key_type = RTA_DATA_IMM;
 599                 else {
 600                         alginfo_a.key = (size_t)dpaa_mem_vtop(
 601                                                 (void *)(size_t)alginfo_a.key);
 602                         alginfo_a.key_type = RTA_DATA_PTR;
 603                 }
 604                 cdb->sh_desc[0] = 0;
 605                 cdb->sh_desc[1] = 0;
 606                 cdb->sh_desc[2] = 0;
 607                 /* Auth_only_len is set as 0 here and it will be
 608                  * overwritten in fd for each packet.
 609                  */
 610                 shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
 611                                 true, swap, SHR_SERIAL, &alginfo_c, &alginfo_a,
 612                                 ses->iv.length,
 613                                 ses->digest_length, ses->dir);
 614                 break;
 615         case DPAA_SEC_HASH_CIPHER:
 616         default:
 617                 DPAA_SEC_ERR("error: Unsupported session");
 618                 return -ENOTSUP;
 619         }
 620
 621         if (shared_desc_len < 0) {
 622                 DPAA_SEC_ERR("error in preparing command block");
 623                 return shared_desc_len;
 624         }
 625
 626         cdb->sh_hdr.hi.field.idlen = shared_desc_len;
 627         cdb->sh_hdr.hi.word = rte_cpu_to_be_32(cdb->sh_hdr.hi.word);
 628         cdb->sh_hdr.lo.word = rte_cpu_to_be_32(cdb->sh_hdr.lo.word);
 629
 630         return 0;
 631 }
 632
 633 /* qp is lockless, should be accessed by only one thread */
 634 static int
 635 dpaa_sec_deq(struct dpaa_sec_qp *qp, struct rte_crypto_op **ops, int nb_ops)
 636 {
 637         struct qman_fq *fq;
 638         unsigned int pkts = 0;
 639         int num_rx_bufs, ret;
 640         struct qm_dqrr_entry *dq;
 641         uint32_t vdqcr_flags = 0;
 642
 643         fq = &qp->outq;
 644         /*
 645          * Until request for four buffers, we provide exact number of buffers.
 646          * Otherwise we do not set the QM_VDQCR_EXACT flag.
 647          * Not setting QM_VDQCR_EXACT flag can provide two more buffers than
 648          * requested, so we request two less in this case.
 649          */
 650         if (nb_ops < 4) {
 651                 vdqcr_flags = QM_VDQCR_EXACT;
 652                 num_rx_bufs = nb_ops;
 653         } else {
 654                 num_rx_bufs = nb_ops > DPAA_MAX_DEQUEUE_NUM_FRAMES ?
 655                         (DPAA_MAX_DEQUEUE_NUM_FRAMES - 2) : (nb_ops - 2);
 656         }
 657         ret = qman_set_vdq(fq, num_rx_bufs, vdqcr_flags);
 658         if (ret)
 659                 return 0;
 660
 661         do {
 662                 const struct qm_fd *fd;
 663                 struct dpaa_sec_job *job;
 664                 struct dpaa_sec_op_ctx *ctx;
 665                 struct rte_crypto_op *op;
 666
 667                 dq = qman_dequeue(fq);
 668                 if (!dq)
 669                         continue;
 670
 671                 fd = &dq->fd;
 672                 /* sg is embedded in an op ctx,
 673                  * sg[0] is for output
 674                  * sg[1] for input
 675                  */
 676                 job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
 677
 678                 ctx = container_of(job, struct dpaa_sec_op_ctx, job);
 679                 ctx->fd_status = fd->status;
 680                 op = ctx->op;
 681                 if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 682                         struct qm_sg_entry *sg_out;
 683                         uint32_t len;
 684                         struct rte_mbuf *mbuf = (op->sym->m_dst == NULL) ?
 685                                                 op->sym->m_src : op->sym->m_dst;
 686
 687                         sg_out = &job->sg[0];
 688                         hw_sg_to_cpu(sg_out);
 689                         len = sg_out->length;
 690                         mbuf->pkt_len = len;
 691                         while (mbuf->next != NULL) {
 692                                 len -= mbuf->data_len;
 693                                 mbuf = mbuf->next;
 694                         }
 695                         mbuf->data_len = len;
 696                 }
 697                 if (!ctx->fd_status) {
 698                         op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 699                 } else {
 700                         DPAA_SEC_DP_WARN("SEC return err:0x%x", ctx->fd_status);
 701                         op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 702                 }
 703                 ops[pkts++] = op;
 704
 705                 /* report op status to sym->op and then free the ctx memeory */
 706                 rte_mempool_put(ctx->ctx_pool, (void *)ctx);
 707
 708                 qman_dqrr_consume(fq, dq);
 709         } while (fq->flags & QMAN_FQ_STATE_VDQCR);
 710
 711         return pkts;
 712 }
 713
 714 static inline struct dpaa_sec_job *
 715 build_auth_only_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
 716 {
 717         struct rte_crypto_sym_op *sym = op->sym;
 718         struct rte_mbuf *mbuf = sym->m_src;
 719         struct dpaa_sec_job *cf;
 720         struct dpaa_sec_op_ctx *ctx;
 721         struct qm_sg_entry *sg, *out_sg, *in_sg;
 722         phys_addr_t start_addr;
 723         uint8_t *old_digest, extra_segs;
 724         int data_len, data_offset;
 725
 726         data_len = sym->auth.data.length;
 727         data_offset = sym->auth.data.offset;
 728
 729         if (ses->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2 ||
 730             ses->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
 731                 if ((data_len & 7) || (data_offset & 7)) {
 732                         DPAA_SEC_ERR("AUTH: len/offset must be full bytes");
 733                         return NULL;
 734                 }
 735
 736                 data_len = data_len >> 3;
 737                 data_offset = data_offset >> 3;
 738         }
 739
 740         if (is_decode(ses))
 741                 extra_segs = 3;
 742         else
 743                 extra_segs = 2;
 744
 745         if (mbuf->nb_segs > MAX_SG_ENTRIES) {
 746                 DPAA_SEC_DP_ERR("Auth: Max sec segs supported is %d",
 747                                 MAX_SG_ENTRIES);
 748                 return NULL;
 749         }
 750         ctx = dpaa_sec_alloc_ctx(ses, mbuf->nb_segs + extra_segs);
 751         if (!ctx)
 752                 return NULL;
 753
 754         cf = &ctx->job;
 755         ctx->op = op;
 756         old_digest = ctx->digest;
 757
 758         /* output */
 759         out_sg = &cf->sg[0];
 760         qm_sg_entry_set64(out_sg, sym->auth.digest.phys_addr);
 761         out_sg->length = ses->digest_length;
 762         cpu_to_hw_sg(out_sg);
 763
 764         /* input */
 765         in_sg = &cf->sg[1];
 766         /* need to extend the input to a compound frame */
 767         in_sg->extension = 1;
 768         in_sg->final = 1;
 769         in_sg->length = data_len;
 770         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(&cf->sg[2]));
 771
 772         /* 1st seg */
 773         sg = in_sg + 1;
 774
 775         if (ses->iv.length) {
 776                 uint8_t *iv_ptr;
 777
 778                 iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 779                                                    ses->iv.offset);
 780
 781                 if (ses->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2) {
 782                         iv_ptr = conv_to_snow_f9_iv(iv_ptr);
 783                         sg->length = 12;
 784                 } else if (ses->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
 785                         iv_ptr = conv_to_zuc_eia_iv(iv_ptr);
 786                         sg->length = 8;
 787                 } else {
 788                         sg->length = ses->iv.length;
 789                 }
 790                 qm_sg_entry_set64(sg, dpaa_mem_vtop(iv_ptr));
 791                 in_sg->length += sg->length;
 792                 cpu_to_hw_sg(sg);
 793                 sg++;
 794         }
 795
 796         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 797         sg->offset = data_offset;
 798
 799         if (data_len <= (mbuf->data_len - data_offset)) {
 800                 sg->length = data_len;
 801         } else {
 802                 sg->length = mbuf->data_len - data_offset;
 803
 804                 /* remaining i/p segs */
 805                 while ((data_len = data_len - sg->length) &&
 806                        (mbuf = mbuf->next)) {
 807                         cpu_to_hw_sg(sg);
 808                         sg++;
 809                         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 810                         if (data_len > mbuf->data_len)
 811                                 sg->length = mbuf->data_len;
 812                         else
 813                                 sg->length = data_len;
 814                 }
 815         }
 816
 817         if (is_decode(ses)) {
 818                 /* Digest verification case */
 819                 cpu_to_hw_sg(sg);
 820                 sg++;
 821                 rte_memcpy(old_digest, sym->auth.digest.data,
 822                                 ses->digest_length);
 823                 start_addr = dpaa_mem_vtop(old_digest);
 824                 qm_sg_entry_set64(sg, start_addr);
 825                 sg->length = ses->digest_length;
 826                 in_sg->length += ses->digest_length;
 827         }
 828         sg->final = 1;
 829         cpu_to_hw_sg(sg);
 830         cpu_to_hw_sg(in_sg);
 831
 832         return cf;
 833 }
 834
 835 /**
 836  * packet looks like:
 837  *              |<----data_len------->|
 838  *    |ip_header|ah_header|icv|payload|
 839  *              ^
 840  *              |
 841  *         mbuf->pkt.data
 842  */
 843 static inline struct dpaa_sec_job *
 844 build_auth_only(struct rte_crypto_op *op, dpaa_sec_session *ses)
 845 {
 846         struct rte_crypto_sym_op *sym = op->sym;
 847         struct rte_mbuf *mbuf = sym->m_src;
 848         struct dpaa_sec_job *cf;
 849         struct dpaa_sec_op_ctx *ctx;
 850         struct qm_sg_entry *sg, *in_sg;
 851         rte_iova_t start_addr;
 852         uint8_t *old_digest;
 853         int data_len, data_offset;
 854
 855         data_len = sym->auth.data.length;
 856         data_offset = sym->auth.data.offset;
 857
 858         if (ses->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2 ||
 859             ses->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
 860                 if ((data_len & 7) || (data_offset & 7)) {
 861                         DPAA_SEC_ERR("AUTH: len/offset must be full bytes");
 862                         return NULL;
 863                 }
 864
 865                 data_len = data_len >> 3;
 866                 data_offset = data_offset >> 3;
 867         }
 868
 869         ctx = dpaa_sec_alloc_ctx(ses, 4);
 870         if (!ctx)
 871                 return NULL;
 872
 873         cf = &ctx->job;
 874         ctx->op = op;
 875         old_digest = ctx->digest;
 876
 877         start_addr = rte_pktmbuf_iova(mbuf);
 878         /* output */
 879         sg = &cf->sg[0];
 880         qm_sg_entry_set64(sg, sym->auth.digest.phys_addr);
 881         sg->length = ses->digest_length;
 882         cpu_to_hw_sg(sg);
 883
 884         /* input */
 885         in_sg = &cf->sg[1];
 886         /* need to extend the input to a compound frame */
 887         in_sg->extension = 1;
 888         in_sg->final = 1;
 889         in_sg->length = data_len;
 890         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(&cf->sg[2]));
 891         sg = &cf->sg[2];
 892
 893         if (ses->iv.length) {
 894                 uint8_t *iv_ptr;
 895
 896                 iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 897                                                    ses->iv.offset);
 898
 899                 if (ses->auth_alg == RTE_CRYPTO_AUTH_SNOW3G_UIA2) {
 900                         iv_ptr = conv_to_snow_f9_iv(iv_ptr);
 901                         sg->length = 12;
 902                 } else if (ses->auth_alg == RTE_CRYPTO_AUTH_ZUC_EIA3) {
 903                         iv_ptr = conv_to_zuc_eia_iv(iv_ptr);
 904                         sg->length = 8;
 905                 } else {
 906                         sg->length = ses->iv.length;
 907                 }
 908                 qm_sg_entry_set64(sg, dpaa_mem_vtop(iv_ptr));
 909                 in_sg->length += sg->length;
 910                 cpu_to_hw_sg(sg);
 911                 sg++;
 912         }
 913
 914         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 915         sg->offset = data_offset;
 916         sg->length = data_len;
 917
 918         if (is_decode(ses)) {
 919                 /* Digest verification case */
 920                 cpu_to_hw_sg(sg);
 921                 /* hash result or digest, save digest first */
 922                 rte_memcpy(old_digest, sym->auth.digest.data,
 923                                 ses->digest_length);
 924                 /* let's check digest by hw */
 925                 start_addr = dpaa_mem_vtop(old_digest);
 926                 sg++;
 927                 qm_sg_entry_set64(sg, start_addr);
 928                 sg->length = ses->digest_length;
 929                 in_sg->length += ses->digest_length;
 930         }
 931         sg->final = 1;
 932         cpu_to_hw_sg(sg);
 933         cpu_to_hw_sg(in_sg);
 934
 935         return cf;
 936 }
 937
 938 static inline struct dpaa_sec_job *
 939 build_cipher_only_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
 940 {
 941         struct rte_crypto_sym_op *sym = op->sym;
 942         struct dpaa_sec_job *cf;
 943         struct dpaa_sec_op_ctx *ctx;
 944         struct qm_sg_entry *sg, *out_sg, *in_sg;
 945         struct rte_mbuf *mbuf;
 946         uint8_t req_segs;
 947         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 948                         ses->iv.offset);
 949         int data_len, data_offset;
 950
 951         data_len = sym->cipher.data.length;
 952         data_offset = sym->cipher.data.offset;
 953
 954         if (ses->cipher_alg == RTE_CRYPTO_CIPHER_SNOW3G_UEA2 ||
 955                 ses->cipher_alg == RTE_CRYPTO_CIPHER_ZUC_EEA3) {
 956                 if ((data_len & 7) || (data_offset & 7)) {
 957                         DPAA_SEC_ERR("CIPHER: len/offset must be full bytes");
 958                         return NULL;
 959                 }
 960
 961                 data_len = data_len >> 3;
 962                 data_offset = data_offset >> 3;
 963         }
 964
 965         if (sym->m_dst) {
 966                 mbuf = sym->m_dst;
 967                 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 3;
 968         } else {
 969                 mbuf = sym->m_src;
 970                 req_segs = mbuf->nb_segs * 2 + 3;
 971         }
 972         if (mbuf->nb_segs > MAX_SG_ENTRIES) {
 973                 DPAA_SEC_DP_ERR("Cipher: Max sec segs supported is %d",
 974                                 MAX_SG_ENTRIES);
 975                 return NULL;
 976         }
 977
 978         ctx = dpaa_sec_alloc_ctx(ses, req_segs);
 979         if (!ctx)
 980                 return NULL;
 981
 982         cf = &ctx->job;
 983         ctx->op = op;
 984
 985         /* output */
 986         out_sg = &cf->sg[0];
 987         out_sg->extension = 1;
 988         out_sg->length = data_len;
 989         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(&cf->sg[2]));
 990         cpu_to_hw_sg(out_sg);
 991
 992         /* 1st seg */
 993         sg = &cf->sg[2];
 994         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 995         sg->length = mbuf->data_len - data_offset;
 996         sg->offset = data_offset;
 997
 998         /* Successive segs */
 999         mbuf = mbuf->next;
1000         while (mbuf) {
1001                 cpu_to_hw_sg(sg);
1002                 sg++;
1003                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1004                 sg->length = mbuf->data_len;
1005                 mbuf = mbuf->next;
1006         }
1007         sg->final = 1;
1008         cpu_to_hw_sg(sg);
1009
1010         /* input */
1011         mbuf = sym->m_src;
1012         in_sg = &cf->sg[1];
1013         in_sg->extension = 1;
1014         in_sg->final = 1;
1015         in_sg->length = data_len + ses->iv.length;
1016
1017         sg++;
1018         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
1019         cpu_to_hw_sg(in_sg);
1020
1021         /* IV */
1022         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1023         sg->length = ses->iv.length;
1024         cpu_to_hw_sg(sg);
1025
1026         /* 1st seg */
1027         sg++;
1028         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1029         sg->length = mbuf->data_len - data_offset;
1030         sg->offset = data_offset;
1031
1032         /* Successive segs */
1033         mbuf = mbuf->next;
1034         while (mbuf) {
1035                 cpu_to_hw_sg(sg);
1036                 sg++;
1037                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1038                 sg->length = mbuf->data_len;
1039                 mbuf = mbuf->next;
1040         }
1041         sg->final = 1;
1042         cpu_to_hw_sg(sg);
1043
1044         return cf;
1045 }
1046
1047 static inline struct dpaa_sec_job *
1048 build_cipher_only(struct rte_crypto_op *op, dpaa_sec_session *ses)
1049 {
1050         struct rte_crypto_sym_op *sym = op->sym;
1051         struct dpaa_sec_job *cf;
1052         struct dpaa_sec_op_ctx *ctx;
1053         struct qm_sg_entry *sg;
1054         rte_iova_t src_start_addr, dst_start_addr;
1055         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1056                         ses->iv.offset);
1057         int data_len, data_offset;
1058
1059         data_len = sym->cipher.data.length;
1060         data_offset = sym->cipher.data.offset;
1061
1062         if (ses->cipher_alg == RTE_CRYPTO_CIPHER_SNOW3G_UEA2 ||
1063                 ses->cipher_alg == RTE_CRYPTO_CIPHER_ZUC_EEA3) {
1064                 if ((data_len & 7) || (data_offset & 7)) {
1065                         DPAA_SEC_ERR("CIPHER: len/offset must be full bytes");
1066                         return NULL;
1067                 }
1068
1069                 data_len = data_len >> 3;
1070                 data_offset = data_offset >> 3;
1071         }
1072
1073         ctx = dpaa_sec_alloc_ctx(ses, 4);
1074         if (!ctx)
1075                 return NULL;
1076
1077         cf = &ctx->job;
1078         ctx->op = op;
1079
1080         src_start_addr = rte_pktmbuf_iova(sym->m_src);
1081
1082         if (sym->m_dst)
1083                 dst_start_addr = rte_pktmbuf_iova(sym->m_dst);
1084         else
1085                 dst_start_addr = src_start_addr;
1086
1087         /* output */
1088         sg = &cf->sg[0];
1089         qm_sg_entry_set64(sg, dst_start_addr + data_offset);
1090         sg->length = data_len + ses->iv.length;
1091         cpu_to_hw_sg(sg);
1092
1093         /* input */
1094         sg = &cf->sg[1];
1095
1096         /* need to extend the input to a compound frame */
1097         sg->extension = 1;
1098         sg->final = 1;
1099         sg->length = data_len + ses->iv.length;
1100         qm_sg_entry_set64(sg, dpaa_mem_vtop(&cf->sg[2]));
1101         cpu_to_hw_sg(sg);
1102
1103         sg = &cf->sg[2];
1104         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1105         sg->length = ses->iv.length;
1106         cpu_to_hw_sg(sg);
1107
1108         sg++;
1109         qm_sg_entry_set64(sg, src_start_addr + data_offset);
1110         sg->length = data_len;
1111         sg->final = 1;
1112         cpu_to_hw_sg(sg);
1113
1114         return cf;
1115 }
1116
1117 static inline struct dpaa_sec_job *
1118 build_cipher_auth_gcm_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
1119 {
1120         struct rte_crypto_sym_op *sym = op->sym;
1121         struct dpaa_sec_job *cf;
1122         struct dpaa_sec_op_ctx *ctx;
1123         struct qm_sg_entry *sg, *out_sg, *in_sg;
1124         struct rte_mbuf *mbuf;
1125         uint8_t req_segs;
1126         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1127                         ses->iv.offset);
1128
1129         if (sym->m_dst) {
1130                 mbuf = sym->m_dst;
1131                 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 4;
1132         } else {
1133                 mbuf = sym->m_src;
1134                 req_segs = mbuf->nb_segs * 2 + 4;
1135         }
1136
1137         if (ses->auth_only_len)
1138                 req_segs++;
1139
1140         if (mbuf->nb_segs > MAX_SG_ENTRIES) {
1141                 DPAA_SEC_DP_ERR("AEAD: Max sec segs supported is %d",
1142                                 MAX_SG_ENTRIES);
1143                 return NULL;
1144         }
1145
1146         ctx = dpaa_sec_alloc_ctx(ses, req_segs);
1147         if (!ctx)
1148                 return NULL;
1149
1150         cf = &ctx->job;
1151         ctx->op = op;
1152
1153         rte_prefetch0(cf->sg);
1154
1155         /* output */
1156         out_sg = &cf->sg[0];
1157         out_sg->extension = 1;
1158         if (is_encode(ses))
1159                 out_sg->length = sym->aead.data.length + ses->digest_length;
1160         else
1161                 out_sg->length = sym->aead.data.length;
1162
1163         /* output sg entries */
1164         sg = &cf->sg[2];
1165         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(sg));
1166         cpu_to_hw_sg(out_sg);
1167
1168         /* 1st seg */
1169         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1170         sg->length = mbuf->data_len - sym->aead.data.offset;
1171         sg->offset = sym->aead.data.offset;
1172
1173         /* Successive segs */
1174         mbuf = mbuf->next;
1175         while (mbuf) {
1176                 cpu_to_hw_sg(sg);
1177                 sg++;
1178                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1179                 sg->length = mbuf->data_len;
1180                 mbuf = mbuf->next;
1181         }
1182         sg->length -= ses->digest_length;
1183
1184         if (is_encode(ses)) {
1185                 cpu_to_hw_sg(sg);
1186                 /* set auth output */
1187                 sg++;
1188                 qm_sg_entry_set64(sg, sym->aead.digest.phys_addr);
1189                 sg->length = ses->digest_length;
1190         }
1191         sg->final = 1;
1192         cpu_to_hw_sg(sg);
1193
1194         /* input */
1195         mbuf = sym->m_src;
1196         in_sg = &cf->sg[1];
1197         in_sg->extension = 1;
1198         in_sg->final = 1;
1199         if (is_encode(ses))
1200                 in_sg->length = ses->iv.length + sym->aead.data.length
1201                                                         + ses->auth_only_len;
1202         else
1203                 in_sg->length = ses->iv.length + sym->aead.data.length
1204                                 + ses->auth_only_len + ses->digest_length;
1205
1206         /* input sg entries */
1207         sg++;
1208         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
1209         cpu_to_hw_sg(in_sg);
1210
1211         /* 1st seg IV */
1212         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1213         sg->length = ses->iv.length;
1214         cpu_to_hw_sg(sg);
1215
1216         /* 2nd seg auth only */
1217         if (ses->auth_only_len) {
1218                 sg++;
1219                 qm_sg_entry_set64(sg, dpaa_mem_vtop(sym->aead.aad.data));
1220                 sg->length = ses->auth_only_len;
1221                 cpu_to_hw_sg(sg);
1222         }
1223
1224         /* 3rd seg */
1225         sg++;
1226         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1227         sg->length = mbuf->data_len - sym->aead.data.offset;
1228         sg->offset = sym->aead.data.offset;
1229
1230         /* Successive segs */
1231         mbuf = mbuf->next;
1232         while (mbuf) {
1233                 cpu_to_hw_sg(sg);
1234                 sg++;
1235                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1236                 sg->length = mbuf->data_len;
1237                 mbuf = mbuf->next;
1238         }
1239
1240         if (is_decode(ses)) {
1241                 cpu_to_hw_sg(sg);
1242                 sg++;
1243                 memcpy(ctx->digest, sym->aead.digest.data,
1244                         ses->digest_length);
1245                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1246                 sg->length = ses->digest_length;
1247         }
1248         sg->final = 1;
1249         cpu_to_hw_sg(sg);
1250
1251         return cf;
1252 }
1253
1254 static inline struct dpaa_sec_job *
1255 build_cipher_auth_gcm(struct rte_crypto_op *op, dpaa_sec_session *ses)
1256 {
1257         struct rte_crypto_sym_op *sym = op->sym;
1258         struct dpaa_sec_job *cf;
1259         struct dpaa_sec_op_ctx *ctx;
1260         struct qm_sg_entry *sg;
1261         uint32_t length = 0;
1262         rte_iova_t src_start_addr, dst_start_addr;
1263         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1264                         ses->iv.offset);
1265
1266         src_start_addr = sym->m_src->buf_iova + sym->m_src->data_off;
1267
1268         if (sym->m_dst)
1269                 dst_start_addr = sym->m_dst->buf_iova + sym->m_dst->data_off;
1270         else
1271                 dst_start_addr = src_start_addr;
1272
1273         ctx = dpaa_sec_alloc_ctx(ses, 7);
1274         if (!ctx)
1275                 return NULL;
1276
1277         cf = &ctx->job;
1278         ctx->op = op;
1279
1280         /* input */
1281         rte_prefetch0(cf->sg);
1282         sg = &cf->sg[2];
1283         qm_sg_entry_set64(&cf->sg[1], dpaa_mem_vtop(sg));
1284         if (is_encode(ses)) {
1285                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1286                 sg->length = ses->iv.length;
1287                 length += sg->length;
1288                 cpu_to_hw_sg(sg);
1289
1290                 sg++;
1291                 if (ses->auth_only_len) {
1292                         qm_sg_entry_set64(sg,
1293                                           dpaa_mem_vtop(sym->aead.aad.data));
1294                         sg->length = ses->auth_only_len;
1295                         length += sg->length;
1296                         cpu_to_hw_sg(sg);
1297                         sg++;
1298                 }
1299                 qm_sg_entry_set64(sg, src_start_addr + sym->aead.data.offset);
1300                 sg->length = sym->aead.data.length;
1301                 length += sg->length;
1302                 sg->final = 1;
1303                 cpu_to_hw_sg(sg);
1304         } else {
1305                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1306                 sg->length = ses->iv.length;
1307                 length += sg->length;
1308                 cpu_to_hw_sg(sg);
1309
1310                 sg++;
1311                 if (ses->auth_only_len) {
1312                         qm_sg_entry_set64(sg,
1313                                           dpaa_mem_vtop(sym->aead.aad.data));
1314                         sg->length = ses->auth_only_len;
1315                         length += sg->length;
1316                         cpu_to_hw_sg(sg);
1317                         sg++;
1318                 }
1319                 qm_sg_entry_set64(sg, src_start_addr + sym->aead.data.offset);
1320                 sg->length = sym->aead.data.length;
1321                 length += sg->length;
1322                 cpu_to_hw_sg(sg);
1323
1324                 memcpy(ctx->digest, sym->aead.digest.data,
1325                        ses->digest_length);
1326                 sg++;
1327
1328                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1329                 sg->length = ses->digest_length;
1330                 length += sg->length;
1331                 sg->final = 1;
1332                 cpu_to_hw_sg(sg);
1333         }
1334         /* input compound frame */
1335         cf->sg[1].length = length;
1336         cf->sg[1].extension = 1;
1337         cf->sg[1].final = 1;
1338         cpu_to_hw_sg(&cf->sg[1]);
1339
1340         /* output */
1341         sg++;
1342         qm_sg_entry_set64(&cf->sg[0], dpaa_mem_vtop(sg));
1343         qm_sg_entry_set64(sg,
1344                 dst_start_addr + sym->aead.data.offset);
1345         sg->length = sym->aead.data.length;
1346         length = sg->length;
1347         if (is_encode(ses)) {
1348                 cpu_to_hw_sg(sg);
1349                 /* set auth output */
1350                 sg++;
1351                 qm_sg_entry_set64(sg, sym->aead.digest.phys_addr);
1352                 sg->length = ses->digest_length;
1353                 length += sg->length;
1354         }
1355         sg->final = 1;
1356         cpu_to_hw_sg(sg);
1357
1358         /* output compound frame */
1359         cf->sg[0].length = length;
1360         cf->sg[0].extension = 1;
1361         cpu_to_hw_sg(&cf->sg[0]);
1362
1363         return cf;
1364 }
1365
1366 static inline struct dpaa_sec_job *
1367 build_cipher_auth_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
1368 {
1369         struct rte_crypto_sym_op *sym = op->sym;
1370         struct dpaa_sec_job *cf;
1371         struct dpaa_sec_op_ctx *ctx;
1372         struct qm_sg_entry *sg, *out_sg, *in_sg;
1373         struct rte_mbuf *mbuf;
1374         uint8_t req_segs;
1375         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1376                         ses->iv.offset);
1377
1378         if (sym->m_dst) {
1379                 mbuf = sym->m_dst;
1380                 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 4;
1381         } else {
1382                 mbuf = sym->m_src;
1383                 req_segs = mbuf->nb_segs * 2 + 4;
1384         }
1385
1386         if (mbuf->nb_segs > MAX_SG_ENTRIES) {
1387                 DPAA_SEC_DP_ERR("Cipher-Auth: Max sec segs supported is %d",
1388                                 MAX_SG_ENTRIES);
1389                 return NULL;
1390         }
1391
1392         ctx = dpaa_sec_alloc_ctx(ses, req_segs);
1393         if (!ctx)
1394                 return NULL;
1395
1396         cf = &ctx->job;
1397         ctx->op = op;
1398
1399         rte_prefetch0(cf->sg);
1400
1401         /* output */
1402         out_sg = &cf->sg[0];
1403         out_sg->extension = 1;
1404         if (is_encode(ses))
1405                 out_sg->length = sym->auth.data.length + ses->digest_length;
1406         else
1407                 out_sg->length = sym->auth.data.length;
1408
1409         /* output sg entries */
1410         sg = &cf->sg[2];
1411         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(sg));
1412         cpu_to_hw_sg(out_sg);
1413
1414         /* 1st seg */
1415         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1416         sg->length = mbuf->data_len - sym->auth.data.offset;
1417         sg->offset = sym->auth.data.offset;
1418
1419         /* Successive segs */
1420         mbuf = mbuf->next;
1421         while (mbuf) {
1422                 cpu_to_hw_sg(sg);
1423                 sg++;
1424                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1425                 sg->length = mbuf->data_len;
1426                 mbuf = mbuf->next;
1427         }
1428         sg->length -= ses->digest_length;
1429
1430         if (is_encode(ses)) {
1431                 cpu_to_hw_sg(sg);
1432                 /* set auth output */
1433                 sg++;
1434                 qm_sg_entry_set64(sg, sym->auth.digest.phys_addr);
1435                 sg->length = ses->digest_length;
1436         }
1437         sg->final = 1;
1438         cpu_to_hw_sg(sg);
1439
1440         /* input */
1441         mbuf = sym->m_src;
1442         in_sg = &cf->sg[1];
1443         in_sg->extension = 1;
1444         in_sg->final = 1;
1445         if (is_encode(ses))
1446                 in_sg->length = ses->iv.length + sym->auth.data.length;
1447         else
1448                 in_sg->length = ses->iv.length + sym->auth.data.length
1449                                                 + ses->digest_length;
1450
1451         /* input sg entries */
1452         sg++;
1453         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
1454         cpu_to_hw_sg(in_sg);
1455
1456         /* 1st seg IV */
1457         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1458         sg->length = ses->iv.length;
1459         cpu_to_hw_sg(sg);
1460
1461         /* 2nd seg */
1462         sg++;
1463         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1464         sg->length = mbuf->data_len - sym->auth.data.offset;
1465         sg->offset = sym->auth.data.offset;
1466
1467         /* Successive segs */
1468         mbuf = mbuf->next;
1469         while (mbuf) {
1470                 cpu_to_hw_sg(sg);
1471                 sg++;
1472                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1473                 sg->length = mbuf->data_len;
1474                 mbuf = mbuf->next;
1475         }
1476
1477         sg->length -= ses->digest_length;
1478         if (is_decode(ses)) {
1479                 cpu_to_hw_sg(sg);
1480                 sg++;
1481                 memcpy(ctx->digest, sym->auth.digest.data,
1482                         ses->digest_length);
1483                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1484                 sg->length = ses->digest_length;
1485         }
1486         sg->final = 1;
1487         cpu_to_hw_sg(sg);
1488
1489         return cf;
1490 }
1491
1492 static inline struct dpaa_sec_job *
1493 build_cipher_auth(struct rte_crypto_op *op, dpaa_sec_session *ses)
1494 {
1495         struct rte_crypto_sym_op *sym = op->sym;
1496         struct dpaa_sec_job *cf;
1497         struct dpaa_sec_op_ctx *ctx;
1498         struct qm_sg_entry *sg;
1499         rte_iova_t src_start_addr, dst_start_addr;
1500         uint32_t length = 0;
1501         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1502                         ses->iv.offset);
1503
1504         src_start_addr = sym->m_src->buf_iova + sym->m_src->data_off;
1505         if (sym->m_dst)
1506                 dst_start_addr = sym->m_dst->buf_iova + sym->m_dst->data_off;
1507         else
1508                 dst_start_addr = src_start_addr;
1509
1510         ctx = dpaa_sec_alloc_ctx(ses, 7);
1511         if (!ctx)
1512                 return NULL;
1513
1514         cf = &ctx->job;
1515         ctx->op = op;
1516
1517         /* input */
1518         rte_prefetch0(cf->sg);
1519         sg = &cf->sg[2];
1520         qm_sg_entry_set64(&cf->sg[1], dpaa_mem_vtop(sg));
1521         if (is_encode(ses)) {
1522                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1523                 sg->length = ses->iv.length;
1524                 length += sg->length;
1525                 cpu_to_hw_sg(sg);
1526
1527                 sg++;
1528                 qm_sg_entry_set64(sg, src_start_addr + sym->auth.data.offset);
1529                 sg->length = sym->auth.data.length;
1530                 length += sg->length;
1531                 sg->final = 1;
1532                 cpu_to_hw_sg(sg);
1533         } else {
1534                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1535                 sg->length = ses->iv.length;
1536                 length += sg->length;
1537                 cpu_to_hw_sg(sg);
1538
1539                 sg++;
1540
1541                 qm_sg_entry_set64(sg, src_start_addr + sym->auth.data.offset);
1542                 sg->length = sym->auth.data.length;
1543                 length += sg->length;
1544                 cpu_to_hw_sg(sg);
1545
1546                 memcpy(ctx->digest, sym->auth.digest.data,
1547                        ses->digest_length);
1548                 sg++;
1549
1550                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1551                 sg->length = ses->digest_length;
1552                 length += sg->length;
1553                 sg->final = 1;
1554                 cpu_to_hw_sg(sg);
1555         }
1556         /* input compound frame */
1557         cf->sg[1].length = length;
1558         cf->sg[1].extension = 1;
1559         cf->sg[1].final = 1;
1560         cpu_to_hw_sg(&cf->sg[1]);
1561
1562         /* output */
1563         sg++;
1564         qm_sg_entry_set64(&cf->sg[0], dpaa_mem_vtop(sg));
1565         qm_sg_entry_set64(sg, dst_start_addr + sym->cipher.data.offset);
1566         sg->length = sym->cipher.data.length;
1567         length = sg->length;
1568         if (is_encode(ses)) {
1569                 cpu_to_hw_sg(sg);
1570                 /* set auth output */
1571                 sg++;
1572                 qm_sg_entry_set64(sg, sym->auth.digest.phys_addr);
1573                 sg->length = ses->digest_length;
1574                 length += sg->length;
1575         }
1576         sg->final = 1;
1577         cpu_to_hw_sg(sg);
1578
1579         /* output compound frame */
1580         cf->sg[0].length = length;
1581         cf->sg[0].extension = 1;
1582         cpu_to_hw_sg(&cf->sg[0]);
1583
1584         return cf;
1585 }
1586
1587 #ifdef RTE_LIBRTE_SECURITY
1588 static inline struct dpaa_sec_job *
1589 build_proto(struct rte_crypto_op *op, dpaa_sec_session *ses)
1590 {
1591         struct rte_crypto_sym_op *sym = op->sym;
1592         struct dpaa_sec_job *cf;
1593         struct dpaa_sec_op_ctx *ctx;
1594         struct qm_sg_entry *sg;
1595         phys_addr_t src_start_addr, dst_start_addr;
1596
1597         ctx = dpaa_sec_alloc_ctx(ses, 2);
1598         if (!ctx)
1599                 return NULL;
1600         cf = &ctx->job;
1601         ctx->op = op;
1602
1603         src_start_addr = rte_pktmbuf_mtophys(sym->m_src);
1604
1605         if (sym->m_dst)
1606                 dst_start_addr = rte_pktmbuf_mtophys(sym->m_dst);
1607         else
1608                 dst_start_addr = src_start_addr;
1609
1610         /* input */
1611         sg = &cf->sg[1];
1612         qm_sg_entry_set64(sg, src_start_addr);
1613         sg->length = sym->m_src->pkt_len;
1614         sg->final = 1;
1615         cpu_to_hw_sg(sg);
1616
1617         sym->m_src->packet_type &= ~RTE_PTYPE_L4_MASK;
1618         /* output */
1619         sg = &cf->sg[0];
1620         qm_sg_entry_set64(sg, dst_start_addr);
1621         sg->length = sym->m_src->buf_len - sym->m_src->data_off;
1622         cpu_to_hw_sg(sg);
1623
1624         return cf;
1625 }
1626
1627 static inline struct dpaa_sec_job *
1628 build_proto_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
1629 {
1630         struct rte_crypto_sym_op *sym = op->sym;
1631         struct dpaa_sec_job *cf;
1632         struct dpaa_sec_op_ctx *ctx;
1633         struct qm_sg_entry *sg, *out_sg, *in_sg;
1634         struct rte_mbuf *mbuf;
1635         uint8_t req_segs;
1636         uint32_t in_len = 0, out_len = 0;
1637
1638         if (sym->m_dst)
1639                 mbuf = sym->m_dst;
1640         else
1641                 mbuf = sym->m_src;
1642
1643         req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 2;
1644         if (mbuf->nb_segs > MAX_SG_ENTRIES) {
1645                 DPAA_SEC_DP_ERR("Proto: Max sec segs supported is %d",
1646                                 MAX_SG_ENTRIES);
1647                 return NULL;
1648         }
1649
1650         ctx = dpaa_sec_alloc_ctx(ses, req_segs);
1651         if (!ctx)
1652                 return NULL;
1653         cf = &ctx->job;
1654         ctx->op = op;
1655         /* output */
1656         out_sg = &cf->sg[0];
1657         out_sg->extension = 1;
1658         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(&cf->sg[2]));
1659
1660         /* 1st seg */
1661         sg = &cf->sg[2];
1662         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1663         sg->offset = 0;
1664
1665         /* Successive segs */
1666         while (mbuf->next) {
1667                 sg->length = mbuf->data_len;
1668                 out_len += sg->length;
1669                 mbuf = mbuf->next;
1670                 cpu_to_hw_sg(sg);
1671                 sg++;
1672                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1673                 sg->offset = 0;
1674         }
1675         sg->length = mbuf->buf_len - mbuf->data_off;
1676         out_len += sg->length;
1677         sg->final = 1;
1678         cpu_to_hw_sg(sg);
1679
1680         out_sg->length = out_len;
1681         cpu_to_hw_sg(out_sg);
1682
1683         /* input */
1684         mbuf = sym->m_src;
1685         in_sg = &cf->sg[1];
1686         in_sg->extension = 1;
1687         in_sg->final = 1;
1688         in_len = mbuf->data_len;
1689
1690         sg++;
1691         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
1692
1693         /* 1st seg */
1694         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1695         sg->length = mbuf->data_len;
1696         sg->offset = 0;
1697
1698         /* Successive segs */
1699         mbuf = mbuf->next;
1700         while (mbuf) {
1701                 cpu_to_hw_sg(sg);
1702                 sg++;
1703                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1704                 sg->length = mbuf->data_len;
1705                 sg->offset = 0;
1706                 in_len += sg->length;
1707                 mbuf = mbuf->next;
1708         }
1709         sg->final = 1;
1710         cpu_to_hw_sg(sg);
1711
1712         in_sg->length = in_len;
1713         cpu_to_hw_sg(in_sg);
1714
1715         sym->m_src->packet_type &= ~RTE_PTYPE_L4_MASK;
1716
1717         return cf;
1718 }
1719 #endif
1720
1721 static uint16_t
1722 dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
1723                        uint16_t nb_ops)
1724 {
1725         /* Function to transmit the frames to given device and queuepair */
1726         uint32_t loop;
1727         struct dpaa_sec_qp *dpaa_qp = (struct dpaa_sec_qp *)qp;
1728         uint16_t num_tx = 0;
1729         struct qm_fd fds[DPAA_SEC_BURST], *fd;
1730         uint32_t frames_to_send;
1731         struct rte_crypto_op *op;
1732         struct dpaa_sec_job *cf;
1733         dpaa_sec_session *ses;
1734         uint16_t auth_hdr_len, auth_tail_len;
1735         uint32_t index, flags[DPAA_SEC_BURST] = {0};
1736         struct qman_fq *inq[DPAA_SEC_BURST];
1737
1738         while (nb_ops) {
1739                 frames_to_send = (nb_ops > DPAA_SEC_BURST) ?
1740                                 DPAA_SEC_BURST : nb_ops;
1741                 for (loop = 0; loop < frames_to_send; loop++) {
1742                         op = *(ops++);
1743                         if (op->sym->m_src->seqn != 0) {
1744                                 index = op->sym->m_src->seqn - 1;
1745                                 if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
1746                                         /* QM_EQCR_DCA_IDXMASK = 0x0f */
1747                                         flags[loop] = ((index & 0x0f) << 8);
1748                                         flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
1749                                         DPAA_PER_LCORE_DQRR_SIZE--;
1750                                         DPAA_PER_LCORE_DQRR_HELD &=
1751                                                                 ~(1 << index);
1752                                 }
1753                         }
1754
1755                         switch (op->sess_type) {
1756                         case RTE_CRYPTO_OP_WITH_SESSION:
1757                                 ses = (dpaa_sec_session *)
1758                                         get_sym_session_private_data(
1759                                                         op->sym->session,
1760                                                         cryptodev_driver_id);
1761                                 break;
1762 #ifdef RTE_LIBRTE_SECURITY
1763                         case RTE_CRYPTO_OP_SECURITY_SESSION:
1764                                 ses = (dpaa_sec_session *)
1765                                         get_sec_session_private_data(
1766                                                         op->sym->sec_session);
1767                                 break;
1768 #endif
1769                         default:
1770                                 DPAA_SEC_DP_ERR(
1771                                         "sessionless crypto op not supported");
1772                                 frames_to_send = loop;
1773                                 nb_ops = loop;
1774                                 goto send_pkts;
1775                         }
1776
1777                         if (!ses) {
1778                                 DPAA_SEC_DP_ERR("session not available");
1779                                 frames_to_send = loop;
1780                                 nb_ops = loop;
1781                                 goto send_pkts;
1782                         }
1783
1784                         if (unlikely(!ses->qp[rte_lcore_id() % MAX_DPAA_CORES])) {
1785                                 if (dpaa_sec_attach_sess_q(qp, ses)) {
1786                                         frames_to_send = loop;
1787                                         nb_ops = loop;
1788                                         goto send_pkts;
1789                                 }
1790                         } else if (unlikely(ses->qp[rte_lcore_id() %
1791                                                 MAX_DPAA_CORES] != qp)) {
1792                                 DPAA_SEC_DP_ERR("Old:sess->qp = %p"
1793                                         " New qp = %p\n",
1794                                         ses->qp[rte_lcore_id() %
1795                                         MAX_DPAA_CORES], qp);
1796                                 frames_to_send = loop;
1797                                 nb_ops = loop;
1798                                 goto send_pkts;
1799                         }
1800
1801                         auth_hdr_len = op->sym->auth.data.length -
1802                                                 op->sym->cipher.data.length;
1803                         auth_tail_len = 0;
1804
1805                         if (rte_pktmbuf_is_contiguous(op->sym->m_src) &&
1806                                   ((op->sym->m_dst == NULL) ||
1807                                    rte_pktmbuf_is_contiguous(op->sym->m_dst))) {
1808                                 switch (ses->ctxt) {
1809 #ifdef RTE_LIBRTE_SECURITY
1810                                 case DPAA_SEC_PDCP:
1811                                 case DPAA_SEC_IPSEC:
1812                                         cf = build_proto(op, ses);
1813                                         break;
1814 #endif
1815                                 case DPAA_SEC_AUTH:
1816                                         cf = build_auth_only(op, ses);
1817                                         break;
1818                                 case DPAA_SEC_CIPHER:
1819                                         cf = build_cipher_only(op, ses);
1820                                         break;
1821                                 case DPAA_SEC_AEAD:
1822                                         cf = build_cipher_auth_gcm(op, ses);
1823                                         auth_hdr_len = ses->auth_only_len;
1824                                         break;
1825                                 case DPAA_SEC_CIPHER_HASH:
1826                                         auth_hdr_len =
1827                                                 op->sym->cipher.data.offset
1828                                                 - op->sym->auth.data.offset;
1829                                         auth_tail_len =
1830                                                 op->sym->auth.data.length
1831                                                 - op->sym->cipher.data.length
1832                                                 - auth_hdr_len;
1833                                         cf = build_cipher_auth(op, ses);
1834                                         break;
1835                                 default:
1836                                         DPAA_SEC_DP_ERR("not supported ops");
1837                                         frames_to_send = loop;
1838                                         nb_ops = loop;
1839                                         goto send_pkts;
1840                                 }
1841                         } else {
1842                                 switch (ses->ctxt) {
1843 #ifdef RTE_LIBRTE_SECURITY
1844                                 case DPAA_SEC_PDCP:
1845                                 case DPAA_SEC_IPSEC:
1846                                         cf = build_proto_sg(op, ses);
1847                                         break;
1848 #endif
1849                                 case DPAA_SEC_AUTH:
1850                                         cf = build_auth_only_sg(op, ses);
1851                                         break;
1852                                 case DPAA_SEC_CIPHER:
1853                                         cf = build_cipher_only_sg(op, ses);
1854                                         break;
1855                                 case DPAA_SEC_AEAD:
1856                                         cf = build_cipher_auth_gcm_sg(op, ses);
1857                                         auth_hdr_len = ses->auth_only_len;
1858                                         break;
1859                                 case DPAA_SEC_CIPHER_HASH:
1860                                         auth_hdr_len =
1861                                                 op->sym->cipher.data.offset
1862                                                 - op->sym->auth.data.offset;
1863                                         auth_tail_len =
1864                                                 op->sym->auth.data.length
1865                                                 - op->sym->cipher.data.length
1866                                                 - auth_hdr_len;
1867                                         cf = build_cipher_auth_sg(op, ses);
1868                                         break;
1869                                 default:
1870                                         DPAA_SEC_DP_ERR("not supported ops");
1871                                         frames_to_send = loop;
1872                                         nb_ops = loop;
1873                                         goto send_pkts;
1874                                 }
1875                         }
1876                         if (unlikely(!cf)) {
1877                                 frames_to_send = loop;
1878                                 nb_ops = loop;
1879                                 goto send_pkts;
1880                         }
1881
1882                         fd = &fds[loop];
1883                         inq[loop] = ses->inq[rte_lcore_id() % MAX_DPAA_CORES];
1884                         fd->opaque_addr = 0;
1885                         fd->cmd = 0;
1886                         qm_fd_addr_set64(fd, dpaa_mem_vtop(cf->sg));
1887                         fd->_format1 = qm_fd_compound;
1888                         fd->length29 = 2 * sizeof(struct qm_sg_entry);
1889
1890                         /* Auth_only_len is set as 0 in descriptor and it is
1891                          * overwritten here in the fd.cmd which will update
1892                          * the DPOVRD reg.
1893                          */
1894                         if (auth_hdr_len || auth_tail_len) {
1895                                 fd->cmd = 0x80000000;
1896                                 fd->cmd |=
1897                                         ((auth_tail_len << 16) | auth_hdr_len);
1898                         }
1899
1900 #ifdef RTE_LIBRTE_SECURITY
1901                         /* In case of PDCP, per packet HFN is stored in
1902                          * mbuf priv after sym_op.
1903                          */
1904                         if ((ses->ctxt == DPAA_SEC_PDCP) && ses->pdcp.hfn_ovd) {
1905                                 fd->cmd = 0x80000000 |
1906                                         *((uint32_t *)((uint8_t *)op +
1907                                         ses->pdcp.hfn_ovd_offset));
1908                                 DPAA_SEC_DP_DEBUG("Per packet HFN: %x, ovd:%u\n",
1909                                         *((uint32_t *)((uint8_t *)op +
1910                                         ses->pdcp.hfn_ovd_offset)),
1911                                         ses->pdcp.hfn_ovd);
1912                         }
1913 #endif
1914                 }
1915 send_pkts:
1916                 loop = 0;
1917                 while (loop < frames_to_send) {
1918                         loop += qman_enqueue_multi_fq(&inq[loop], &fds[loop],
1919                                         &flags[loop], frames_to_send - loop);
1920                 }
1921                 nb_ops -= frames_to_send;
1922                 num_tx += frames_to_send;
1923         }
1924
1925         dpaa_qp->tx_pkts += num_tx;
1926         dpaa_qp->tx_errs += nb_ops - num_tx;
1927
1928         return num_tx;
1929 }
1930
1931 static uint16_t
1932 dpaa_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
1933                        uint16_t nb_ops)
1934 {
1935         uint16_t num_rx;
1936         struct dpaa_sec_qp *dpaa_qp = (struct dpaa_sec_qp *)qp;
1937
1938         num_rx = dpaa_sec_deq(dpaa_qp, ops, nb_ops);
1939
1940         dpaa_qp->rx_pkts += num_rx;
1941         dpaa_qp->rx_errs += nb_ops - num_rx;
1942
1943         DPAA_SEC_DP_DEBUG("SEC Received %d Packets\n", num_rx);
1944
1945         return num_rx;
1946 }
1947
1948 /** Release queue pair */
1949 static int
1950 dpaa_sec_queue_pair_release(struct rte_cryptodev *dev,
1951                             uint16_t qp_id)
1952 {
1953         struct dpaa_sec_dev_private *internals;
1954         struct dpaa_sec_qp *qp = NULL;
1955
1956         PMD_INIT_FUNC_TRACE();
1957
1958         DPAA_SEC_DEBUG("dev =%p, queue =%d", dev, qp_id);
1959
1960         internals = dev->data->dev_private;
1961         if (qp_id >= internals->max_nb_queue_pairs) {
1962                 DPAA_SEC_ERR("Max supported qpid %d",
1963                              internals->max_nb_queue_pairs);
1964                 return -EINVAL;
1965         }
1966
1967         qp = &internals->qps[qp_id];
1968         rte_mempool_free(qp->ctx_pool);
1969         qp->internals = NULL;
1970         dev->data->queue_pairs[qp_id] = NULL;
1971
1972         return 0;
1973 }
1974
1975 /** Setup a queue pair */
1976 static int
1977 dpaa_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1978                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
1979                 __rte_unused int socket_id)
1980 {
1981         struct dpaa_sec_dev_private *internals;
1982         struct dpaa_sec_qp *qp = NULL;
1983         char str[20];
1984
1985         DPAA_SEC_DEBUG("dev =%p, queue =%d, conf =%p", dev, qp_id, qp_conf);
1986
1987         internals = dev->data->dev_private;
1988         if (qp_id >= internals->max_nb_queue_pairs) {
1989                 DPAA_SEC_ERR("Max supported qpid %d",
1990                              internals->max_nb_queue_pairs);
1991                 return -EINVAL;
1992         }
1993
1994         qp = &internals->qps[qp_id];
1995         qp->internals = internals;
1996         snprintf(str, sizeof(str), "ctx_pool_d%d_qp%d",
1997                         dev->data->dev_id, qp_id);
1998         if (!qp->ctx_pool) {
1999                 qp->ctx_pool = rte_mempool_create((const char *)str,
2000                                                         CTX_POOL_NUM_BUFS,
2001                                                         CTX_POOL_BUF_SIZE,
2002                                                         CTX_POOL_CACHE_SIZE, 0,
2003                                                         NULL, NULL, NULL, NULL,
2004                                                         SOCKET_ID_ANY, 0);
2005                 if (!qp->ctx_pool) {
2006                         DPAA_SEC_ERR("%s create failed\n", str);
2007                         return -ENOMEM;
2008                 }
2009         } else
2010                 DPAA_SEC_INFO("mempool already created for dev_id : %d, qp: %d",
2011                                 dev->data->dev_id, qp_id);
2012         dev->data->queue_pairs[qp_id] = qp;
2013
2014         return 0;
2015 }
2016
2017 /** Return the number of allocated queue pairs */
2018 static uint32_t
2019 dpaa_sec_queue_pair_count(struct rte_cryptodev *dev)
2020 {
2021         PMD_INIT_FUNC_TRACE();
2022
2023         return dev->data->nb_queue_pairs;
2024 }
2025
2026 /** Returns the size of session structure */
2027 static unsigned int
2028 dpaa_sec_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
2029 {
2030         PMD_INIT_FUNC_TRACE();
2031
2032         return sizeof(dpaa_sec_session);
2033 }
2034
2035 static int
2036 dpaa_sec_cipher_init(struct rte_cryptodev *dev __rte_unused,
2037                      struct rte_crypto_sym_xform *xform,
2038                      dpaa_sec_session *session)
2039 {
2040         session->ctxt = DPAA_SEC_CIPHER;
2041         session->cipher_alg = xform->cipher.algo;
2042         session->iv.length = xform->cipher.iv.length;
2043         session->iv.offset = xform->cipher.iv.offset;
2044         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
2045                                                RTE_CACHE_LINE_SIZE);
2046         if (session->cipher_key.data == NULL && xform->cipher.key.length > 0) {
2047                 DPAA_SEC_ERR("No Memory for cipher key");
2048                 return -ENOMEM;
2049         }
2050         session->cipher_key.length = xform->cipher.key.length;
2051
2052         memcpy(session->cipher_key.data, xform->cipher.key.data,
2053                xform->cipher.key.length);
2054         switch (xform->cipher.algo) {
2055         case RTE_CRYPTO_CIPHER_AES_CBC:
2056                 session->cipher_key.alg = OP_ALG_ALGSEL_AES;
2057                 session->cipher_key.algmode = OP_ALG_AAI_CBC;
2058                 break;
2059         case RTE_CRYPTO_CIPHER_3DES_CBC:
2060                 session->cipher_key.alg = OP_ALG_ALGSEL_3DES;
2061                 session->cipher_key.algmode = OP_ALG_AAI_CBC;
2062                 break;
2063         case RTE_CRYPTO_CIPHER_AES_CTR:
2064                 session->cipher_key.alg = OP_ALG_ALGSEL_AES;
2065                 session->cipher_key.algmode = OP_ALG_AAI_CTR;
2066                 break;
2067         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
2068                 session->cipher_key.alg = OP_ALG_ALGSEL_SNOW_F8;
2069                 break;
2070         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
2071                 session->cipher_key.alg = OP_ALG_ALGSEL_ZUCE;
2072                 break;
2073         default:
2074                 DPAA_SEC_ERR("Crypto: Undefined Cipher specified %u",
2075                               xform->cipher.algo);
2076                 rte_free(session->cipher_key.data);
2077                 return -1;
2078         }
2079         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
2080                         DIR_ENC : DIR_DEC;
2081
2082         return 0;
2083 }
2084
2085 static int
2086 dpaa_sec_auth_init(struct rte_cryptodev *dev __rte_unused,
2087                    struct rte_crypto_sym_xform *xform,
2088                    dpaa_sec_session *session)
2089 {
2090         session->ctxt = DPAA_SEC_AUTH;
2091         session->auth_alg = xform->auth.algo;
2092         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
2093                                              RTE_CACHE_LINE_SIZE);
2094         if (session->auth_key.data == NULL && xform->auth.key.length > 0) {
2095                 DPAA_SEC_ERR("No Memory for auth key");
2096                 return -ENOMEM;
2097         }
2098         session->auth_key.length = xform->auth.key.length;
2099         session->digest_length = xform->auth.digest_length;
2100         if (session->cipher_alg == RTE_CRYPTO_CIPHER_NULL) {
2101                 session->iv.offset = xform->auth.iv.offset;
2102                 session->iv.length = xform->auth.iv.length;
2103         }
2104
2105         memcpy(session->auth_key.data, xform->auth.key.data,
2106                xform->auth.key.length);
2107
2108         switch (xform->auth.algo) {
2109         case RTE_CRYPTO_AUTH_SHA1_HMAC:
2110                 session->auth_key.alg = OP_ALG_ALGSEL_SHA1;
2111                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2112                 break;
2113         case RTE_CRYPTO_AUTH_MD5_HMAC:
2114                 session->auth_key.alg = OP_ALG_ALGSEL_MD5;
2115                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2116                 break;
2117         case RTE_CRYPTO_AUTH_SHA224_HMAC:
2118                 session->auth_key.alg = OP_ALG_ALGSEL_SHA224;
2119                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2120                 break;
2121         case RTE_CRYPTO_AUTH_SHA256_HMAC:
2122                 session->auth_key.alg = OP_ALG_ALGSEL_SHA256;
2123                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2124                 break;
2125         case RTE_CRYPTO_AUTH_SHA384_HMAC:
2126                 session->auth_key.alg = OP_ALG_ALGSEL_SHA384;
2127                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2128                 break;
2129         case RTE_CRYPTO_AUTH_SHA512_HMAC:
2130                 session->auth_key.alg = OP_ALG_ALGSEL_SHA512;
2131                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2132                 break;
2133         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
2134                 session->auth_key.alg = OP_ALG_ALGSEL_SNOW_F9;
2135                 session->auth_key.algmode = OP_ALG_AAI_F9;
2136                 break;
2137         case RTE_CRYPTO_AUTH_ZUC_EIA3:
2138                 session->auth_key.alg = OP_ALG_ALGSEL_ZUCA;
2139                 session->auth_key.algmode = OP_ALG_AAI_F9;
2140                 break;
2141         default:
2142                 DPAA_SEC_ERR("Crypto: Unsupported Auth specified %u",
2143                               xform->auth.algo);
2144                 rte_free(session->auth_key.data);
2145                 return -1;
2146         }
2147
2148         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
2149                         DIR_ENC : DIR_DEC;
2150
2151         return 0;
2152 }
2153
2154 static int
2155 dpaa_sec_chain_init(struct rte_cryptodev *dev __rte_unused,
2156                    struct rte_crypto_sym_xform *xform,
2157                    dpaa_sec_session *session)
2158 {
2159
2160         struct rte_crypto_cipher_xform *cipher_xform;
2161         struct rte_crypto_auth_xform *auth_xform;
2162
2163         session->ctxt = DPAA_SEC_CIPHER_HASH;
2164         if (session->auth_cipher_text) {
2165                 cipher_xform = &xform->cipher;
2166                 auth_xform = &xform->next->auth;
2167         } else {
2168                 cipher_xform = &xform->next->cipher;
2169                 auth_xform = &xform->auth;
2170         }
2171
2172         /* Set IV parameters */
2173         session->iv.offset = cipher_xform->iv.offset;
2174         session->iv.length = cipher_xform->iv.length;
2175
2176         session->cipher_key.data = rte_zmalloc(NULL, cipher_xform->key.length,
2177                                                RTE_CACHE_LINE_SIZE);
2178         if (session->cipher_key.data == NULL && cipher_xform->key.length > 0) {
2179                 DPAA_SEC_ERR("No Memory for cipher key");
2180                 return -1;
2181         }
2182         session->cipher_key.length = cipher_xform->key.length;
2183         session->auth_key.data = rte_zmalloc(NULL, auth_xform->key.length,
2184                                              RTE_CACHE_LINE_SIZE);
2185         if (session->auth_key.data == NULL && auth_xform->key.length > 0) {
2186                 DPAA_SEC_ERR("No Memory for auth key");
2187                 rte_free(session->cipher_key.data);
2188                 return -ENOMEM;
2189         }
2190         session->auth_key.length = auth_xform->key.length;
2191         memcpy(session->cipher_key.data, cipher_xform->key.data,
2192                cipher_xform->key.length);
2193         memcpy(session->auth_key.data, auth_xform->key.data,
2194                auth_xform->key.length);
2195
2196         session->digest_length = auth_xform->digest_length;
2197         session->auth_alg = auth_xform->algo;
2198
2199         switch (auth_xform->algo) {
2200         case RTE_CRYPTO_AUTH_SHA1_HMAC:
2201                 session->auth_key.alg = OP_ALG_ALGSEL_SHA1;
2202                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2203                 break;
2204         case RTE_CRYPTO_AUTH_MD5_HMAC:
2205                 session->auth_key.alg = OP_ALG_ALGSEL_MD5;
2206                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2207                 break;
2208         case RTE_CRYPTO_AUTH_SHA224_HMAC:
2209                 session->auth_key.alg = OP_ALG_ALGSEL_SHA224;
2210                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2211                 break;
2212         case RTE_CRYPTO_AUTH_SHA256_HMAC:
2213                 session->auth_key.alg = OP_ALG_ALGSEL_SHA256;
2214                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2215                 break;
2216         case RTE_CRYPTO_AUTH_SHA384_HMAC:
2217                 session->auth_key.alg = OP_ALG_ALGSEL_SHA384;
2218                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2219                 break;
2220         case RTE_CRYPTO_AUTH_SHA512_HMAC:
2221                 session->auth_key.alg = OP_ALG_ALGSEL_SHA512;
2222                 session->auth_key.algmode = OP_ALG_AAI_HMAC;
2223                 break;
2224         default:
2225                 DPAA_SEC_ERR("Crypto: Unsupported Auth specified %u",
2226                               auth_xform->algo);
2227                 goto error_out;
2228         }
2229
2230         session->cipher_alg = cipher_xform->algo;
2231
2232         switch (cipher_xform->algo) {
2233         case RTE_CRYPTO_CIPHER_AES_CBC:
2234                 session->cipher_key.alg = OP_ALG_ALGSEL_AES;
2235                 session->cipher_key.algmode = OP_ALG_AAI_CBC;
2236                 break;
2237         case RTE_CRYPTO_CIPHER_3DES_CBC:
2238                 session->cipher_key.alg = OP_ALG_ALGSEL_3DES;
2239                 session->cipher_key.algmode = OP_ALG_AAI_CBC;
2240                 break;
2241         case RTE_CRYPTO_CIPHER_AES_CTR:
2242                 session->cipher_key.alg = OP_ALG_ALGSEL_AES;
2243                 session->cipher_key.algmode = OP_ALG_AAI_CTR;
2244                 break;
2245         default:
2246                 DPAA_SEC_ERR("Crypto: Undefined Cipher specified %u",
2247                               cipher_xform->algo);
2248                 goto error_out;
2249         }
2250         session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
2251                                 DIR_ENC : DIR_DEC;
2252         return 0;
2253
2254 error_out:
2255         rte_free(session->cipher_key.data);
2256         rte_free(session->auth_key.data);
2257         return -1;
2258 }
2259
2260 static int
2261 dpaa_sec_aead_init(struct rte_cryptodev *dev __rte_unused,
2262                    struct rte_crypto_sym_xform *xform,
2263                    dpaa_sec_session *session)
2264 {
2265         session->aead_alg = xform->aead.algo;
2266         session->ctxt = DPAA_SEC_AEAD;
2267         session->iv.length = xform->aead.iv.length;
2268         session->iv.offset = xform->aead.iv.offset;
2269         session->auth_only_len = xform->aead.aad_length;
2270         session->aead_key.data = rte_zmalloc(NULL, xform->aead.key.length,
2271                                              RTE_CACHE_LINE_SIZE);
2272         if (session->aead_key.data == NULL && xform->aead.key.length > 0) {
2273                 DPAA_SEC_ERR("No Memory for aead key\n");
2274                 return -ENOMEM;
2275         }
2276         session->aead_key.length = xform->aead.key.length;
2277         session->digest_length = xform->aead.digest_length;
2278
2279         memcpy(session->aead_key.data, xform->aead.key.data,
2280                xform->aead.key.length);
2281
2282         switch (session->aead_alg) {
2283         case RTE_CRYPTO_AEAD_AES_GCM:
2284                 session->aead_key.alg = OP_ALG_ALGSEL_AES;
2285                 session->aead_key.algmode = OP_ALG_AAI_GCM;
2286                 break;
2287         default:
2288                 DPAA_SEC_ERR("unsupported AEAD alg %d", session->aead_alg);
2289                 rte_free(session->aead_key.data);
2290                 return -ENOMEM;
2291         }
2292
2293         session->dir = (xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
2294                         DIR_ENC : DIR_DEC;
2295
2296         return 0;
2297 }
2298
2299 static struct qman_fq *
2300 dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
2301 {
2302         unsigned int i;
2303
2304         for (i = 0; i < qi->max_nb_sessions * MAX_DPAA_CORES; i++) {
2305                 if (qi->inq_attach[i] == 0) {
2306                         qi->inq_attach[i] = 1;
2307                         return &qi->inq[i];
2308                 }
2309         }
2310         DPAA_SEC_WARN("All session in use %u", qi->max_nb_sessions);
2311
2312         return NULL;
2313 }
2314
2315 static int
2316 dpaa_sec_detach_rxq(struct dpaa_sec_dev_private *qi, struct qman_fq *fq)
2317 {
2318         unsigned int i;
2319
2320         for (i = 0; i < qi->max_nb_sessions; i++) {
2321                 if (&qi->inq[i] == fq) {
2322                         qman_retire_fq(fq, NULL);
2323                         qman_oos_fq(fq);
2324                         qi->inq_attach[i] = 0;
2325                         return 0;
2326                 }
2327         }
2328         return -1;
2329 }
2330
2331 static int
2332 dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess)
2333 {
2334         int ret;
2335
2336         sess->qp[rte_lcore_id() % MAX_DPAA_CORES] = qp;
2337         ret = dpaa_sec_prep_cdb(sess);
2338         if (ret) {
2339                 DPAA_SEC_ERR("Unable to prepare sec cdb");
2340                 return -1;
2341         }
2342         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
2343                 ret = rte_dpaa_portal_init((void *)0);
2344                 if (ret) {
2345                         DPAA_SEC_ERR("Failure in affining portal");
2346                         return ret;
2347                 }
2348         }
2349         ret = dpaa_sec_init_rx(sess->inq[rte_lcore_id() % MAX_DPAA_CORES],
2350                                dpaa_mem_vtop(&sess->cdb),
2351                                qman_fq_fqid(&qp->outq));
2352         if (ret)
2353                 DPAA_SEC_ERR("Unable to init sec queue");
2354
2355         return ret;
2356 }
2357
2358 static int
2359 dpaa_sec_set_session_parameters(struct rte_cryptodev *dev,
2360                             struct rte_crypto_sym_xform *xform, void *sess)
2361 {
2362         struct dpaa_sec_dev_private *internals = dev->data->dev_private;
2363         dpaa_sec_session *session = sess;
2364         uint32_t i;
2365         int ret;
2366
2367         PMD_INIT_FUNC_TRACE();
2368
2369         if (unlikely(sess == NULL)) {
2370                 DPAA_SEC_ERR("invalid session struct");
2371                 return -EINVAL;
2372         }
2373         memset(session, 0, sizeof(dpaa_sec_session));
2374
2375         /* Default IV length = 0 */
2376         session->iv.length = 0;
2377
2378         /* Cipher Only */
2379         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
2380                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
2381                 ret = dpaa_sec_cipher_init(dev, xform, session);
2382
2383         /* Authentication Only */
2384         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
2385                    xform->next == NULL) {
2386                 session->cipher_alg = RTE_CRYPTO_CIPHER_NULL;
2387                 session->ctxt = DPAA_SEC_AUTH;
2388                 ret = dpaa_sec_auth_init(dev, xform, session);
2389
2390         /* Cipher then Authenticate */
2391         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
2392                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
2393                 if (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
2394                         session->auth_cipher_text = 1;
2395                         if (xform->cipher.algo == RTE_CRYPTO_CIPHER_NULL)
2396                                 ret = dpaa_sec_auth_init(dev, xform, session);
2397                         else if (xform->next->auth.algo == RTE_CRYPTO_AUTH_NULL)
2398                                 ret = dpaa_sec_cipher_init(dev, xform, session);
2399                         else
2400                                 ret = dpaa_sec_chain_init(dev, xform, session);
2401                 } else {
2402                         DPAA_SEC_ERR("Not supported: Auth then Cipher");
2403                         return -EINVAL;
2404                 }
2405         /* Authenticate then Cipher */
2406         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
2407                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
2408                 if (xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
2409                         session->auth_cipher_text = 0;
2410                         if (xform->auth.algo == RTE_CRYPTO_AUTH_NULL)
2411                                 ret = dpaa_sec_cipher_init(dev, xform, session);
2412                         else if (xform->next->cipher.algo
2413                                         == RTE_CRYPTO_CIPHER_NULL)
2414                                 ret = dpaa_sec_auth_init(dev, xform, session);
2415                         else
2416                                 ret = dpaa_sec_chain_init(dev, xform, session);
2417                 } else {
2418                         DPAA_SEC_ERR("Not supported: Auth then Cipher");
2419                         return -EINVAL;
2420                 }
2421
2422         /* AEAD operation for AES-GCM kind of Algorithms */
2423         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
2424                    xform->next == NULL) {
2425                 ret = dpaa_sec_aead_init(dev, xform, session);
2426
2427         } else {
2428                 DPAA_SEC_ERR("Invalid crypto type");
2429                 return -EINVAL;
2430         }
2431         if (ret) {
2432                 DPAA_SEC_ERR("unable to init session");
2433                 goto err1;
2434         }
2435
2436         rte_spinlock_lock(&internals->lock);
2437         for (i = 0; i < MAX_DPAA_CORES; i++) {
2438                 session->inq[i] = dpaa_sec_attach_rxq(internals);
2439                 if (session->inq[i] == NULL) {
2440                         DPAA_SEC_ERR("unable to attach sec queue");
2441                         rte_spinlock_unlock(&internals->lock);
2442                         goto err1;
2443                 }
2444         }
2445         rte_spinlock_unlock(&internals->lock);
2446
2447         return 0;
2448
2449 err1:
2450         rte_free(session->cipher_key.data);
2451         rte_free(session->auth_key.data);
2452         memset(session, 0, sizeof(dpaa_sec_session));
2453
2454         return -EINVAL;
2455 }
2456
2457 static int
2458 dpaa_sec_sym_session_configure(struct rte_cryptodev *dev,
2459                 struct rte_crypto_sym_xform *xform,
2460                 struct rte_cryptodev_sym_session *sess,
2461                 struct rte_mempool *mempool)
2462 {
2463         void *sess_private_data;
2464         int ret;
2465
2466         PMD_INIT_FUNC_TRACE();
2467
2468         if (rte_mempool_get(mempool, &sess_private_data)) {
2469                 DPAA_SEC_ERR("Couldn't get object from session mempool");
2470                 return -ENOMEM;
2471         }
2472
2473         ret = dpaa_sec_set_session_parameters(dev, xform, sess_private_data);
2474         if (ret != 0) {
2475                 DPAA_SEC_ERR("failed to configure session parameters");
2476
2477                 /* Return session to mempool */
2478                 rte_mempool_put(mempool, sess_private_data);
2479                 return ret;
2480         }
2481
2482         set_sym_session_private_data(sess, dev->driver_id,
2483                         sess_private_data);
2484
2485
2486         return 0;
2487 }
2488
2489 static inline void
2490 free_session_memory(struct rte_cryptodev *dev, dpaa_sec_session *s)
2491 {
2492         struct dpaa_sec_dev_private *qi = dev->data->dev_private;
2493         struct rte_mempool *sess_mp = rte_mempool_from_obj((void *)s);
2494         uint8_t i;
2495
2496         for (i = 0; i < MAX_DPAA_CORES; i++) {
2497                 if (s->inq[i])
2498                         dpaa_sec_detach_rxq(qi, s->inq[i]);
2499                 s->inq[i] = NULL;
2500                 s->qp[i] = NULL;
2501         }
2502         rte_free(s->cipher_key.data);
2503         rte_free(s->auth_key.data);
2504         memset(s, 0, sizeof(dpaa_sec_session));
2505         rte_mempool_put(sess_mp, (void *)s);
2506 }
2507
2508 /** Clear the memory of session so it doesn't leave key material behind */
2509 static void
2510 dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
2511                 struct rte_cryptodev_sym_session *sess)
2512 {
2513         PMD_INIT_FUNC_TRACE();
2514         uint8_t index = dev->driver_id;
2515         void *sess_priv = get_sym_session_private_data(sess, index);
2516         dpaa_sec_session *s = (dpaa_sec_session *)sess_priv;
2517
2518         if (sess_priv) {
2519                 free_session_memory(dev, s);
2520                 set_sym_session_private_data(sess, index, NULL);
2521         }
2522 }
2523
2524 #ifdef RTE_LIBRTE_SECURITY
2525 static int
2526 dpaa_sec_set_ipsec_session(__rte_unused struct rte_cryptodev *dev,
2527                            struct rte_security_session_conf *conf,
2528                            void *sess)
2529 {
2530         struct dpaa_sec_dev_private *internals = dev->data->dev_private;
2531         struct rte_security_ipsec_xform *ipsec_xform = &conf->ipsec;
2532         struct rte_crypto_auth_xform *auth_xform = NULL;
2533         struct rte_crypto_cipher_xform *cipher_xform = NULL;
2534         dpaa_sec_session *session = (dpaa_sec_session *)sess;
2535         uint32_t i;
2536
2537         PMD_INIT_FUNC_TRACE();
2538
2539         memset(session, 0, sizeof(dpaa_sec_session));
2540         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
2541                 cipher_xform = &conf->crypto_xform->cipher;
2542                 if (conf->crypto_xform->next)
2543                         auth_xform = &conf->crypto_xform->next->auth;
2544         } else {
2545                 auth_xform = &conf->crypto_xform->auth;
2546                 if (conf->crypto_xform->next)
2547                         cipher_xform = &conf->crypto_xform->next->cipher;
2548         }
2549         session->proto_alg = conf->protocol;
2550         session->ctxt = DPAA_SEC_IPSEC;
2551
2552         if (cipher_xform && cipher_xform->algo != RTE_CRYPTO_CIPHER_NULL) {
2553                 session->cipher_key.data = rte_zmalloc(NULL,
2554                                                        cipher_xform->key.length,
2555                                                        RTE_CACHE_LINE_SIZE);
2556                 if (session->cipher_key.data == NULL &&
2557                                 cipher_xform->key.length > 0) {
2558                         DPAA_SEC_ERR("No Memory for cipher key");
2559                         return -ENOMEM;
2560                 }
2561                 memcpy(session->cipher_key.data, cipher_xform->key.data,
2562                                 cipher_xform->key.length);
2563                 session->cipher_key.length = cipher_xform->key.length;
2564
2565                 switch (cipher_xform->algo) {
2566                 case RTE_CRYPTO_CIPHER_NULL:
2567                         session->cipher_key.alg = OP_PCL_IPSEC_NULL;
2568                         break;
2569                 case RTE_CRYPTO_CIPHER_AES_CBC:
2570                         session->cipher_key.alg = OP_PCL_IPSEC_AES_CBC;
2571                         session->cipher_key.algmode = OP_ALG_AAI_CBC;
2572                         break;
2573                 case RTE_CRYPTO_CIPHER_3DES_CBC:
2574                         session->cipher_key.alg = OP_PCL_IPSEC_3DES;
2575                         session->cipher_key.algmode = OP_ALG_AAI_CBC;
2576                         break;
2577                 case RTE_CRYPTO_CIPHER_AES_CTR:
2578                         session->cipher_key.alg = OP_PCL_IPSEC_AES_CTR;
2579                         session->cipher_key.algmode = OP_ALG_AAI_CTR;
2580                         break;
2581                 default:
2582                         DPAA_SEC_ERR("Crypto: Unsupported Cipher alg %u",
2583                                 cipher_xform->algo);
2584                         goto out;
2585                 }
2586                 session->cipher_alg = cipher_xform->algo;
2587         } else {
2588                 session->cipher_key.data = NULL;
2589                 session->cipher_key.length = 0;
2590                 session->cipher_alg = RTE_CRYPTO_CIPHER_NULL;
2591         }
2592
2593         if (auth_xform && auth_xform->algo != RTE_CRYPTO_AUTH_NULL) {
2594                 session->auth_key.data = rte_zmalloc(NULL,
2595                                                 auth_xform->key.length,
2596                                                 RTE_CACHE_LINE_SIZE);
2597                 if (session->auth_key.data == NULL &&
2598                                 auth_xform->key.length > 0) {
2599                         DPAA_SEC_ERR("No Memory for auth key");
2600                         rte_free(session->cipher_key.data);
2601                         return -ENOMEM;
2602                 }
2603                 memcpy(session->auth_key.data, auth_xform->key.data,
2604                                 auth_xform->key.length);
2605                 session->auth_key.length = auth_xform->key.length;
2606
2607                 switch (auth_xform->algo) {
2608                 case RTE_CRYPTO_AUTH_NULL:
2609                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_NULL;
2610                         session->digest_length = 0;
2611                         break;
2612                 case RTE_CRYPTO_AUTH_MD5_HMAC:
2613                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_MD5_96;
2614                         session->auth_key.algmode = OP_ALG_AAI_HMAC;
2615                         break;
2616                 case RTE_CRYPTO_AUTH_SHA1_HMAC:
2617                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_SHA1_96;
2618                         session->auth_key.algmode = OP_ALG_AAI_HMAC;
2619                         break;
2620                 case RTE_CRYPTO_AUTH_SHA224_HMAC:
2621                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_SHA1_160;
2622                         session->auth_key.algmode = OP_ALG_AAI_HMAC;
2623                         break;
2624                 case RTE_CRYPTO_AUTH_SHA256_HMAC:
2625                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_SHA2_256_128;
2626                         session->auth_key.algmode = OP_ALG_AAI_HMAC;
2627                         break;
2628                 case RTE_CRYPTO_AUTH_SHA384_HMAC:
2629                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_SHA2_384_192;
2630                         session->auth_key.algmode = OP_ALG_AAI_HMAC;
2631                         break;
2632                 case RTE_CRYPTO_AUTH_SHA512_HMAC:
2633                         session->auth_key.alg = OP_PCL_IPSEC_HMAC_SHA2_512_256;
2634                         session->auth_key.algmode = OP_ALG_AAI_HMAC;
2635                         break;
2636                 default:
2637                         DPAA_SEC_ERR("Crypto: Unsupported auth alg %u",
2638                                 auth_xform->algo);
2639                         goto out;
2640                 }
2641                 session->auth_alg = auth_xform->algo;
2642         } else {
2643                 session->auth_key.data = NULL;
2644                 session->auth_key.length = 0;
2645                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
2646         }
2647
2648         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
2649                 if (ipsec_xform->tunnel.type ==
2650                                 RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
2651                         memset(&session->encap_pdb, 0,
2652                                 sizeof(struct ipsec_encap_pdb) +
2653                                 sizeof(session->ip4_hdr));
2654                         session->ip4_hdr.ip_v = IPVERSION;
2655                         session->ip4_hdr.ip_hl = 5;
2656                         session->ip4_hdr.ip_len = rte_cpu_to_be_16(
2657                                                 sizeof(session->ip4_hdr));
2658                         session->ip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;
2659                         session->ip4_hdr.ip_id = 0;
2660                         session->ip4_hdr.ip_off = 0;
2661                         session->ip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;
2662                         session->ip4_hdr.ip_p = (ipsec_xform->proto ==
2663                                         RTE_SECURITY_IPSEC_SA_PROTO_ESP) ?
2664                                         IPPROTO_ESP : IPPROTO_AH;
2665                         session->ip4_hdr.ip_sum = 0;
2666                         session->ip4_hdr.ip_src =
2667                                         ipsec_xform->tunnel.ipv4.src_ip;
2668                         session->ip4_hdr.ip_dst =
2669                                         ipsec_xform->tunnel.ipv4.dst_ip;
2670                         session->ip4_hdr.ip_sum = calc_chksum((uint16_t *)
2671                                                 (void *)&session->ip4_hdr,
2672                                                 sizeof(struct ip));
2673                         session->encap_pdb.ip_hdr_len = sizeof(struct ip);
2674                 } else if (ipsec_xform->tunnel.type ==
2675                                 RTE_SECURITY_IPSEC_TUNNEL_IPV6) {
2676                         memset(&session->encap_pdb, 0,
2677                                 sizeof(struct ipsec_encap_pdb) +
2678                                 sizeof(session->ip6_hdr));
2679                         session->ip6_hdr.vtc_flow = rte_cpu_to_be_32(
2680                                 DPAA_IPv6_DEFAULT_VTC_FLOW |
2681                                 ((ipsec_xform->tunnel.ipv6.dscp <<
2682                                         RTE_IPV6_HDR_TC_SHIFT) &
2683                                         RTE_IPV6_HDR_TC_MASK) |
2684                                 ((ipsec_xform->tunnel.ipv6.flabel <<
2685                                         RTE_IPV6_HDR_FL_SHIFT) &
2686                                         RTE_IPV6_HDR_FL_MASK));
2687                         /* Payload length will be updated by HW */
2688                         session->ip6_hdr.payload_len = 0;
2689                         session->ip6_hdr.hop_limits =
2690                                         ipsec_xform->tunnel.ipv6.hlimit;
2691                         session->ip6_hdr.proto = (ipsec_xform->proto ==
2692                                         RTE_SECURITY_IPSEC_SA_PROTO_ESP) ?
2693                                         IPPROTO_ESP : IPPROTO_AH;
2694                         memcpy(&session->ip6_hdr.src_addr,
2695                                         &ipsec_xform->tunnel.ipv6.src_addr, 16);
2696                         memcpy(&session->ip6_hdr.dst_addr,
2697                                         &ipsec_xform->tunnel.ipv6.dst_addr, 16);
2698                         session->encap_pdb.ip_hdr_len =
2699                                                 sizeof(struct rte_ipv6_hdr);
2700                 }
2701                 session->encap_pdb.options =
2702                         (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |
2703                         PDBOPTS_ESP_OIHI_PDB_INL |
2704                         PDBOPTS_ESP_IVSRC |
2705                         PDBHMO_ESP_ENCAP_DTTL |
2706                         PDBHMO_ESP_SNR;
2707                 if (ipsec_xform->options.esn)
2708                         session->encap_pdb.options |= PDBOPTS_ESP_ESN;
2709                 session->encap_pdb.spi = ipsec_xform->spi;
2710                 session->dir = DIR_ENC;
2711         } else if (ipsec_xform->direction ==
2712                         RTE_SECURITY_IPSEC_SA_DIR_INGRESS) {
2713                 memset(&session->decap_pdb, 0, sizeof(struct ipsec_decap_pdb));
2714                 if (ipsec_xform->tunnel.type == RTE_SECURITY_IPSEC_TUNNEL_IPV4)
2715                         session->decap_pdb.options = sizeof(struct ip) << 16;
2716                 else
2717                         session->decap_pdb.options =
2718                                         sizeof(struct rte_ipv6_hdr) << 16;
2719                 if (ipsec_xform->options.esn)
2720                         session->decap_pdb.options |= PDBOPTS_ESP_ESN;
2721                 session->dir = DIR_DEC;
2722         } else
2723                 goto out;
2724         rte_spinlock_lock(&internals->lock);
2725         for (i = 0; i < MAX_DPAA_CORES; i++) {
2726                 session->inq[i] = dpaa_sec_attach_rxq(internals);
2727                 if (session->inq[i] == NULL) {
2728                         DPAA_SEC_ERR("unable to attach sec queue");
2729                         rte_spinlock_unlock(&internals->lock);
2730                         goto out;
2731                 }
2732         }
2733         rte_spinlock_unlock(&internals->lock);
2734
2735         return 0;
2736 out:
2737         rte_free(session->auth_key.data);
2738         rte_free(session->cipher_key.data);
2739         memset(session, 0, sizeof(dpaa_sec_session));
2740         return -1;
2741 }
2742
2743 static int
2744 dpaa_sec_set_pdcp_session(struct rte_cryptodev *dev,
2745                           struct rte_security_session_conf *conf,
2746                           void *sess)
2747 {
2748         struct rte_security_pdcp_xform *pdcp_xform = &conf->pdcp;
2749         struct rte_crypto_sym_xform *xform = conf->crypto_xform;
2750         struct rte_crypto_auth_xform *auth_xform = NULL;
2751         struct rte_crypto_cipher_xform *cipher_xform = NULL;
2752         dpaa_sec_session *session = (dpaa_sec_session *)sess;
2753         struct dpaa_sec_dev_private *dev_priv = dev->data->dev_private;
2754         uint32_t i;
2755
2756         PMD_INIT_FUNC_TRACE();
2757
2758         memset(session, 0, sizeof(dpaa_sec_session));
2759
2760         /* find xfrm types */
2761         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
2762                 cipher_xform = &xform->cipher;
2763                 if (xform->next != NULL)
2764                         auth_xform = &xform->next->auth;
2765         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
2766                 auth_xform = &xform->auth;
2767                 if (xform->next != NULL)
2768                         cipher_xform = &xform->next->cipher;
2769         } else {
2770                 DPAA_SEC_ERR("Invalid crypto type");
2771                 return -EINVAL;
2772         }
2773
2774         session->proto_alg = conf->protocol;
2775         session->ctxt = DPAA_SEC_PDCP;
2776
2777         if (cipher_xform) {
2778                 switch (cipher_xform->algo) {
2779                 case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
2780                         session->cipher_key.alg = PDCP_CIPHER_TYPE_SNOW;
2781                         break;
2782                 case RTE_CRYPTO_CIPHER_ZUC_EEA3:
2783                         session->cipher_key.alg = PDCP_CIPHER_TYPE_ZUC;
2784                         break;
2785                 case RTE_CRYPTO_CIPHER_AES_CTR:
2786                         session->cipher_key.alg = PDCP_CIPHER_TYPE_AES;
2787                         break;
2788                 case RTE_CRYPTO_CIPHER_NULL:
2789                         session->cipher_key.alg = PDCP_CIPHER_TYPE_NULL;
2790                         break;
2791                 default:
2792                         DPAA_SEC_ERR("Crypto: Undefined Cipher specified %u",
2793                                       session->cipher_alg);
2794                         return -1;
2795                 }
2796
2797                 session->cipher_key.data = rte_zmalloc(NULL,
2798                                                cipher_xform->key.length,
2799                                                RTE_CACHE_LINE_SIZE);
2800                 if (session->cipher_key.data == NULL &&
2801                                 cipher_xform->key.length > 0) {
2802                         DPAA_SEC_ERR("No Memory for cipher key");
2803                         return -ENOMEM;
2804                 }
2805                 session->cipher_key.length = cipher_xform->key.length;
2806                 memcpy(session->cipher_key.data, cipher_xform->key.data,
2807                         cipher_xform->key.length);
2808                 session->dir = (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
2809                                         DIR_ENC : DIR_DEC;
2810                 session->cipher_alg = cipher_xform->algo;
2811         } else {
2812                 session->cipher_key.data = NULL;
2813                 session->cipher_key.length = 0;
2814                 session->cipher_alg = RTE_CRYPTO_CIPHER_NULL;
2815                 session->dir = DIR_ENC;
2816         }
2817
2818         if (pdcp_xform->domain == RTE_SECURITY_PDCP_MODE_CONTROL) {
2819                 if (pdcp_xform->sn_size != RTE_SECURITY_PDCP_SN_SIZE_5 &&
2820                     pdcp_xform->sn_size != RTE_SECURITY_PDCP_SN_SIZE_12) {
2821                         DPAA_SEC_ERR(
2822                                 "PDCP Seq Num size should be 5/12 bits for cmode");
2823                         goto out;
2824                 }
2825         }
2826
2827         if (auth_xform) {
2828                 switch (auth_xform->algo) {
2829                 case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
2830                         session->auth_key.alg = PDCP_AUTH_TYPE_SNOW;
2831                         break;
2832                 case RTE_CRYPTO_AUTH_ZUC_EIA3:
2833                         session->auth_key.alg = PDCP_AUTH_TYPE_ZUC;
2834                         break;
2835                 case RTE_CRYPTO_AUTH_AES_CMAC:
2836                         session->auth_key.alg = PDCP_AUTH_TYPE_AES;
2837                         break;
2838                 case RTE_CRYPTO_AUTH_NULL:
2839                         session->auth_key.alg = PDCP_AUTH_TYPE_NULL;
2840                         break;
2841                 default:
2842                         DPAA_SEC_ERR("Crypto: Unsupported auth alg %u",
2843                                       session->auth_alg);
2844                         rte_free(session->cipher_key.data);
2845                         return -1;
2846                 }
2847                 session->auth_key.data = rte_zmalloc(NULL,
2848                                                      auth_xform->key.length,
2849                                                      RTE_CACHE_LINE_SIZE);
2850                 if (!session->auth_key.data &&
2851                     auth_xform->key.length > 0) {
2852                         DPAA_SEC_ERR("No Memory for auth key");
2853                         rte_free(session->cipher_key.data);
2854                         return -ENOMEM;
2855                 }
2856                 session->auth_key.length = auth_xform->key.length;
2857                 memcpy(session->auth_key.data, auth_xform->key.data,
2858                        auth_xform->key.length);
2859                 session->auth_alg = auth_xform->algo;
2860         } else {
2861                 session->auth_key.data = NULL;
2862                 session->auth_key.length = 0;
2863                 session->auth_alg = 0;
2864         }
2865         session->pdcp.domain = pdcp_xform->domain;
2866         session->pdcp.bearer = pdcp_xform->bearer;
2867         session->pdcp.pkt_dir = pdcp_xform->pkt_dir;
2868         session->pdcp.sn_size = pdcp_xform->sn_size;
2869         session->pdcp.hfn = pdcp_xform->hfn;
2870         session->pdcp.hfn_threshold = pdcp_xform->hfn_threshold;
2871         session->pdcp.hfn_ovd = pdcp_xform->hfn_ovrd;
2872         session->pdcp.hfn_ovd_offset = cipher_xform->iv.offset;
2873
2874         rte_spinlock_lock(&dev_priv->lock);
2875         for (i = 0; i < MAX_DPAA_CORES; i++) {
2876                 session->inq[i] = dpaa_sec_attach_rxq(dev_priv);
2877                 if (session->inq[i] == NULL) {
2878                         DPAA_SEC_ERR("unable to attach sec queue");
2879                         rte_spinlock_unlock(&dev_priv->lock);
2880                         goto out;
2881                 }
2882         }
2883         rte_spinlock_unlock(&dev_priv->lock);
2884         return 0;
2885 out:
2886         rte_free(session->auth_key.data);
2887         rte_free(session->cipher_key.data);
2888         memset(session, 0, sizeof(dpaa_sec_session));
2889         return -1;
2890 }
2891
2892 static int
2893 dpaa_sec_security_session_create(void *dev,
2894                                  struct rte_security_session_conf *conf,
2895                                  struct rte_security_session *sess,
2896                                  struct rte_mempool *mempool)
2897 {
2898         void *sess_private_data;
2899         struct rte_cryptodev *cdev = (struct rte_cryptodev *)dev;
2900         int ret;
2901
2902         if (rte_mempool_get(mempool, &sess_private_data)) {
2903                 DPAA_SEC_ERR("Couldn't get object from session mempool");
2904                 return -ENOMEM;
2905         }
2906
2907         switch (conf->protocol) {
2908         case RTE_SECURITY_PROTOCOL_IPSEC:
2909                 ret = dpaa_sec_set_ipsec_session(cdev, conf,
2910                                 sess_private_data);
2911                 break;
2912         case RTE_SECURITY_PROTOCOL_PDCP:
2913                 ret = dpaa_sec_set_pdcp_session(cdev, conf,
2914                                 sess_private_data);
2915                 break;
2916         case RTE_SECURITY_PROTOCOL_MACSEC:
2917                 return -ENOTSUP;
2918         default:
2919                 return -EINVAL;
2920         }
2921         if (ret != 0) {
2922                 DPAA_SEC_ERR("failed to configure session parameters");
2923                 /* Return session to mempool */
2924                 rte_mempool_put(mempool, sess_private_data);
2925                 return ret;
2926         }
2927
2928         set_sec_session_private_data(sess, sess_private_data);
2929
2930         return ret;
2931 }
2932
2933 /** Clear the memory of session so it doesn't leave key material behind */
2934 static int
2935 dpaa_sec_security_session_destroy(void *dev __rte_unused,
2936                 struct rte_security_session *sess)
2937 {
2938         PMD_INIT_FUNC_TRACE();
2939         void *sess_priv = get_sec_session_private_data(sess);
2940         dpaa_sec_session *s = (dpaa_sec_session *)sess_priv;
2941
2942         if (sess_priv) {
2943                 free_session_memory((struct rte_cryptodev *)dev, s);
2944                 set_sec_session_private_data(sess, NULL);
2945         }
2946         return 0;
2947 }
2948 #endif
2949 static int
2950 dpaa_sec_dev_configure(struct rte_cryptodev *dev __rte_unused,
2951                        struct rte_cryptodev_config *config __rte_unused)
2952 {
2953         PMD_INIT_FUNC_TRACE();
2954
2955         return 0;
2956 }
2957
2958 static int
2959 dpaa_sec_dev_start(struct rte_cryptodev *dev __rte_unused)
2960 {
2961         PMD_INIT_FUNC_TRACE();
2962         return 0;
2963 }
2964
2965 static void
2966 dpaa_sec_dev_stop(struct rte_cryptodev *dev __rte_unused)
2967 {
2968         PMD_INIT_FUNC_TRACE();
2969 }
2970
2971 static int
2972 dpaa_sec_dev_close(struct rte_cryptodev *dev)
2973 {
2974         PMD_INIT_FUNC_TRACE();
2975
2976         if (dev == NULL)
2977                 return -ENOMEM;
2978
2979         return 0;
2980 }
2981
2982 static void
2983 dpaa_sec_dev_infos_get(struct rte_cryptodev *dev,
2984                        struct rte_cryptodev_info *info)
2985 {
2986         struct dpaa_sec_dev_private *internals = dev->data->dev_private;
2987
2988         PMD_INIT_FUNC_TRACE();
2989         if (info != NULL) {
2990                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
2991                 info->feature_flags = dev->feature_flags;
2992                 info->capabilities = dpaa_sec_capabilities;
2993                 info->sym.max_nb_sessions = internals->max_nb_sessions;
2994                 info->driver_id = cryptodev_driver_id;
2995         }
2996 }
2997
2998 static enum qman_cb_dqrr_result
2999 dpaa_sec_process_parallel_event(void *event,
3000                         struct qman_portal *qm __always_unused,
3001                         struct qman_fq *outq,
3002                         const struct qm_dqrr_entry *dqrr,
3003                         void **bufs)
3004 {
3005         const struct qm_fd *fd;
3006         struct dpaa_sec_job *job;
3007         struct dpaa_sec_op_ctx *ctx;
3008         struct rte_event *ev = (struct rte_event *)event;
3009
3010         fd = &dqrr->fd;
3011
3012         /* sg is embedded in an op ctx,
3013          * sg[0] is for output
3014          * sg[1] for input
3015          */
3016         job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
3017
3018         ctx = container_of(job, struct dpaa_sec_op_ctx, job);
3019         ctx->fd_status = fd->status;
3020         if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
3021                 struct qm_sg_entry *sg_out;
3022                 uint32_t len;
3023
3024                 sg_out = &job->sg[0];
3025                 hw_sg_to_cpu(sg_out);
3026                 len = sg_out->length;
3027                 ctx->op->sym->m_src->pkt_len = len;
3028                 ctx->op->sym->m_src->data_len = len;
3029         }
3030         if (!ctx->fd_status) {
3031                 ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
3032         } else {
3033                 DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
3034                 ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
3035         }
3036         ev->event_ptr = (void *)ctx->op;
3037
3038         ev->flow_id = outq->ev.flow_id;
3039         ev->sub_event_type = outq->ev.sub_event_type;
3040         ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
3041         ev->op = RTE_EVENT_OP_NEW;
3042         ev->sched_type = outq->ev.sched_type;
3043         ev->queue_id = outq->ev.queue_id;
3044         ev->priority = outq->ev.priority;
3045         *bufs = (void *)ctx->op;
3046
3047         rte_mempool_put(ctx->ctx_pool, (void *)ctx);
3048
3049         return qman_cb_dqrr_consume;
3050 }
3051
3052 static enum qman_cb_dqrr_result
3053 dpaa_sec_process_atomic_event(void *event,
3054                         struct qman_portal *qm __rte_unused,
3055                         struct qman_fq *outq,
3056                         const struct qm_dqrr_entry *dqrr,
3057                         void **bufs)
3058 {
3059         u8 index;
3060         const struct qm_fd *fd;
3061         struct dpaa_sec_job *job;
3062         struct dpaa_sec_op_ctx *ctx;
3063         struct rte_event *ev = (struct rte_event *)event;
3064
3065         fd = &dqrr->fd;
3066
3067         /* sg is embedded in an op ctx,
3068          * sg[0] is for output
3069          * sg[1] for input
3070          */
3071         job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
3072
3073         ctx = container_of(job, struct dpaa_sec_op_ctx, job);
3074         ctx->fd_status = fd->status;
3075         if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
3076                 struct qm_sg_entry *sg_out;
3077                 uint32_t len;
3078
3079                 sg_out = &job->sg[0];
3080                 hw_sg_to_cpu(sg_out);
3081                 len = sg_out->length;
3082                 ctx->op->sym->m_src->pkt_len = len;
3083                 ctx->op->sym->m_src->data_len = len;
3084         }
3085         if (!ctx->fd_status) {
3086                 ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
3087         } else {
3088                 DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
3089                 ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
3090         }
3091         ev->event_ptr = (void *)ctx->op;
3092         ev->flow_id = outq->ev.flow_id;
3093         ev->sub_event_type = outq->ev.sub_event_type;
3094         ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
3095         ev->op = RTE_EVENT_OP_NEW;
3096         ev->sched_type = outq->ev.sched_type;
3097         ev->queue_id = outq->ev.queue_id;
3098         ev->priority = outq->ev.priority;
3099
3100         /* Save active dqrr entries */
3101         index = ((uintptr_t)dqrr >> 6) & (16/*QM_DQRR_SIZE*/ - 1);
3102         DPAA_PER_LCORE_DQRR_SIZE++;
3103         DPAA_PER_LCORE_DQRR_HELD |= 1 << index;
3104         DPAA_PER_LCORE_DQRR_MBUF(index) = ctx->op->sym->m_src;
3105         ev->impl_opaque = index + 1;
3106         ctx->op->sym->m_src->seqn = (uint32_t)index + 1;
3107         *bufs = (void *)ctx->op;
3108
3109         rte_mempool_put(ctx->ctx_pool, (void *)ctx);
3110
3111         return qman_cb_dqrr_defer;
3112 }
3113
3114 int
3115 dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
3116                 int qp_id,
3117                 uint16_t ch_id,
3118                 const struct rte_event *event)
3119 {
3120         struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
3121         struct qm_mcc_initfq opts = {0};
3122
3123         int ret;
3124
3125         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
3126                        QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
3127         opts.fqd.dest.channel = ch_id;
3128
3129         switch (event->sched_type) {
3130         case RTE_SCHED_TYPE_ATOMIC:
3131                 opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
3132                 /* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
3133                  * configuration with HOLD_ACTIVE setting
3134                  */
3135                 opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
3136                 qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_atomic_event;
3137                 break;
3138         case RTE_SCHED_TYPE_ORDERED:
3139                 DPAA_SEC_ERR("Ordered queue schedule type is not supported\n");
3140                 return -1;
3141         default:
3142                 opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
3143                 qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_parallel_event;
3144                 break;
3145         }
3146
3147         ret = qman_init_fq(&qp->outq, QMAN_INITFQ_FLAG_SCHED, &opts);
3148         if (unlikely(ret)) {
3149                 DPAA_SEC_ERR("unable to init caam source fq!");
3150                 return ret;
3151         }
3152
3153         memcpy(&qp->outq.ev, event, sizeof(struct rte_event));
3154
3155         return 0;
3156 }
3157
3158 int
3159 dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
3160                         int qp_id)
3161 {
3162         struct qm_mcc_initfq opts = {0};
3163         int ret;
3164         struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
3165
3166         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
3167                        QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
3168         qp->outq.cb.dqrr = dqrr_out_fq_cb_rx;
3169         qp->outq.cb.ern  = ern_sec_fq_handler;
3170         qman_retire_fq(&qp->outq, NULL);
3171         qman_oos_fq(&qp->outq);
3172         ret = qman_init_fq(&qp->outq, 0, &opts);
3173         if (ret)
3174                 RTE_LOG(ERR, PMD, "Error in qman_init_fq: ret: %d\n", ret);
3175         qp->outq.cb.dqrr = NULL;
3176
3177         return ret;
3178 }
3179
3180 static struct rte_cryptodev_ops crypto_ops = {
3181         .dev_configure        = dpaa_sec_dev_configure,
3182         .dev_start            = dpaa_sec_dev_start,
3183         .dev_stop             = dpaa_sec_dev_stop,
3184         .dev_close            = dpaa_sec_dev_close,
3185         .dev_infos_get        = dpaa_sec_dev_infos_get,
3186         .queue_pair_setup     = dpaa_sec_queue_pair_setup,
3187         .queue_pair_release   = dpaa_sec_queue_pair_release,
3188         .queue_pair_count     = dpaa_sec_queue_pair_count,
3189         .sym_session_get_size     = dpaa_sec_sym_session_get_size,
3190         .sym_session_configure    = dpaa_sec_sym_session_configure,
3191         .sym_session_clear        = dpaa_sec_sym_session_clear
3192 };
3193
3194 #ifdef RTE_LIBRTE_SECURITY
3195 static const struct rte_security_capability *
3196 dpaa_sec_capabilities_get(void *device __rte_unused)
3197 {
3198         return dpaa_sec_security_cap;
3199 }
3200
3201 static const struct rte_security_ops dpaa_sec_security_ops = {
3202         .session_create = dpaa_sec_security_session_create,
3203         .session_update = NULL,
3204         .session_stats_get = NULL,
3205         .session_destroy = dpaa_sec_security_session_destroy,
3206         .set_pkt_metadata = NULL,
3207         .capabilities_get = dpaa_sec_capabilities_get
3208 };
3209 #endif
3210 static int
3211 dpaa_sec_uninit(struct rte_cryptodev *dev)
3212 {
3213         struct dpaa_sec_dev_private *internals;
3214
3215         if (dev == NULL)
3216                 return -ENODEV;
3217
3218         internals = dev->data->dev_private;
3219         rte_free(dev->security_ctx);
3220
3221         rte_free(internals);
3222
3223         DPAA_SEC_INFO("Closing DPAA_SEC device %s on numa socket %u",
3224                       dev->data->name, rte_socket_id());
3225
3226         return 0;
3227 }
3228
3229 static int
3230 dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
3231 {
3232         struct dpaa_sec_dev_private *internals;
3233 #ifdef RTE_LIBRTE_SECURITY
3234         struct rte_security_ctx *security_instance;
3235 #endif
3236         struct dpaa_sec_qp *qp;
3237         uint32_t i, flags;
3238         int ret;
3239
3240         PMD_INIT_FUNC_TRACE();
3241
3242         cryptodev->driver_id = cryptodev_driver_id;
3243         cryptodev->dev_ops = &crypto_ops;
3244
3245         cryptodev->enqueue_burst = dpaa_sec_enqueue_burst;
3246         cryptodev->dequeue_burst = dpaa_sec_dequeue_burst;
3247         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
3248                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
3249                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
3250                         RTE_CRYPTODEV_FF_SECURITY |
3251                         RTE_CRYPTODEV_FF_IN_PLACE_SGL |
3252                         RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
3253                         RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
3254                         RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT |
3255                         RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
3256
3257         internals = cryptodev->data->dev_private;
3258         internals->max_nb_queue_pairs = RTE_DPAA_MAX_NB_SEC_QPS;
3259         internals->max_nb_sessions = RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS;
3260
3261         /*
3262          * For secondary processes, we don't initialise any further as primary
3263          * has already done this work. Only check we don't need a different
3264          * RX function
3265          */
3266         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
3267                 DPAA_SEC_WARN("Device already init by primary process");
3268                 return 0;
3269         }
3270 #ifdef RTE_LIBRTE_SECURITY
3271         /* Initialize security_ctx only for primary process*/
3272         security_instance = rte_malloc("rte_security_instances_ops",
3273                                 sizeof(struct rte_security_ctx), 0);
3274         if (security_instance == NULL)
3275                 return -ENOMEM;
3276         security_instance->device = (void *)cryptodev;
3277         security_instance->ops = &dpaa_sec_security_ops;
3278         security_instance->sess_cnt = 0;
3279         cryptodev->security_ctx = security_instance;
3280 #endif
3281         rte_spinlock_init(&internals->lock);
3282         for (i = 0; i < internals->max_nb_queue_pairs; i++) {
3283                 /* init qman fq for queue pair */
3284                 qp = &internals->qps[i];
3285                 ret = dpaa_sec_init_tx(&qp->outq);
3286                 if (ret) {
3287                         DPAA_SEC_ERR("config tx of queue pair  %d", i);
3288                         goto init_error;
3289                 }
3290         }
3291
3292         flags = QMAN_FQ_FLAG_LOCKED | QMAN_FQ_FLAG_DYNAMIC_FQID |
3293                 QMAN_FQ_FLAG_TO_DCPORTAL;
3294         for (i = 0; i < MAX_DPAA_CORES * internals->max_nb_sessions; i++) {
3295                 /* create rx qman fq for sessions*/
3296                 ret = qman_create_fq(0, flags, &internals->inq[i]);
3297                 if (unlikely(ret != 0)) {
3298                         DPAA_SEC_ERR("sec qman_create_fq failed");
3299                         goto init_error;
3300                 }
3301         }
3302
3303         RTE_LOG(INFO, PMD, "%s cryptodev init\n", cryptodev->data->name);
3304         return 0;
3305
3306 init_error:
3307         DPAA_SEC_ERR("driver %s: create failed\n", cryptodev->data->name);
3308
3309         dpaa_sec_uninit(cryptodev);
3310         return -EFAULT;
3311 }
3312
3313 static int
3314 cryptodev_dpaa_sec_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
3315                                 struct rte_dpaa_device *dpaa_dev)
3316 {
3317         struct rte_cryptodev *cryptodev;
3318         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
3319
3320         int retval;
3321
3322         snprintf(cryptodev_name, sizeof(cryptodev_name), "%s", dpaa_dev->name);
3323
3324         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
3325         if (cryptodev == NULL)
3326                 return -ENOMEM;
3327
3328         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3329                 cryptodev->data->dev_private = rte_zmalloc_socket(
3330                                         "cryptodev private structure",
3331                                         sizeof(struct dpaa_sec_dev_private),
3332                                         RTE_CACHE_LINE_SIZE,
3333                                         rte_socket_id());
3334
3335                 if (cryptodev->data->dev_private == NULL)
3336                         rte_panic("Cannot allocate memzone for private "
3337                                         "device data");
3338         }
3339
3340         dpaa_dev->crypto_dev = cryptodev;
3341         cryptodev->device = &dpaa_dev->device;
3342
3343         /* init user callbacks */
3344         TAILQ_INIT(&(cryptodev->link_intr_cbs));
3345
3346         /* if sec device version is not configured */
3347         if (!rta_get_sec_era()) {
3348                 const struct device_node *caam_node;
3349
3350                 for_each_compatible_node(caam_node, NULL, "fsl,sec-v4.0") {
3351                         const uint32_t *prop = of_get_property(caam_node,
3352                                         "fsl,sec-era",
3353                                         NULL);
3354                         if (prop) {
3355                                 rta_set_sec_era(
3356                                         INTL_SEC_ERA(rte_cpu_to_be_32(*prop)));
3357                                 break;
3358                         }
3359                 }
3360         }
3361
3362         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
3363                 retval = rte_dpaa_portal_init((void *)1);
3364                 if (retval) {
3365                         DPAA_SEC_ERR("Unable to initialize portal");
3366                         return retval;
3367                 }
3368         }
3369
3370         /* Invoke PMD device initialization function */
3371         retval = dpaa_sec_dev_init(cryptodev);
3372         if (retval == 0)
3373                 return 0;
3374
3375         /* In case of error, cleanup is done */
3376         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3377                 rte_free(cryptodev->data->dev_private);
3378
3379         rte_cryptodev_pmd_release_device(cryptodev);
3380
3381         return -ENXIO;
3382 }
3383
3384 static int
3385 cryptodev_dpaa_sec_remove(struct rte_dpaa_device *dpaa_dev)
3386 {
3387         struct rte_cryptodev *cryptodev;
3388         int ret;
3389
3390         cryptodev = dpaa_dev->crypto_dev;
3391         if (cryptodev == NULL)
3392                 return -ENODEV;
3393
3394         ret = dpaa_sec_uninit(cryptodev);
3395         if (ret)
3396                 return ret;
3397
3398         return rte_cryptodev_pmd_destroy(cryptodev);
3399 }
3400
3401 static struct rte_dpaa_driver rte_dpaa_sec_driver = {
3402         .drv_type = FSL_DPAA_CRYPTO,
3403         .driver = {
3404                 .name = "DPAA SEC PMD"
3405         },
3406         .probe = cryptodev_dpaa_sec_probe,
3407         .remove = cryptodev_dpaa_sec_remove,
3408 };
3409
3410 static struct cryptodev_driver dpaa_sec_crypto_drv;
3411
3412 RTE_PMD_REGISTER_DPAA(CRYPTODEV_NAME_DPAA_SEC_PMD, rte_dpaa_sec_driver);
3413 RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa_sec_crypto_drv, rte_dpaa_sec_driver.driver,
3414                 cryptodev_driver_id);
3415
3416 RTE_INIT(dpaa_sec_init_log)
3417 {
3418         dpaa_logtype_sec = rte_log_register("pmd.crypto.dpaa");
3419         if (dpaa_logtype_sec >= 0)
3420                 rte_log_set_level(dpaa_logtype_sec, RTE_LOG_NOTICE);
3421 }