drivers/crypto/dpaa_sec/dpaa_sec.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017-2018 NXP
   5  *
   6  */
   7
   8 #include <fcntl.h>
   9 #include <unistd.h>
  10 #include <sched.h>
  11 #include <net/if.h>
  12
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cryptodev_pmd.h>
  16 #include <rte_crypto.h>
  17 #include <rte_cryptodev.h>
  18 #include <rte_security_driver.h>
  19 #include <rte_cycles.h>
  20 #include <rte_dev.h>
  21 #include <rte_kvargs.h>
  22 #include <rte_malloc.h>
  23 #include <rte_mbuf.h>
  24 #include <rte_memcpy.h>
  25 #include <rte_string_fns.h>
  26
  27 #include <fsl_usd.h>
  28 #include <fsl_qman.h>
  29 #include <of.h>
  30
  31 /* RTA header files */
  32 #include <hw/desc/common.h>
  33 #include <hw/desc/algo.h>
  34 #include <hw/desc/ipsec.h>
  35
  36 #include <rte_dpaa_bus.h>
  37 #include <dpaa_sec.h>
  38 #include <dpaa_sec_log.h>
  39
  40 enum rta_sec_era rta_sec_era;
  41
  42 int dpaa_logtype_sec;
  43
  44 static uint8_t cryptodev_driver_id;
  45
  46 static __thread struct rte_crypto_op **dpaa_sec_ops;
  47 static __thread int dpaa_sec_op_nb;
  48
  49 static int
  50 dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess);
  51
  52 static inline void
  53 dpaa_sec_op_ending(struct dpaa_sec_op_ctx *ctx)
  54 {
  55         if (!ctx->fd_status) {
  56                 ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
  57         } else {
  58                 DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
  59                 ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
  60         }
  61
  62         /* report op status to sym->op and then free the ctx memeory  */
  63         rte_mempool_put(ctx->ctx_pool, (void *)ctx);
  64 }
  65
  66 static inline struct dpaa_sec_op_ctx *
  67 dpaa_sec_alloc_ctx(dpaa_sec_session *ses)
  68 {
  69         struct dpaa_sec_op_ctx *ctx;
  70         int retval;
  71
  72         retval = rte_mempool_get(ses->ctx_pool, (void **)(&ctx));
  73         if (!ctx || retval) {
  74                 DPAA_SEC_DP_WARN("Alloc sec descriptor failed!");
  75                 return NULL;
  76         }
  77         /*
  78          * Clear SG memory. There are 16 SG entries of 16 Bytes each.
  79          * one call to dcbz_64() clear 64 bytes, hence calling it 4 times
  80          * to clear all the SG entries. dpaa_sec_alloc_ctx() is called for
  81          * each packet, memset is costlier than dcbz_64().
  82          */
  83         dcbz_64(&ctx->job.sg[SG_CACHELINE_0]);
  84         dcbz_64(&ctx->job.sg[SG_CACHELINE_1]);
  85         dcbz_64(&ctx->job.sg[SG_CACHELINE_2]);
  86         dcbz_64(&ctx->job.sg[SG_CACHELINE_3]);
  87
  88         ctx->ctx_pool = ses->ctx_pool;
  89         ctx->vtop_offset = (size_t) ctx
  90                                 - rte_mempool_virt2iova(ctx);
  91
  92         return ctx;
  93 }
  94
  95 static inline rte_iova_t
  96 dpaa_mem_vtop(void *vaddr)
  97 {
  98         const struct rte_memseg *ms;
  99
 100         ms = rte_mem_virt2memseg(vaddr, NULL);
 101         if (ms)
 102                 return ms->iova + RTE_PTR_DIFF(vaddr, ms->addr);
 103         return (size_t)NULL;
 104 }
 105
 106 static inline void *
 107 dpaa_mem_ptov(rte_iova_t paddr)
 108 {
 109         return rte_mem_iova2virt(paddr);
 110 }
 111
 112 static void
 113 ern_sec_fq_handler(struct qman_portal *qm __rte_unused,
 114                    struct qman_fq *fq,
 115                    const struct qm_mr_entry *msg)
 116 {
 117         DPAA_SEC_DP_ERR("sec fq %d error, RC = %x, seqnum = %x\n",
 118                         fq->fqid, msg->ern.rc, msg->ern.seqnum);
 119 }
 120
 121 /* initialize the queue with dest chan as caam chan so that
 122  * all the packets in this queue could be dispatched into caam
 123  */
 124 static int
 125 dpaa_sec_init_rx(struct qman_fq *fq_in, rte_iova_t hwdesc,
 126                  uint32_t fqid_out)
 127 {
 128         struct qm_mcc_initfq fq_opts;
 129         uint32_t flags;
 130         int ret = -1;
 131
 132         /* Clear FQ options */
 133         memset(&fq_opts, 0x00, sizeof(struct qm_mcc_initfq));
 134
 135         flags = QMAN_INITFQ_FLAG_SCHED;
 136         fq_opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_CONTEXTA |
 137                           QM_INITFQ_WE_CONTEXTB;
 138
 139         qm_fqd_context_a_set64(&fq_opts.fqd, hwdesc);
 140         fq_opts.fqd.context_b = fqid_out;
 141         fq_opts.fqd.dest.channel = qm_channel_caam;
 142         fq_opts.fqd.dest.wq = 0;
 143
 144         fq_in->cb.ern  = ern_sec_fq_handler;
 145
 146         DPAA_SEC_DEBUG("in-%x out-%x", fq_in->fqid, fqid_out);
 147
 148         ret = qman_init_fq(fq_in, flags, &fq_opts);
 149         if (unlikely(ret != 0))
 150                 DPAA_SEC_ERR("qman_init_fq failed %d", ret);
 151
 152         return ret;
 153 }
 154
 155 /* something is put into in_fq and caam put the crypto result into out_fq */
 156 static enum qman_cb_dqrr_result
 157 dqrr_out_fq_cb_rx(struct qman_portal *qm __always_unused,
 158                   struct qman_fq *fq __always_unused,
 159                   const struct qm_dqrr_entry *dqrr)
 160 {
 161         const struct qm_fd *fd;
 162         struct dpaa_sec_job *job;
 163         struct dpaa_sec_op_ctx *ctx;
 164
 165         if (dpaa_sec_op_nb >= DPAA_SEC_BURST)
 166                 return qman_cb_dqrr_defer;
 167
 168         if (!(dqrr->stat & QM_DQRR_STAT_FD_VALID))
 169                 return qman_cb_dqrr_consume;
 170
 171         fd = &dqrr->fd;
 172         /* sg is embedded in an op ctx,
 173          * sg[0] is for output
 174          * sg[1] for input
 175          */
 176         job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
 177
 178         ctx = container_of(job, struct dpaa_sec_op_ctx, job);
 179         ctx->fd_status = fd->status;
 180         if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 181                 struct qm_sg_entry *sg_out;
 182                 uint32_t len;
 183
 184                 sg_out = &job->sg[0];
 185                 hw_sg_to_cpu(sg_out);
 186                 len = sg_out->length;
 187                 ctx->op->sym->m_src->pkt_len = len;
 188                 ctx->op->sym->m_src->data_len = len;
 189         }
 190         dpaa_sec_ops[dpaa_sec_op_nb++] = ctx->op;
 191         dpaa_sec_op_ending(ctx);
 192
 193         return qman_cb_dqrr_consume;
 194 }
 195
 196 /* caam result is put into this queue */
 197 static int
 198 dpaa_sec_init_tx(struct qman_fq *fq)
 199 {
 200         int ret;
 201         struct qm_mcc_initfq opts;
 202         uint32_t flags;
 203
 204         flags = QMAN_FQ_FLAG_NO_ENQUEUE | QMAN_FQ_FLAG_LOCKED |
 205                 QMAN_FQ_FLAG_DYNAMIC_FQID;
 206
 207         ret = qman_create_fq(0, flags, fq);
 208         if (unlikely(ret)) {
 209                 DPAA_SEC_ERR("qman_create_fq failed");
 210                 return ret;
 211         }
 212
 213         memset(&opts, 0, sizeof(opts));
 214         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
 215                        QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
 216
 217         /* opts.fqd.dest.channel = dpaa_sec_pool_chan; */
 218
 219         fq->cb.dqrr = dqrr_out_fq_cb_rx;
 220         fq->cb.ern  = ern_sec_fq_handler;
 221
 222         ret = qman_init_fq(fq, 0, &opts);
 223         if (unlikely(ret)) {
 224                 DPAA_SEC_ERR("unable to init caam source fq!");
 225                 return ret;
 226         }
 227
 228         return ret;
 229 }
 230
 231 static inline int is_cipher_only(dpaa_sec_session *ses)
 232 {
 233         return ((ses->cipher_alg != RTE_CRYPTO_CIPHER_NULL) &&
 234                 (ses->auth_alg == RTE_CRYPTO_AUTH_NULL));
 235 }
 236
 237 static inline int is_auth_only(dpaa_sec_session *ses)
 238 {
 239         return ((ses->cipher_alg == RTE_CRYPTO_CIPHER_NULL) &&
 240                 (ses->auth_alg != RTE_CRYPTO_AUTH_NULL));
 241 }
 242
 243 static inline int is_aead(dpaa_sec_session *ses)
 244 {
 245         return ((ses->cipher_alg == 0) &&
 246                 (ses->auth_alg == 0) &&
 247                 (ses->aead_alg != 0));
 248 }
 249
 250 static inline int is_auth_cipher(dpaa_sec_session *ses)
 251 {
 252         return ((ses->cipher_alg != RTE_CRYPTO_CIPHER_NULL) &&
 253                 (ses->auth_alg != RTE_CRYPTO_AUTH_NULL) &&
 254                 (ses->proto_alg != RTE_SECURITY_PROTOCOL_IPSEC));
 255 }
 256
 257 static inline int is_proto_ipsec(dpaa_sec_session *ses)
 258 {
 259         return (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC);
 260 }
 261
 262 static inline int is_encode(dpaa_sec_session *ses)
 263 {
 264         return ses->dir == DIR_ENC;
 265 }
 266
 267 static inline int is_decode(dpaa_sec_session *ses)
 268 {
 269         return ses->dir == DIR_DEC;
 270 }
 271
 272 static inline void
 273 caam_auth_alg(dpaa_sec_session *ses, struct alginfo *alginfo_a)
 274 {
 275         switch (ses->auth_alg) {
 276         case RTE_CRYPTO_AUTH_NULL:
 277                 ses->digest_length = 0;
 278                 break;
 279         case RTE_CRYPTO_AUTH_MD5_HMAC:
 280                 alginfo_a->algtype =
 281                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 282                         OP_PCL_IPSEC_HMAC_MD5_96 : OP_ALG_ALGSEL_MD5;
 283                 alginfo_a->algmode = OP_ALG_AAI_HMAC;
 284                 break;
 285         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 286                 alginfo_a->algtype =
 287                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 288                         OP_PCL_IPSEC_HMAC_SHA1_96 : OP_ALG_ALGSEL_SHA1;
 289                 alginfo_a->algmode = OP_ALG_AAI_HMAC;
 290                 break;
 291         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 292                 alginfo_a->algtype =
 293                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 294                         OP_PCL_IPSEC_HMAC_SHA1_160 : OP_ALG_ALGSEL_SHA224;
 295                 alginfo_a->algmode = OP_ALG_AAI_HMAC;
 296                 break;
 297         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 298                 alginfo_a->algtype =
 299                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 300                         OP_PCL_IPSEC_HMAC_SHA2_256_128 : OP_ALG_ALGSEL_SHA256;
 301                 alginfo_a->algmode = OP_ALG_AAI_HMAC;
 302                 break;
 303         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 304                 alginfo_a->algtype =
 305                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 306                         OP_PCL_IPSEC_HMAC_SHA2_384_192 : OP_ALG_ALGSEL_SHA384;
 307                 alginfo_a->algmode = OP_ALG_AAI_HMAC;
 308                 break;
 309         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 310                 alginfo_a->algtype =
 311                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 312                         OP_PCL_IPSEC_HMAC_SHA2_512_256 : OP_ALG_ALGSEL_SHA512;
 313                 alginfo_a->algmode = OP_ALG_AAI_HMAC;
 314                 break;
 315         default:
 316                 DPAA_SEC_ERR("unsupported auth alg %u", ses->auth_alg);
 317         }
 318 }
 319
 320 static inline void
 321 caam_cipher_alg(dpaa_sec_session *ses, struct alginfo *alginfo_c)
 322 {
 323         switch (ses->cipher_alg) {
 324         case RTE_CRYPTO_CIPHER_NULL:
 325                 break;
 326         case RTE_CRYPTO_CIPHER_AES_CBC:
 327                 alginfo_c->algtype =
 328                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 329                         OP_PCL_IPSEC_AES_CBC : OP_ALG_ALGSEL_AES;
 330                 alginfo_c->algmode = OP_ALG_AAI_CBC;
 331                 break;
 332         case RTE_CRYPTO_CIPHER_3DES_CBC:
 333                 alginfo_c->algtype =
 334                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 335                         OP_PCL_IPSEC_3DES : OP_ALG_ALGSEL_3DES;
 336                 alginfo_c->algmode = OP_ALG_AAI_CBC;
 337                 break;
 338         case RTE_CRYPTO_CIPHER_AES_CTR:
 339                 alginfo_c->algtype =
 340                         (ses->proto_alg == RTE_SECURITY_PROTOCOL_IPSEC) ?
 341                         OP_PCL_IPSEC_AES_CTR : OP_ALG_ALGSEL_AES;
 342                 alginfo_c->algmode = OP_ALG_AAI_CTR;
 343                 break;
 344         default:
 345                 DPAA_SEC_ERR("unsupported cipher alg %d", ses->cipher_alg);
 346         }
 347 }
 348
 349 static inline void
 350 caam_aead_alg(dpaa_sec_session *ses, struct alginfo *alginfo)
 351 {
 352         switch (ses->aead_alg) {
 353         case RTE_CRYPTO_AEAD_AES_GCM:
 354                 alginfo->algtype = OP_ALG_ALGSEL_AES;
 355                 alginfo->algmode = OP_ALG_AAI_GCM;
 356                 break;
 357         default:
 358                 DPAA_SEC_ERR("unsupported AEAD alg %d", ses->aead_alg);
 359         }
 360 }
 361
 362
 363 /* prepare command block of the session */
 364 static int
 365 dpaa_sec_prep_cdb(dpaa_sec_session *ses)
 366 {
 367         struct alginfo alginfo_c = {0}, alginfo_a = {0}, alginfo = {0};
 368         int32_t shared_desc_len = 0;
 369         struct sec_cdb *cdb = &ses->cdb;
 370         int err;
 371 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
 372         int swap = false;
 373 #else
 374         int swap = true;
 375 #endif
 376
 377         memset(cdb, 0, sizeof(struct sec_cdb));
 378
 379         if (is_cipher_only(ses)) {
 380                 caam_cipher_alg(ses, &alginfo_c);
 381                 if (alginfo_c.algtype == (unsigned int)DPAA_SEC_ALG_UNSUPPORT) {
 382                         DPAA_SEC_ERR("not supported cipher alg");
 383                         return -ENOTSUP;
 384                 }
 385
 386                 alginfo_c.key = (size_t)ses->cipher_key.data;
 387                 alginfo_c.keylen = ses->cipher_key.length;
 388                 alginfo_c.key_enc_flags = 0;
 389                 alginfo_c.key_type = RTA_DATA_IMM;
 390
 391                 shared_desc_len = cnstr_shdsc_blkcipher(
 392                                                 cdb->sh_desc, true,
 393                                                 swap, &alginfo_c,
 394                                                 NULL,
 395                                                 ses->iv.length,
 396                                                 ses->dir);
 397         } else if (is_auth_only(ses)) {
 398                 caam_auth_alg(ses, &alginfo_a);
 399                 if (alginfo_a.algtype == (unsigned int)DPAA_SEC_ALG_UNSUPPORT) {
 400                         DPAA_SEC_ERR("not supported auth alg");
 401                         return -ENOTSUP;
 402                 }
 403
 404                 alginfo_a.key = (size_t)ses->auth_key.data;
 405                 alginfo_a.keylen = ses->auth_key.length;
 406                 alginfo_a.key_enc_flags = 0;
 407                 alginfo_a.key_type = RTA_DATA_IMM;
 408
 409                 shared_desc_len = cnstr_shdsc_hmac(cdb->sh_desc, true,
 410                                                    swap, &alginfo_a,
 411                                                    !ses->dir,
 412                                                    ses->digest_length);
 413         } else if (is_aead(ses)) {
 414                 caam_aead_alg(ses, &alginfo);
 415                 if (alginfo.algtype == (unsigned int)DPAA_SEC_ALG_UNSUPPORT) {
 416                         DPAA_SEC_ERR("not supported aead alg");
 417                         return -ENOTSUP;
 418                 }
 419                 alginfo.key = (size_t)ses->aead_key.data;
 420                 alginfo.keylen = ses->aead_key.length;
 421                 alginfo.key_enc_flags = 0;
 422                 alginfo.key_type = RTA_DATA_IMM;
 423
 424                 if (ses->dir == DIR_ENC)
 425                         shared_desc_len = cnstr_shdsc_gcm_encap(
 426                                         cdb->sh_desc, true, swap,
 427                                         &alginfo,
 428                                         ses->iv.length,
 429                                         ses->digest_length);
 430                 else
 431                         shared_desc_len = cnstr_shdsc_gcm_decap(
 432                                         cdb->sh_desc, true, swap,
 433                                         &alginfo,
 434                                         ses->iv.length,
 435                                         ses->digest_length);
 436         } else {
 437                 caam_cipher_alg(ses, &alginfo_c);
 438                 if (alginfo_c.algtype == (unsigned int)DPAA_SEC_ALG_UNSUPPORT) {
 439                         DPAA_SEC_ERR("not supported cipher alg");
 440                         return -ENOTSUP;
 441                 }
 442
 443                 alginfo_c.key = (size_t)ses->cipher_key.data;
 444                 alginfo_c.keylen = ses->cipher_key.length;
 445                 alginfo_c.key_enc_flags = 0;
 446                 alginfo_c.key_type = RTA_DATA_IMM;
 447
 448                 caam_auth_alg(ses, &alginfo_a);
 449                 if (alginfo_a.algtype == (unsigned int)DPAA_SEC_ALG_UNSUPPORT) {
 450                         DPAA_SEC_ERR("not supported auth alg");
 451                         return -ENOTSUP;
 452                 }
 453
 454                 alginfo_a.key = (size_t)ses->auth_key.data;
 455                 alginfo_a.keylen = ses->auth_key.length;
 456                 alginfo_a.key_enc_flags = 0;
 457                 alginfo_a.key_type = RTA_DATA_IMM;
 458
 459                 cdb->sh_desc[0] = alginfo_c.keylen;
 460                 cdb->sh_desc[1] = alginfo_a.keylen;
 461                 err = rta_inline_query(IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN,
 462                                        MIN_JOB_DESC_SIZE,
 463                                        (unsigned int *)cdb->sh_desc,
 464                                        &cdb->sh_desc[2], 2);
 465
 466                 if (err < 0) {
 467                         DPAA_SEC_ERR("Crypto: Incorrect key lengths");
 468                         return err;
 469                 }
 470                 if (cdb->sh_desc[2] & 1)
 471                         alginfo_c.key_type = RTA_DATA_IMM;
 472                 else {
 473                         alginfo_c.key = (size_t)dpaa_mem_vtop(
 474                                                 (void *)(size_t)alginfo_c.key);
 475                         alginfo_c.key_type = RTA_DATA_PTR;
 476                 }
 477                 if (cdb->sh_desc[2] & (1<<1))
 478                         alginfo_a.key_type = RTA_DATA_IMM;
 479                 else {
 480                         alginfo_a.key = (size_t)dpaa_mem_vtop(
 481                                                 (void *)(size_t)alginfo_a.key);
 482                         alginfo_a.key_type = RTA_DATA_PTR;
 483                 }
 484                 cdb->sh_desc[0] = 0;
 485                 cdb->sh_desc[1] = 0;
 486                 cdb->sh_desc[2] = 0;
 487                 if (is_proto_ipsec(ses)) {
 488                         if (ses->dir == DIR_ENC) {
 489                                 shared_desc_len = cnstr_shdsc_ipsec_new_encap(
 490                                                 cdb->sh_desc,
 491                                                 true, swap, SHR_SERIAL,
 492                                                 &ses->encap_pdb,
 493                                                 (uint8_t *)&ses->ip4_hdr,
 494                                                 &alginfo_c, &alginfo_a);
 495                         } else if (ses->dir == DIR_DEC) {
 496                                 shared_desc_len = cnstr_shdsc_ipsec_new_decap(
 497                                                 cdb->sh_desc,
 498                                                 true, swap, SHR_SERIAL,
 499                                                 &ses->decap_pdb,
 500                                                 &alginfo_c, &alginfo_a);
 501                         }
 502                 } else {
 503                         /* Auth_only_len is set as 0 here and it will be
 504                          * overwritten in fd for each packet.
 505                          */
 506                         shared_desc_len = cnstr_shdsc_authenc(cdb->sh_desc,
 507                                         true, swap, &alginfo_c, &alginfo_a,
 508                                         ses->iv.length, 0,
 509                                         ses->digest_length, ses->dir);
 510                 }
 511         }
 512
 513         if (shared_desc_len < 0) {
 514                 DPAA_SEC_ERR("error in preparing command block");
 515                 return shared_desc_len;
 516         }
 517
 518         cdb->sh_hdr.hi.field.idlen = shared_desc_len;
 519         cdb->sh_hdr.hi.word = rte_cpu_to_be_32(cdb->sh_hdr.hi.word);
 520         cdb->sh_hdr.lo.word = rte_cpu_to_be_32(cdb->sh_hdr.lo.word);
 521
 522         return 0;
 523 }
 524
 525 /* qp is lockless, should be accessed by only one thread */
 526 static int
 527 dpaa_sec_deq(struct dpaa_sec_qp *qp, struct rte_crypto_op **ops, int nb_ops)
 528 {
 529         struct qman_fq *fq;
 530         unsigned int pkts = 0;
 531         int num_rx_bufs, ret;
 532         struct qm_dqrr_entry *dq;
 533         uint32_t vdqcr_flags = 0;
 534
 535         fq = &qp->outq;
 536         /*
 537          * Until request for four buffers, we provide exact number of buffers.
 538          * Otherwise we do not set the QM_VDQCR_EXACT flag.
 539          * Not setting QM_VDQCR_EXACT flag can provide two more buffers than
 540          * requested, so we request two less in this case.
 541          */
 542         if (nb_ops < 4) {
 543                 vdqcr_flags = QM_VDQCR_EXACT;
 544                 num_rx_bufs = nb_ops;
 545         } else {
 546                 num_rx_bufs = nb_ops > DPAA_MAX_DEQUEUE_NUM_FRAMES ?
 547                         (DPAA_MAX_DEQUEUE_NUM_FRAMES - 2) : (nb_ops - 2);
 548         }
 549         ret = qman_set_vdq(fq, num_rx_bufs, vdqcr_flags);
 550         if (ret)
 551                 return 0;
 552
 553         do {
 554                 const struct qm_fd *fd;
 555                 struct dpaa_sec_job *job;
 556                 struct dpaa_sec_op_ctx *ctx;
 557                 struct rte_crypto_op *op;
 558
 559                 dq = qman_dequeue(fq);
 560                 if (!dq)
 561                         continue;
 562
 563                 fd = &dq->fd;
 564                 /* sg is embedded in an op ctx,
 565                  * sg[0] is for output
 566                  * sg[1] for input
 567                  */
 568                 job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
 569
 570                 ctx = container_of(job, struct dpaa_sec_op_ctx, job);
 571                 ctx->fd_status = fd->status;
 572                 op = ctx->op;
 573                 if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 574                         struct qm_sg_entry *sg_out;
 575                         uint32_t len;
 576
 577                         sg_out = &job->sg[0];
 578                         hw_sg_to_cpu(sg_out);
 579                         len = sg_out->length;
 580                         op->sym->m_src->pkt_len = len;
 581                         op->sym->m_src->data_len = len;
 582                 }
 583                 if (!ctx->fd_status) {
 584                         op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 585                 } else {
 586                         DPAA_SEC_DP_WARN("SEC return err:0x%x", ctx->fd_status);
 587                         op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 588                 }
 589                 ops[pkts++] = op;
 590
 591                 /* report op status to sym->op and then free the ctx memeory */
 592                 rte_mempool_put(ctx->ctx_pool, (void *)ctx);
 593
 594                 qman_dqrr_consume(fq, dq);
 595         } while (fq->flags & QMAN_FQ_STATE_VDQCR);
 596
 597         return pkts;
 598 }
 599
 600 static inline struct dpaa_sec_job *
 601 build_auth_only_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
 602 {
 603         struct rte_crypto_sym_op *sym = op->sym;
 604         struct rte_mbuf *mbuf = sym->m_src;
 605         struct dpaa_sec_job *cf;
 606         struct dpaa_sec_op_ctx *ctx;
 607         struct qm_sg_entry *sg, *out_sg, *in_sg;
 608         phys_addr_t start_addr;
 609         uint8_t *old_digest, extra_segs;
 610
 611         if (is_decode(ses))
 612                 extra_segs = 3;
 613         else
 614                 extra_segs = 2;
 615
 616         if ((mbuf->nb_segs + extra_segs) > MAX_SG_ENTRIES) {
 617                 DPAA_SEC_DP_ERR("Auth: Max sec segs supported is %d",
 618                                 MAX_SG_ENTRIES);
 619                 return NULL;
 620         }
 621         ctx = dpaa_sec_alloc_ctx(ses);
 622         if (!ctx)
 623                 return NULL;
 624
 625         cf = &ctx->job;
 626         ctx->op = op;
 627         old_digest = ctx->digest;
 628
 629         /* output */
 630         out_sg = &cf->sg[0];
 631         qm_sg_entry_set64(out_sg, sym->auth.digest.phys_addr);
 632         out_sg->length = ses->digest_length;
 633         cpu_to_hw_sg(out_sg);
 634
 635         /* input */
 636         in_sg = &cf->sg[1];
 637         /* need to extend the input to a compound frame */
 638         in_sg->extension = 1;
 639         in_sg->final = 1;
 640         in_sg->length = sym->auth.data.length;
 641         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(&cf->sg[2]));
 642
 643         /* 1st seg */
 644         sg = in_sg + 1;
 645         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 646         sg->length = mbuf->data_len - sym->auth.data.offset;
 647         sg->offset = sym->auth.data.offset;
 648
 649         /* Successive segs */
 650         mbuf = mbuf->next;
 651         while (mbuf) {
 652                 cpu_to_hw_sg(sg);
 653                 sg++;
 654                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 655                 sg->length = mbuf->data_len;
 656                 mbuf = mbuf->next;
 657         }
 658
 659         if (is_decode(ses)) {
 660                 /* Digest verification case */
 661                 cpu_to_hw_sg(sg);
 662                 sg++;
 663                 rte_memcpy(old_digest, sym->auth.digest.data,
 664                                 ses->digest_length);
 665                 start_addr = dpaa_mem_vtop(old_digest);
 666                 qm_sg_entry_set64(sg, start_addr);
 667                 sg->length = ses->digest_length;
 668                 in_sg->length += ses->digest_length;
 669         } else {
 670                 /* Digest calculation case */
 671                 sg->length -= ses->digest_length;
 672         }
 673         sg->final = 1;
 674         cpu_to_hw_sg(sg);
 675         cpu_to_hw_sg(in_sg);
 676
 677         return cf;
 678 }
 679
 680 /**
 681  * packet looks like:
 682  *              |<----data_len------->|
 683  *    |ip_header|ah_header|icv|payload|
 684  *              ^
 685  *              |
 686  *         mbuf->pkt.data
 687  */
 688 static inline struct dpaa_sec_job *
 689 build_auth_only(struct rte_crypto_op *op, dpaa_sec_session *ses)
 690 {
 691         struct rte_crypto_sym_op *sym = op->sym;
 692         struct rte_mbuf *mbuf = sym->m_src;
 693         struct dpaa_sec_job *cf;
 694         struct dpaa_sec_op_ctx *ctx;
 695         struct qm_sg_entry *sg;
 696         rte_iova_t start_addr;
 697         uint8_t *old_digest;
 698
 699         ctx = dpaa_sec_alloc_ctx(ses);
 700         if (!ctx)
 701                 return NULL;
 702
 703         cf = &ctx->job;
 704         ctx->op = op;
 705         old_digest = ctx->digest;
 706
 707         start_addr = rte_pktmbuf_iova(mbuf);
 708         /* output */
 709         sg = &cf->sg[0];
 710         qm_sg_entry_set64(sg, sym->auth.digest.phys_addr);
 711         sg->length = ses->digest_length;
 712         cpu_to_hw_sg(sg);
 713
 714         /* input */
 715         sg = &cf->sg[1];
 716         if (is_decode(ses)) {
 717                 /* need to extend the input to a compound frame */
 718                 sg->extension = 1;
 719                 qm_sg_entry_set64(sg, dpaa_mem_vtop(&cf->sg[2]));
 720                 sg->length = sym->auth.data.length + ses->digest_length;
 721                 sg->final = 1;
 722                 cpu_to_hw_sg(sg);
 723
 724                 sg = &cf->sg[2];
 725                 /* hash result or digest, save digest first */
 726                 rte_memcpy(old_digest, sym->auth.digest.data,
 727                            ses->digest_length);
 728                 qm_sg_entry_set64(sg, start_addr + sym->auth.data.offset);
 729                 sg->length = sym->auth.data.length;
 730                 cpu_to_hw_sg(sg);
 731
 732                 /* let's check digest by hw */
 733                 start_addr = dpaa_mem_vtop(old_digest);
 734                 sg++;
 735                 qm_sg_entry_set64(sg, start_addr);
 736                 sg->length = ses->digest_length;
 737                 sg->final = 1;
 738                 cpu_to_hw_sg(sg);
 739         } else {
 740                 qm_sg_entry_set64(sg, start_addr + sym->auth.data.offset);
 741                 sg->length = sym->auth.data.length;
 742                 sg->final = 1;
 743                 cpu_to_hw_sg(sg);
 744         }
 745
 746         return cf;
 747 }
 748
 749 static inline struct dpaa_sec_job *
 750 build_cipher_only_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
 751 {
 752         struct rte_crypto_sym_op *sym = op->sym;
 753         struct dpaa_sec_job *cf;
 754         struct dpaa_sec_op_ctx *ctx;
 755         struct qm_sg_entry *sg, *out_sg, *in_sg;
 756         struct rte_mbuf *mbuf;
 757         uint8_t req_segs;
 758         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 759                         ses->iv.offset);
 760
 761         if (sym->m_dst) {
 762                 mbuf = sym->m_dst;
 763                 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 3;
 764         } else {
 765                 mbuf = sym->m_src;
 766                 req_segs = mbuf->nb_segs * 2 + 3;
 767         }
 768
 769         if (req_segs > MAX_SG_ENTRIES) {
 770                 DPAA_SEC_DP_ERR("Cipher: Max sec segs supported is %d",
 771                                 MAX_SG_ENTRIES);
 772                 return NULL;
 773         }
 774
 775         ctx = dpaa_sec_alloc_ctx(ses);
 776         if (!ctx)
 777                 return NULL;
 778
 779         cf = &ctx->job;
 780         ctx->op = op;
 781
 782         /* output */
 783         out_sg = &cf->sg[0];
 784         out_sg->extension = 1;
 785         out_sg->length = sym->cipher.data.length;
 786         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(&cf->sg[2]));
 787         cpu_to_hw_sg(out_sg);
 788
 789         /* 1st seg */
 790         sg = &cf->sg[2];
 791         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 792         sg->length = mbuf->data_len - sym->cipher.data.offset;
 793         sg->offset = sym->cipher.data.offset;
 794
 795         /* Successive segs */
 796         mbuf = mbuf->next;
 797         while (mbuf) {
 798                 cpu_to_hw_sg(sg);
 799                 sg++;
 800                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 801                 sg->length = mbuf->data_len;
 802                 mbuf = mbuf->next;
 803         }
 804         sg->final = 1;
 805         cpu_to_hw_sg(sg);
 806
 807         /* input */
 808         mbuf = sym->m_src;
 809         in_sg = &cf->sg[1];
 810         in_sg->extension = 1;
 811         in_sg->final = 1;
 812         in_sg->length = sym->cipher.data.length + ses->iv.length;
 813
 814         sg++;
 815         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
 816         cpu_to_hw_sg(in_sg);
 817
 818         /* IV */
 819         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
 820         sg->length = ses->iv.length;
 821         cpu_to_hw_sg(sg);
 822
 823         /* 1st seg */
 824         sg++;
 825         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 826         sg->length = mbuf->data_len - sym->cipher.data.offset;
 827         sg->offset = sym->cipher.data.offset;
 828
 829         /* Successive segs */
 830         mbuf = mbuf->next;
 831         while (mbuf) {
 832                 cpu_to_hw_sg(sg);
 833                 sg++;
 834                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 835                 sg->length = mbuf->data_len;
 836                 mbuf = mbuf->next;
 837         }
 838         sg->final = 1;
 839         cpu_to_hw_sg(sg);
 840
 841         return cf;
 842 }
 843
 844 static inline struct dpaa_sec_job *
 845 build_cipher_only(struct rte_crypto_op *op, dpaa_sec_session *ses)
 846 {
 847         struct rte_crypto_sym_op *sym = op->sym;
 848         struct dpaa_sec_job *cf;
 849         struct dpaa_sec_op_ctx *ctx;
 850         struct qm_sg_entry *sg;
 851         rte_iova_t src_start_addr, dst_start_addr;
 852         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 853                         ses->iv.offset);
 854
 855         ctx = dpaa_sec_alloc_ctx(ses);
 856         if (!ctx)
 857                 return NULL;
 858
 859         cf = &ctx->job;
 860         ctx->op = op;
 861
 862         src_start_addr = rte_pktmbuf_iova(sym->m_src);
 863
 864         if (sym->m_dst)
 865                 dst_start_addr = rte_pktmbuf_iova(sym->m_dst);
 866         else
 867                 dst_start_addr = src_start_addr;
 868
 869         /* output */
 870         sg = &cf->sg[0];
 871         qm_sg_entry_set64(sg, dst_start_addr + sym->cipher.data.offset);
 872         sg->length = sym->cipher.data.length + ses->iv.length;
 873         cpu_to_hw_sg(sg);
 874
 875         /* input */
 876         sg = &cf->sg[1];
 877
 878         /* need to extend the input to a compound frame */
 879         sg->extension = 1;
 880         sg->final = 1;
 881         sg->length = sym->cipher.data.length + ses->iv.length;
 882         qm_sg_entry_set64(sg, dpaa_mem_vtop(&cf->sg[2]));
 883         cpu_to_hw_sg(sg);
 884
 885         sg = &cf->sg[2];
 886         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
 887         sg->length = ses->iv.length;
 888         cpu_to_hw_sg(sg);
 889
 890         sg++;
 891         qm_sg_entry_set64(sg, src_start_addr + sym->cipher.data.offset);
 892         sg->length = sym->cipher.data.length;
 893         sg->final = 1;
 894         cpu_to_hw_sg(sg);
 895
 896         return cf;
 897 }
 898
 899 static inline struct dpaa_sec_job *
 900 build_cipher_auth_gcm_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
 901 {
 902         struct rte_crypto_sym_op *sym = op->sym;
 903         struct dpaa_sec_job *cf;
 904         struct dpaa_sec_op_ctx *ctx;
 905         struct qm_sg_entry *sg, *out_sg, *in_sg;
 906         struct rte_mbuf *mbuf;
 907         uint8_t req_segs;
 908         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
 909                         ses->iv.offset);
 910
 911         if (sym->m_dst) {
 912                 mbuf = sym->m_dst;
 913                 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 4;
 914         } else {
 915                 mbuf = sym->m_src;
 916                 req_segs = mbuf->nb_segs * 2 + 4;
 917         }
 918
 919         if (ses->auth_only_len)
 920                 req_segs++;
 921
 922         if (req_segs > MAX_SG_ENTRIES) {
 923                 DPAA_SEC_DP_ERR("AEAD: Max sec segs supported is %d",
 924                                 MAX_SG_ENTRIES);
 925                 return NULL;
 926         }
 927
 928         ctx = dpaa_sec_alloc_ctx(ses);
 929         if (!ctx)
 930                 return NULL;
 931
 932         cf = &ctx->job;
 933         ctx->op = op;
 934
 935         rte_prefetch0(cf->sg);
 936
 937         /* output */
 938         out_sg = &cf->sg[0];
 939         out_sg->extension = 1;
 940         if (is_encode(ses))
 941                 out_sg->length = sym->aead.data.length + ses->auth_only_len
 942                                                 + ses->digest_length;
 943         else
 944                 out_sg->length = sym->aead.data.length + ses->auth_only_len;
 945
 946         /* output sg entries */
 947         sg = &cf->sg[2];
 948         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(sg));
 949         cpu_to_hw_sg(out_sg);
 950
 951         /* 1st seg */
 952         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 953         sg->length = mbuf->data_len - sym->aead.data.offset +
 954                                         ses->auth_only_len;
 955         sg->offset = sym->aead.data.offset - ses->auth_only_len;
 956
 957         /* Successive segs */
 958         mbuf = mbuf->next;
 959         while (mbuf) {
 960                 cpu_to_hw_sg(sg);
 961                 sg++;
 962                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
 963                 sg->length = mbuf->data_len;
 964                 mbuf = mbuf->next;
 965         }
 966         sg->length -= ses->digest_length;
 967
 968         if (is_encode(ses)) {
 969                 cpu_to_hw_sg(sg);
 970                 /* set auth output */
 971                 sg++;
 972                 qm_sg_entry_set64(sg, sym->aead.digest.phys_addr);
 973                 sg->length = ses->digest_length;
 974         }
 975         sg->final = 1;
 976         cpu_to_hw_sg(sg);
 977
 978         /* input */
 979         mbuf = sym->m_src;
 980         in_sg = &cf->sg[1];
 981         in_sg->extension = 1;
 982         in_sg->final = 1;
 983         if (is_encode(ses))
 984                 in_sg->length = ses->iv.length + sym->aead.data.length
 985                                                         + ses->auth_only_len;
 986         else
 987                 in_sg->length = ses->iv.length + sym->aead.data.length
 988                                 + ses->auth_only_len + ses->digest_length;
 989
 990         /* input sg entries */
 991         sg++;
 992         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
 993         cpu_to_hw_sg(in_sg);
 994
 995         /* 1st seg IV */
 996         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
 997         sg->length = ses->iv.length;
 998         cpu_to_hw_sg(sg);
 999
1000         /* 2nd seg auth only */
1001         if (ses->auth_only_len) {
1002                 sg++;
1003                 qm_sg_entry_set64(sg, dpaa_mem_vtop(sym->aead.aad.data));
1004                 sg->length = ses->auth_only_len;
1005                 cpu_to_hw_sg(sg);
1006         }
1007
1008         /* 3rd seg */
1009         sg++;
1010         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1011         sg->length = mbuf->data_len - sym->aead.data.offset;
1012         sg->offset = sym->aead.data.offset;
1013
1014         /* Successive segs */
1015         mbuf = mbuf->next;
1016         while (mbuf) {
1017                 cpu_to_hw_sg(sg);
1018                 sg++;
1019                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1020                 sg->length = mbuf->data_len;
1021                 mbuf = mbuf->next;
1022         }
1023
1024         if (is_decode(ses)) {
1025                 cpu_to_hw_sg(sg);
1026                 sg++;
1027                 memcpy(ctx->digest, sym->aead.digest.data,
1028                         ses->digest_length);
1029                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1030                 sg->length = ses->digest_length;
1031         }
1032         sg->final = 1;
1033         cpu_to_hw_sg(sg);
1034
1035         return cf;
1036 }
1037
1038 static inline struct dpaa_sec_job *
1039 build_cipher_auth_gcm(struct rte_crypto_op *op, dpaa_sec_session *ses)
1040 {
1041         struct rte_crypto_sym_op *sym = op->sym;
1042         struct dpaa_sec_job *cf;
1043         struct dpaa_sec_op_ctx *ctx;
1044         struct qm_sg_entry *sg;
1045         uint32_t length = 0;
1046         rte_iova_t src_start_addr, dst_start_addr;
1047         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1048                         ses->iv.offset);
1049
1050         src_start_addr = sym->m_src->buf_iova + sym->m_src->data_off;
1051
1052         if (sym->m_dst)
1053                 dst_start_addr = sym->m_dst->buf_iova + sym->m_dst->data_off;
1054         else
1055                 dst_start_addr = src_start_addr;
1056
1057         ctx = dpaa_sec_alloc_ctx(ses);
1058         if (!ctx)
1059                 return NULL;
1060
1061         cf = &ctx->job;
1062         ctx->op = op;
1063
1064         /* input */
1065         rte_prefetch0(cf->sg);
1066         sg = &cf->sg[2];
1067         qm_sg_entry_set64(&cf->sg[1], dpaa_mem_vtop(sg));
1068         if (is_encode(ses)) {
1069                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1070                 sg->length = ses->iv.length;
1071                 length += sg->length;
1072                 cpu_to_hw_sg(sg);
1073
1074                 sg++;
1075                 if (ses->auth_only_len) {
1076                         qm_sg_entry_set64(sg,
1077                                           dpaa_mem_vtop(sym->aead.aad.data));
1078                         sg->length = ses->auth_only_len;
1079                         length += sg->length;
1080                         cpu_to_hw_sg(sg);
1081                         sg++;
1082                 }
1083                 qm_sg_entry_set64(sg, src_start_addr + sym->aead.data.offset);
1084                 sg->length = sym->aead.data.length;
1085                 length += sg->length;
1086                 sg->final = 1;
1087                 cpu_to_hw_sg(sg);
1088         } else {
1089                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1090                 sg->length = ses->iv.length;
1091                 length += sg->length;
1092                 cpu_to_hw_sg(sg);
1093
1094                 sg++;
1095                 if (ses->auth_only_len) {
1096                         qm_sg_entry_set64(sg,
1097                                           dpaa_mem_vtop(sym->aead.aad.data));
1098                         sg->length = ses->auth_only_len;
1099                         length += sg->length;
1100                         cpu_to_hw_sg(sg);
1101                         sg++;
1102                 }
1103                 qm_sg_entry_set64(sg, src_start_addr + sym->aead.data.offset);
1104                 sg->length = sym->aead.data.length;
1105                 length += sg->length;
1106                 cpu_to_hw_sg(sg);
1107
1108                 memcpy(ctx->digest, sym->aead.digest.data,
1109                        ses->digest_length);
1110                 sg++;
1111
1112                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1113                 sg->length = ses->digest_length;
1114                 length += sg->length;
1115                 sg->final = 1;
1116                 cpu_to_hw_sg(sg);
1117         }
1118         /* input compound frame */
1119         cf->sg[1].length = length;
1120         cf->sg[1].extension = 1;
1121         cf->sg[1].final = 1;
1122         cpu_to_hw_sg(&cf->sg[1]);
1123
1124         /* output */
1125         sg++;
1126         qm_sg_entry_set64(&cf->sg[0], dpaa_mem_vtop(sg));
1127         qm_sg_entry_set64(sg,
1128                 dst_start_addr + sym->aead.data.offset - ses->auth_only_len);
1129         sg->length = sym->aead.data.length + ses->auth_only_len;
1130         length = sg->length;
1131         if (is_encode(ses)) {
1132                 cpu_to_hw_sg(sg);
1133                 /* set auth output */
1134                 sg++;
1135                 qm_sg_entry_set64(sg, sym->aead.digest.phys_addr);
1136                 sg->length = ses->digest_length;
1137                 length += sg->length;
1138         }
1139         sg->final = 1;
1140         cpu_to_hw_sg(sg);
1141
1142         /* output compound frame */
1143         cf->sg[0].length = length;
1144         cf->sg[0].extension = 1;
1145         cpu_to_hw_sg(&cf->sg[0]);
1146
1147         return cf;
1148 }
1149
1150 static inline struct dpaa_sec_job *
1151 build_cipher_auth_sg(struct rte_crypto_op *op, dpaa_sec_session *ses)
1152 {
1153         struct rte_crypto_sym_op *sym = op->sym;
1154         struct dpaa_sec_job *cf;
1155         struct dpaa_sec_op_ctx *ctx;
1156         struct qm_sg_entry *sg, *out_sg, *in_sg;
1157         struct rte_mbuf *mbuf;
1158         uint8_t req_segs;
1159         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1160                         ses->iv.offset);
1161
1162         if (sym->m_dst) {
1163                 mbuf = sym->m_dst;
1164                 req_segs = mbuf->nb_segs + sym->m_src->nb_segs + 4;
1165         } else {
1166                 mbuf = sym->m_src;
1167                 req_segs = mbuf->nb_segs * 2 + 4;
1168         }
1169
1170         if (req_segs > MAX_SG_ENTRIES) {
1171                 DPAA_SEC_DP_ERR("Cipher-Auth: Max sec segs supported is %d",
1172                                 MAX_SG_ENTRIES);
1173                 return NULL;
1174         }
1175
1176         ctx = dpaa_sec_alloc_ctx(ses);
1177         if (!ctx)
1178                 return NULL;
1179
1180         cf = &ctx->job;
1181         ctx->op = op;
1182
1183         rte_prefetch0(cf->sg);
1184
1185         /* output */
1186         out_sg = &cf->sg[0];
1187         out_sg->extension = 1;
1188         if (is_encode(ses))
1189                 out_sg->length = sym->auth.data.length + ses->digest_length;
1190         else
1191                 out_sg->length = sym->auth.data.length;
1192
1193         /* output sg entries */
1194         sg = &cf->sg[2];
1195         qm_sg_entry_set64(out_sg, dpaa_mem_vtop(sg));
1196         cpu_to_hw_sg(out_sg);
1197
1198         /* 1st seg */
1199         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1200         sg->length = mbuf->data_len - sym->auth.data.offset;
1201         sg->offset = sym->auth.data.offset;
1202
1203         /* Successive segs */
1204         mbuf = mbuf->next;
1205         while (mbuf) {
1206                 cpu_to_hw_sg(sg);
1207                 sg++;
1208                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1209                 sg->length = mbuf->data_len;
1210                 mbuf = mbuf->next;
1211         }
1212         sg->length -= ses->digest_length;
1213
1214         if (is_encode(ses)) {
1215                 cpu_to_hw_sg(sg);
1216                 /* set auth output */
1217                 sg++;
1218                 qm_sg_entry_set64(sg, sym->auth.digest.phys_addr);
1219                 sg->length = ses->digest_length;
1220         }
1221         sg->final = 1;
1222         cpu_to_hw_sg(sg);
1223
1224         /* input */
1225         mbuf = sym->m_src;
1226         in_sg = &cf->sg[1];
1227         in_sg->extension = 1;
1228         in_sg->final = 1;
1229         if (is_encode(ses))
1230                 in_sg->length = ses->iv.length + sym->auth.data.length;
1231         else
1232                 in_sg->length = ses->iv.length + sym->auth.data.length
1233                                                 + ses->digest_length;
1234
1235         /* input sg entries */
1236         sg++;
1237         qm_sg_entry_set64(in_sg, dpaa_mem_vtop(sg));
1238         cpu_to_hw_sg(in_sg);
1239
1240         /* 1st seg IV */
1241         qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1242         sg->length = ses->iv.length;
1243         cpu_to_hw_sg(sg);
1244
1245         /* 2nd seg */
1246         sg++;
1247         qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1248         sg->length = mbuf->data_len - sym->auth.data.offset;
1249         sg->offset = sym->auth.data.offset;
1250
1251         /* Successive segs */
1252         mbuf = mbuf->next;
1253         while (mbuf) {
1254                 cpu_to_hw_sg(sg);
1255                 sg++;
1256                 qm_sg_entry_set64(sg, rte_pktmbuf_mtophys(mbuf));
1257                 sg->length = mbuf->data_len;
1258                 mbuf = mbuf->next;
1259         }
1260
1261         sg->length -= ses->digest_length;
1262         if (is_decode(ses)) {
1263                 cpu_to_hw_sg(sg);
1264                 sg++;
1265                 memcpy(ctx->digest, sym->auth.digest.data,
1266                         ses->digest_length);
1267                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1268                 sg->length = ses->digest_length;
1269         }
1270         sg->final = 1;
1271         cpu_to_hw_sg(sg);
1272
1273         return cf;
1274 }
1275
1276 static inline struct dpaa_sec_job *
1277 build_cipher_auth(struct rte_crypto_op *op, dpaa_sec_session *ses)
1278 {
1279         struct rte_crypto_sym_op *sym = op->sym;
1280         struct dpaa_sec_job *cf;
1281         struct dpaa_sec_op_ctx *ctx;
1282         struct qm_sg_entry *sg;
1283         rte_iova_t src_start_addr, dst_start_addr;
1284         uint32_t length = 0;
1285         uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
1286                         ses->iv.offset);
1287
1288         src_start_addr = sym->m_src->buf_iova + sym->m_src->data_off;
1289         if (sym->m_dst)
1290                 dst_start_addr = sym->m_dst->buf_iova + sym->m_dst->data_off;
1291         else
1292                 dst_start_addr = src_start_addr;
1293
1294         ctx = dpaa_sec_alloc_ctx(ses);
1295         if (!ctx)
1296                 return NULL;
1297
1298         cf = &ctx->job;
1299         ctx->op = op;
1300
1301         /* input */
1302         rte_prefetch0(cf->sg);
1303         sg = &cf->sg[2];
1304         qm_sg_entry_set64(&cf->sg[1], dpaa_mem_vtop(sg));
1305         if (is_encode(ses)) {
1306                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1307                 sg->length = ses->iv.length;
1308                 length += sg->length;
1309                 cpu_to_hw_sg(sg);
1310
1311                 sg++;
1312                 qm_sg_entry_set64(sg, src_start_addr + sym->auth.data.offset);
1313                 sg->length = sym->auth.data.length;
1314                 length += sg->length;
1315                 sg->final = 1;
1316                 cpu_to_hw_sg(sg);
1317         } else {
1318                 qm_sg_entry_set64(sg, dpaa_mem_vtop(IV_ptr));
1319                 sg->length = ses->iv.length;
1320                 length += sg->length;
1321                 cpu_to_hw_sg(sg);
1322
1323                 sg++;
1324
1325                 qm_sg_entry_set64(sg, src_start_addr + sym->auth.data.offset);
1326                 sg->length = sym->auth.data.length;
1327                 length += sg->length;
1328                 cpu_to_hw_sg(sg);
1329
1330                 memcpy(ctx->digest, sym->auth.digest.data,
1331                        ses->digest_length);
1332                 sg++;
1333
1334                 qm_sg_entry_set64(sg, dpaa_mem_vtop(ctx->digest));
1335                 sg->length = ses->digest_length;
1336                 length += sg->length;
1337                 sg->final = 1;
1338                 cpu_to_hw_sg(sg);
1339         }
1340         /* input compound frame */
1341         cf->sg[1].length = length;
1342         cf->sg[1].extension = 1;
1343         cf->sg[1].final = 1;
1344         cpu_to_hw_sg(&cf->sg[1]);
1345
1346         /* output */
1347         sg++;
1348         qm_sg_entry_set64(&cf->sg[0], dpaa_mem_vtop(sg));
1349         qm_sg_entry_set64(sg, dst_start_addr + sym->cipher.data.offset);
1350         sg->length = sym->cipher.data.length;
1351         length = sg->length;
1352         if (is_encode(ses)) {
1353                 cpu_to_hw_sg(sg);
1354                 /* set auth output */
1355                 sg++;
1356                 qm_sg_entry_set64(sg, sym->auth.digest.phys_addr);
1357                 sg->length = ses->digest_length;
1358                 length += sg->length;
1359         }
1360         sg->final = 1;
1361         cpu_to_hw_sg(sg);
1362
1363         /* output compound frame */
1364         cf->sg[0].length = length;
1365         cf->sg[0].extension = 1;
1366         cpu_to_hw_sg(&cf->sg[0]);
1367
1368         return cf;
1369 }
1370
1371 static inline struct dpaa_sec_job *
1372 build_proto(struct rte_crypto_op *op, dpaa_sec_session *ses)
1373 {
1374         struct rte_crypto_sym_op *sym = op->sym;
1375         struct dpaa_sec_job *cf;
1376         struct dpaa_sec_op_ctx *ctx;
1377         struct qm_sg_entry *sg;
1378         phys_addr_t src_start_addr, dst_start_addr;
1379
1380         ctx = dpaa_sec_alloc_ctx(ses);
1381         if (!ctx)
1382                 return NULL;
1383         cf = &ctx->job;
1384         ctx->op = op;
1385
1386         src_start_addr = rte_pktmbuf_mtophys(sym->m_src);
1387
1388         if (sym->m_dst)
1389                 dst_start_addr = rte_pktmbuf_mtophys(sym->m_dst);
1390         else
1391                 dst_start_addr = src_start_addr;
1392
1393         /* input */
1394         sg = &cf->sg[1];
1395         qm_sg_entry_set64(sg, src_start_addr);
1396         sg->length = sym->m_src->pkt_len;
1397         sg->final = 1;
1398         cpu_to_hw_sg(sg);
1399
1400         sym->m_src->packet_type &= ~RTE_PTYPE_L4_MASK;
1401         /* output */
1402         sg = &cf->sg[0];
1403         qm_sg_entry_set64(sg, dst_start_addr);
1404         sg->length = sym->m_src->buf_len - sym->m_src->data_off;
1405         cpu_to_hw_sg(sg);
1406
1407         return cf;
1408 }
1409
1410 static uint16_t
1411 dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
1412                        uint16_t nb_ops)
1413 {
1414         /* Function to transmit the frames to given device and queuepair */
1415         uint32_t loop;
1416         struct dpaa_sec_qp *dpaa_qp = (struct dpaa_sec_qp *)qp;
1417         uint16_t num_tx = 0;
1418         struct qm_fd fds[DPAA_SEC_BURST], *fd;
1419         uint32_t frames_to_send;
1420         struct rte_crypto_op *op;
1421         struct dpaa_sec_job *cf;
1422         dpaa_sec_session *ses;
1423         uint32_t auth_only_len;
1424         struct qman_fq *inq[DPAA_SEC_BURST];
1425
1426         while (nb_ops) {
1427                 frames_to_send = (nb_ops > DPAA_SEC_BURST) ?
1428                                 DPAA_SEC_BURST : nb_ops;
1429                 for (loop = 0; loop < frames_to_send; loop++) {
1430                         op = *(ops++);
1431                         switch (op->sess_type) {
1432                         case RTE_CRYPTO_OP_WITH_SESSION:
1433                                 ses = (dpaa_sec_session *)
1434                                         get_sym_session_private_data(
1435                                                         op->sym->session,
1436                                                         cryptodev_driver_id);
1437                                 break;
1438                         case RTE_CRYPTO_OP_SECURITY_SESSION:
1439                                 ses = (dpaa_sec_session *)
1440                                         get_sec_session_private_data(
1441                                                         op->sym->sec_session);
1442                                 break;
1443                         default:
1444                                 DPAA_SEC_DP_ERR(
1445                                         "sessionless crypto op not supported");
1446                                 frames_to_send = loop;
1447                                 nb_ops = loop;
1448                                 goto send_pkts;
1449                         }
1450                         if (unlikely(!ses->qp || ses->qp != qp)) {
1451                                 DPAA_SEC_DP_ERR("sess->qp - %p qp %p",
1452                                              ses->qp, qp);
1453                                 if (dpaa_sec_attach_sess_q(qp, ses)) {
1454                                         frames_to_send = loop;
1455                                         nb_ops = loop;
1456                                         goto send_pkts;
1457                                 }
1458                         }
1459
1460                         auth_only_len = op->sym->auth.data.length -
1461                                                 op->sym->cipher.data.length;
1462                         if (rte_pktmbuf_is_contiguous(op->sym->m_src)) {
1463                                 if (is_auth_only(ses)) {
1464                                         cf = build_auth_only(op, ses);
1465                                 } else if (is_cipher_only(ses)) {
1466                                         cf = build_cipher_only(op, ses);
1467                                 } else if (is_aead(ses)) {
1468                                         cf = build_cipher_auth_gcm(op, ses);
1469                                         auth_only_len = ses->auth_only_len;
1470                                 } else if (is_auth_cipher(ses)) {
1471                                         cf = build_cipher_auth(op, ses);
1472                                 } else if (is_proto_ipsec(ses)) {
1473                                         cf = build_proto(op, ses);
1474                                 } else {
1475                                         DPAA_SEC_DP_ERR("not supported ops");
1476                                         frames_to_send = loop;
1477                                         nb_ops = loop;
1478                                         goto send_pkts;
1479                                 }
1480                         } else {
1481                                 if (is_auth_only(ses)) {
1482                                         cf = build_auth_only_sg(op, ses);
1483                                 } else if (is_cipher_only(ses)) {
1484                                         cf = build_cipher_only_sg(op, ses);
1485                                 } else if (is_aead(ses)) {
1486                                         cf = build_cipher_auth_gcm_sg(op, ses);
1487                                         auth_only_len = ses->auth_only_len;
1488                                 } else if (is_auth_cipher(ses)) {
1489                                         cf = build_cipher_auth_sg(op, ses);
1490                                 } else {
1491                                         DPAA_SEC_DP_ERR("not supported ops");
1492                                         frames_to_send = loop;
1493                                         nb_ops = loop;
1494                                         goto send_pkts;
1495                                 }
1496                         }
1497                         if (unlikely(!cf)) {
1498                                 frames_to_send = loop;
1499                                 nb_ops = loop;
1500                                 goto send_pkts;
1501                         }
1502
1503                         fd = &fds[loop];
1504                         inq[loop] = ses->inq;
1505                         fd->opaque_addr = 0;
1506                         fd->cmd = 0;
1507                         qm_fd_addr_set64(fd, dpaa_mem_vtop(cf->sg));
1508                         fd->_format1 = qm_fd_compound;
1509                         fd->length29 = 2 * sizeof(struct qm_sg_entry);
1510                         /* Auth_only_len is set as 0 in descriptor and it is
1511                          * overwritten here in the fd.cmd which will update
1512                          * the DPOVRD reg.
1513                          */
1514                         if (auth_only_len)
1515                                 fd->cmd = 0x80000000 | auth_only_len;
1516
1517                 }
1518 send_pkts:
1519                 loop = 0;
1520                 while (loop < frames_to_send) {
1521                         loop += qman_enqueue_multi_fq(&inq[loop], &fds[loop],
1522                                         frames_to_send - loop);
1523                 }
1524                 nb_ops -= frames_to_send;
1525                 num_tx += frames_to_send;
1526         }
1527
1528         dpaa_qp->tx_pkts += num_tx;
1529         dpaa_qp->tx_errs += nb_ops - num_tx;
1530
1531         return num_tx;
1532 }
1533
1534 static uint16_t
1535 dpaa_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
1536                        uint16_t nb_ops)
1537 {
1538         uint16_t num_rx;
1539         struct dpaa_sec_qp *dpaa_qp = (struct dpaa_sec_qp *)qp;
1540
1541         num_rx = dpaa_sec_deq(dpaa_qp, ops, nb_ops);
1542
1543         dpaa_qp->rx_pkts += num_rx;
1544         dpaa_qp->rx_errs += nb_ops - num_rx;
1545
1546         DPAA_SEC_DP_DEBUG("SEC Received %d Packets\n", num_rx);
1547
1548         return num_rx;
1549 }
1550
1551 /** Release queue pair */
1552 static int
1553 dpaa_sec_queue_pair_release(struct rte_cryptodev *dev,
1554                             uint16_t qp_id)
1555 {
1556         struct dpaa_sec_dev_private *internals;
1557         struct dpaa_sec_qp *qp = NULL;
1558
1559         PMD_INIT_FUNC_TRACE();
1560
1561         DPAA_SEC_DEBUG("dev =%p, queue =%d", dev, qp_id);
1562
1563         internals = dev->data->dev_private;
1564         if (qp_id >= internals->max_nb_queue_pairs) {
1565                 DPAA_SEC_ERR("Max supported qpid %d",
1566                              internals->max_nb_queue_pairs);
1567                 return -EINVAL;
1568         }
1569
1570         qp = &internals->qps[qp_id];
1571         qp->internals = NULL;
1572         dev->data->queue_pairs[qp_id] = NULL;
1573
1574         return 0;
1575 }
1576
1577 /** Setup a queue pair */
1578 static int
1579 dpaa_sec_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1580                 __rte_unused const struct rte_cryptodev_qp_conf *qp_conf,
1581                 __rte_unused int socket_id,
1582                 __rte_unused struct rte_mempool *session_pool)
1583 {
1584         struct dpaa_sec_dev_private *internals;
1585         struct dpaa_sec_qp *qp = NULL;
1586
1587         DPAA_SEC_DEBUG("dev =%p, queue =%d, conf =%p", dev, qp_id, qp_conf);
1588
1589         internals = dev->data->dev_private;
1590         if (qp_id >= internals->max_nb_queue_pairs) {
1591                 DPAA_SEC_ERR("Max supported qpid %d",
1592                              internals->max_nb_queue_pairs);
1593                 return -EINVAL;
1594         }
1595
1596         qp = &internals->qps[qp_id];
1597         qp->internals = internals;
1598         dev->data->queue_pairs[qp_id] = qp;
1599
1600         return 0;
1601 }
1602
1603 /** Return the number of allocated queue pairs */
1604 static uint32_t
1605 dpaa_sec_queue_pair_count(struct rte_cryptodev *dev)
1606 {
1607         PMD_INIT_FUNC_TRACE();
1608
1609         return dev->data->nb_queue_pairs;
1610 }
1611
1612 /** Returns the size of session structure */
1613 static unsigned int
1614 dpaa_sec_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1615 {
1616         PMD_INIT_FUNC_TRACE();
1617
1618         return sizeof(dpaa_sec_session);
1619 }
1620
1621 static int
1622 dpaa_sec_cipher_init(struct rte_cryptodev *dev __rte_unused,
1623                      struct rte_crypto_sym_xform *xform,
1624                      dpaa_sec_session *session)
1625 {
1626         session->cipher_alg = xform->cipher.algo;
1627         session->iv.length = xform->cipher.iv.length;
1628         session->iv.offset = xform->cipher.iv.offset;
1629         session->cipher_key.data = rte_zmalloc(NULL, xform->cipher.key.length,
1630                                                RTE_CACHE_LINE_SIZE);
1631         if (session->cipher_key.data == NULL && xform->cipher.key.length > 0) {
1632                 DPAA_SEC_ERR("No Memory for cipher key");
1633                 return -ENOMEM;
1634         }
1635         session->cipher_key.length = xform->cipher.key.length;
1636
1637         memcpy(session->cipher_key.data, xform->cipher.key.data,
1638                xform->cipher.key.length);
1639         session->dir = (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?
1640                         DIR_ENC : DIR_DEC;
1641
1642         return 0;
1643 }
1644
1645 static int
1646 dpaa_sec_auth_init(struct rte_cryptodev *dev __rte_unused,
1647                    struct rte_crypto_sym_xform *xform,
1648                    dpaa_sec_session *session)
1649 {
1650         session->auth_alg = xform->auth.algo;
1651         session->auth_key.data = rte_zmalloc(NULL, xform->auth.key.length,
1652                                              RTE_CACHE_LINE_SIZE);
1653         if (session->auth_key.data == NULL && xform->auth.key.length > 0) {
1654                 DPAA_SEC_ERR("No Memory for auth key");
1655                 return -ENOMEM;
1656         }
1657         session->auth_key.length = xform->auth.key.length;
1658         session->digest_length = xform->auth.digest_length;
1659
1660         memcpy(session->auth_key.data, xform->auth.key.data,
1661                xform->auth.key.length);
1662         session->dir = (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) ?
1663                         DIR_ENC : DIR_DEC;
1664
1665         return 0;
1666 }
1667
1668 static int
1669 dpaa_sec_aead_init(struct rte_cryptodev *dev __rte_unused,
1670                    struct rte_crypto_sym_xform *xform,
1671                    dpaa_sec_session *session)
1672 {
1673         session->aead_alg = xform->aead.algo;
1674         session->iv.length = xform->aead.iv.length;
1675         session->iv.offset = xform->aead.iv.offset;
1676         session->auth_only_len = xform->aead.aad_length;
1677         session->aead_key.data = rte_zmalloc(NULL, xform->aead.key.length,
1678                                              RTE_CACHE_LINE_SIZE);
1679         if (session->aead_key.data == NULL && xform->aead.key.length > 0) {
1680                 DPAA_SEC_ERR("No Memory for aead key\n");
1681                 return -ENOMEM;
1682         }
1683         session->aead_key.length = xform->aead.key.length;
1684         session->digest_length = xform->aead.digest_length;
1685
1686         memcpy(session->aead_key.data, xform->aead.key.data,
1687                xform->aead.key.length);
1688         session->dir = (xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT) ?
1689                         DIR_ENC : DIR_DEC;
1690
1691         return 0;
1692 }
1693
1694 static struct qman_fq *
1695 dpaa_sec_attach_rxq(struct dpaa_sec_dev_private *qi)
1696 {
1697         unsigned int i;
1698
1699         for (i = 0; i < qi->max_nb_sessions; i++) {
1700                 if (qi->inq_attach[i] == 0) {
1701                         qi->inq_attach[i] = 1;
1702                         return &qi->inq[i];
1703                 }
1704         }
1705         DPAA_SEC_WARN("All ses session in use %x", qi->max_nb_sessions);
1706
1707         return NULL;
1708 }
1709
1710 static int
1711 dpaa_sec_detach_rxq(struct dpaa_sec_dev_private *qi, struct qman_fq *fq)
1712 {
1713         unsigned int i;
1714
1715         for (i = 0; i < qi->max_nb_sessions; i++) {
1716                 if (&qi->inq[i] == fq) {
1717                         qman_retire_fq(fq, NULL);
1718                         qman_oos_fq(fq);
1719                         qi->inq_attach[i] = 0;
1720                         return 0;
1721                 }
1722         }
1723         return -1;
1724 }
1725
1726 static int
1727 dpaa_sec_attach_sess_q(struct dpaa_sec_qp *qp, dpaa_sec_session *sess)
1728 {
1729         int ret;
1730
1731         sess->qp = qp;
1732         ret = dpaa_sec_prep_cdb(sess);
1733         if (ret) {
1734                 DPAA_SEC_ERR("Unable to prepare sec cdb");
1735                 return -1;
1736         }
1737         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
1738                 ret = rte_dpaa_portal_init((void *)0);
1739                 if (ret) {
1740                         DPAA_SEC_ERR("Failure in affining portal");
1741                         return ret;
1742                 }
1743         }
1744         ret = dpaa_sec_init_rx(sess->inq, dpaa_mem_vtop(&sess->cdb),
1745                                qman_fq_fqid(&qp->outq));
1746         if (ret)
1747                 DPAA_SEC_ERR("Unable to init sec queue");
1748
1749         return ret;
1750 }
1751
1752 static int
1753 dpaa_sec_set_session_parameters(struct rte_cryptodev *dev,
1754                             struct rte_crypto_sym_xform *xform, void *sess)
1755 {
1756         struct dpaa_sec_dev_private *internals = dev->data->dev_private;
1757         dpaa_sec_session *session = sess;
1758
1759         PMD_INIT_FUNC_TRACE();
1760
1761         if (unlikely(sess == NULL)) {
1762                 DPAA_SEC_ERR("invalid session struct");
1763                 return -EINVAL;
1764         }
1765
1766         /* Default IV length = 0 */
1767         session->iv.length = 0;
1768
1769         /* Cipher Only */
1770         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL) {
1771                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
1772                 dpaa_sec_cipher_init(dev, xform, session);
1773
1774         /* Authentication Only */
1775         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1776                    xform->next == NULL) {
1777                 session->cipher_alg = RTE_CRYPTO_CIPHER_NULL;
1778                 dpaa_sec_auth_init(dev, xform, session);
1779
1780         /* Cipher then Authenticate */
1781         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
1782                    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {
1783                 if (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
1784                         dpaa_sec_cipher_init(dev, xform, session);
1785                         dpaa_sec_auth_init(dev, xform->next, session);
1786                 } else {
1787                         DPAA_SEC_ERR("Not supported: Auth then Cipher");
1788                         return -EINVAL;
1789                 }
1790
1791         /* Authenticate then Cipher */
1792         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
1793                    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {
1794                 if (xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
1795                         dpaa_sec_auth_init(dev, xform, session);
1796                         dpaa_sec_cipher_init(dev, xform->next, session);
1797                 } else {
1798                         DPAA_SEC_ERR("Not supported: Auth then Cipher");
1799                         return -EINVAL;
1800                 }
1801
1802         /* AEAD operation for AES-GCM kind of Algorithms */
1803         } else if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD &&
1804                    xform->next == NULL) {
1805                 dpaa_sec_aead_init(dev, xform, session);
1806
1807         } else {
1808                 DPAA_SEC_ERR("Invalid crypto type");
1809                 return -EINVAL;
1810         }
1811         session->ctx_pool = internals->ctx_pool;
1812         session->inq = dpaa_sec_attach_rxq(internals);
1813         if (session->inq == NULL) {
1814                 DPAA_SEC_ERR("unable to attach sec queue");
1815                 goto err1;
1816         }
1817
1818         return 0;
1819
1820 err1:
1821         rte_free(session->cipher_key.data);
1822         rte_free(session->auth_key.data);
1823         memset(session, 0, sizeof(dpaa_sec_session));
1824
1825         return -EINVAL;
1826 }
1827
1828 static int
1829 dpaa_sec_sym_session_configure(struct rte_cryptodev *dev,
1830                 struct rte_crypto_sym_xform *xform,
1831                 struct rte_cryptodev_sym_session *sess,
1832                 struct rte_mempool *mempool)
1833 {
1834         void *sess_private_data;
1835         int ret;
1836
1837         PMD_INIT_FUNC_TRACE();
1838
1839         if (rte_mempool_get(mempool, &sess_private_data)) {
1840                 DPAA_SEC_ERR("Couldn't get object from session mempool");
1841                 return -ENOMEM;
1842         }
1843
1844         ret = dpaa_sec_set_session_parameters(dev, xform, sess_private_data);
1845         if (ret != 0) {
1846                 DPAA_SEC_ERR("failed to configure session parameters");
1847
1848                 /* Return session to mempool */
1849                 rte_mempool_put(mempool, sess_private_data);
1850                 return ret;
1851         }
1852
1853         set_sym_session_private_data(sess, dev->driver_id,
1854                         sess_private_data);
1855
1856
1857         return 0;
1858 }
1859
1860 /** Clear the memory of session so it doesn't leave key material behind */
1861 static void
1862 dpaa_sec_sym_session_clear(struct rte_cryptodev *dev,
1863                 struct rte_cryptodev_sym_session *sess)
1864 {
1865         struct dpaa_sec_dev_private *qi = dev->data->dev_private;
1866         uint8_t index = dev->driver_id;
1867         void *sess_priv = get_sym_session_private_data(sess, index);
1868
1869         PMD_INIT_FUNC_TRACE();
1870
1871         dpaa_sec_session *s = (dpaa_sec_session *)sess_priv;
1872
1873         if (sess_priv) {
1874                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
1875
1876                 if (s->inq)
1877                         dpaa_sec_detach_rxq(qi, s->inq);
1878                 rte_free(s->cipher_key.data);
1879                 rte_free(s->auth_key.data);
1880                 memset(s, 0, sizeof(dpaa_sec_session));
1881                 set_sym_session_private_data(sess, index, NULL);
1882                 rte_mempool_put(sess_mp, sess_priv);
1883         }
1884 }
1885
1886 static int
1887 dpaa_sec_set_ipsec_session(__rte_unused struct rte_cryptodev *dev,
1888                            struct rte_security_session_conf *conf,
1889                            void *sess)
1890 {
1891         struct dpaa_sec_dev_private *internals = dev->data->dev_private;
1892         struct rte_security_ipsec_xform *ipsec_xform = &conf->ipsec;
1893         struct rte_crypto_auth_xform *auth_xform;
1894         struct rte_crypto_cipher_xform *cipher_xform;
1895         dpaa_sec_session *session = (dpaa_sec_session *)sess;
1896
1897         PMD_INIT_FUNC_TRACE();
1898
1899         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
1900                 cipher_xform = &conf->crypto_xform->cipher;
1901                 auth_xform = &conf->crypto_xform->next->auth;
1902         } else {
1903                 auth_xform = &conf->crypto_xform->auth;
1904                 cipher_xform = &conf->crypto_xform->next->cipher;
1905         }
1906         session->proto_alg = conf->protocol;
1907         session->cipher_key.data = rte_zmalloc(NULL,
1908                                                cipher_xform->key.length,
1909                                                RTE_CACHE_LINE_SIZE);
1910         if (session->cipher_key.data == NULL &&
1911                         cipher_xform->key.length > 0) {
1912                 DPAA_SEC_ERR("No Memory for cipher key");
1913                 return -ENOMEM;
1914         }
1915
1916         session->cipher_key.length = cipher_xform->key.length;
1917         session->auth_key.data = rte_zmalloc(NULL,
1918                                         auth_xform->key.length,
1919                                         RTE_CACHE_LINE_SIZE);
1920         if (session->auth_key.data == NULL &&
1921                         auth_xform->key.length > 0) {
1922                 DPAA_SEC_ERR("No Memory for auth key");
1923                 rte_free(session->cipher_key.data);
1924                 return -ENOMEM;
1925         }
1926         session->auth_key.length = auth_xform->key.length;
1927         memcpy(session->cipher_key.data, cipher_xform->key.data,
1928                         cipher_xform->key.length);
1929         memcpy(session->auth_key.data, auth_xform->key.data,
1930                         auth_xform->key.length);
1931
1932         switch (auth_xform->algo) {
1933         case RTE_CRYPTO_AUTH_SHA1_HMAC:
1934                 session->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;
1935                 break;
1936         case RTE_CRYPTO_AUTH_MD5_HMAC:
1937                 session->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;
1938                 break;
1939         case RTE_CRYPTO_AUTH_SHA256_HMAC:
1940                 session->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;
1941                 break;
1942         case RTE_CRYPTO_AUTH_SHA384_HMAC:
1943                 session->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;
1944                 break;
1945         case RTE_CRYPTO_AUTH_SHA512_HMAC:
1946                 session->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;
1947                 break;
1948         case RTE_CRYPTO_AUTH_AES_CMAC:
1949                 session->auth_alg = RTE_CRYPTO_AUTH_AES_CMAC;
1950                 break;
1951         case RTE_CRYPTO_AUTH_NULL:
1952                 session->auth_alg = RTE_CRYPTO_AUTH_NULL;
1953                 break;
1954         case RTE_CRYPTO_AUTH_SHA224_HMAC:
1955         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
1956         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
1957         case RTE_CRYPTO_AUTH_SHA1:
1958         case RTE_CRYPTO_AUTH_SHA256:
1959         case RTE_CRYPTO_AUTH_SHA512:
1960         case RTE_CRYPTO_AUTH_SHA224:
1961         case RTE_CRYPTO_AUTH_SHA384:
1962         case RTE_CRYPTO_AUTH_MD5:
1963         case RTE_CRYPTO_AUTH_AES_GMAC:
1964         case RTE_CRYPTO_AUTH_KASUMI_F9:
1965         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
1966         case RTE_CRYPTO_AUTH_ZUC_EIA3:
1967                 DPAA_SEC_ERR("Crypto: Unsupported auth alg %u",
1968                         auth_xform->algo);
1969                 goto out;
1970         default:
1971                 DPAA_SEC_ERR("Crypto: Undefined Auth specified %u",
1972                         auth_xform->algo);
1973                 goto out;
1974         }
1975
1976         switch (cipher_xform->algo) {
1977         case RTE_CRYPTO_CIPHER_AES_CBC:
1978                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;
1979                 break;
1980         case RTE_CRYPTO_CIPHER_3DES_CBC:
1981                 session->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;
1982                 break;
1983         case RTE_CRYPTO_CIPHER_AES_CTR:
1984                 session->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;
1985                 break;
1986         case RTE_CRYPTO_CIPHER_NULL:
1987         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
1988         case RTE_CRYPTO_CIPHER_3DES_ECB:
1989         case RTE_CRYPTO_CIPHER_AES_ECB:
1990         case RTE_CRYPTO_CIPHER_KASUMI_F8:
1991                 DPAA_SEC_ERR("Crypto: Unsupported Cipher alg %u",
1992                         cipher_xform->algo);
1993                 goto out;
1994         default:
1995                 DPAA_SEC_ERR("Crypto: Undefined Cipher specified %u",
1996                         cipher_xform->algo);
1997                 goto out;
1998         }
1999
2000         if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
2001                 memset(&session->encap_pdb, 0, sizeof(struct ipsec_encap_pdb) +
2002                                 sizeof(session->ip4_hdr));
2003                 session->ip4_hdr.ip_v = IPVERSION;
2004                 session->ip4_hdr.ip_hl = 5;
2005                 session->ip4_hdr.ip_len = rte_cpu_to_be_16(
2006                                                 sizeof(session->ip4_hdr));
2007                 session->ip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;
2008                 session->ip4_hdr.ip_id = 0;
2009                 session->ip4_hdr.ip_off = 0;
2010                 session->ip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;
2011                 session->ip4_hdr.ip_p = (ipsec_xform->proto ==
2012                                 RTE_SECURITY_IPSEC_SA_PROTO_ESP) ? IPPROTO_ESP
2013                                 : IPPROTO_AH;
2014                 session->ip4_hdr.ip_sum = 0;
2015                 session->ip4_hdr.ip_src = ipsec_xform->tunnel.ipv4.src_ip;
2016                 session->ip4_hdr.ip_dst = ipsec_xform->tunnel.ipv4.dst_ip;
2017                 session->ip4_hdr.ip_sum = calc_chksum((uint16_t *)
2018                                                 (void *)&session->ip4_hdr,
2019                                                 sizeof(struct ip));
2020
2021                 session->encap_pdb.options =
2022                         (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |
2023                         PDBOPTS_ESP_OIHI_PDB_INL |
2024                         PDBOPTS_ESP_IVSRC |
2025                         PDBHMO_ESP_ENCAP_DTTL;
2026                 session->encap_pdb.spi = ipsec_xform->spi;
2027                 session->encap_pdb.ip_hdr_len = sizeof(struct ip);
2028
2029                 session->dir = DIR_ENC;
2030         } else if (ipsec_xform->direction ==
2031                         RTE_SECURITY_IPSEC_SA_DIR_INGRESS) {
2032                 memset(&session->decap_pdb, 0, sizeof(struct ipsec_decap_pdb));
2033                 session->decap_pdb.options = sizeof(struct ip) << 16;
2034                 session->dir = DIR_DEC;
2035         } else
2036                 goto out;
2037         session->ctx_pool = internals->ctx_pool;
2038         session->inq = dpaa_sec_attach_rxq(internals);
2039         if (session->inq == NULL) {
2040                 DPAA_SEC_ERR("unable to attach sec queue");
2041                 goto out;
2042         }
2043
2044
2045         return 0;
2046 out:
2047         rte_free(session->auth_key.data);
2048         rte_free(session->cipher_key.data);
2049         memset(session, 0, sizeof(dpaa_sec_session));
2050         return -1;
2051 }
2052
2053 static int
2054 dpaa_sec_security_session_create(void *dev,
2055                                  struct rte_security_session_conf *conf,
2056                                  struct rte_security_session *sess,
2057                                  struct rte_mempool *mempool)
2058 {
2059         void *sess_private_data;
2060         struct rte_cryptodev *cdev = (struct rte_cryptodev *)dev;
2061         int ret;
2062
2063         if (rte_mempool_get(mempool, &sess_private_data)) {
2064                 DPAA_SEC_ERR("Couldn't get object from session mempool");
2065                 return -ENOMEM;
2066         }
2067
2068         switch (conf->protocol) {
2069         case RTE_SECURITY_PROTOCOL_IPSEC:
2070                 ret = dpaa_sec_set_ipsec_session(cdev, conf,
2071                                 sess_private_data);
2072                 break;
2073         case RTE_SECURITY_PROTOCOL_MACSEC:
2074                 return -ENOTSUP;
2075         default:
2076                 return -EINVAL;
2077         }
2078         if (ret != 0) {
2079                 DPAA_SEC_ERR("failed to configure session parameters");
2080                 /* Return session to mempool */
2081                 rte_mempool_put(mempool, sess_private_data);
2082                 return ret;
2083         }
2084
2085         set_sec_session_private_data(sess, sess_private_data);
2086
2087         return ret;
2088 }
2089
2090 /** Clear the memory of session so it doesn't leave key material behind */
2091 static int
2092 dpaa_sec_security_session_destroy(void *dev __rte_unused,
2093                 struct rte_security_session *sess)
2094 {
2095         PMD_INIT_FUNC_TRACE();
2096         void *sess_priv = get_sec_session_private_data(sess);
2097
2098         dpaa_sec_session *s = (dpaa_sec_session *)sess_priv;
2099
2100         if (sess_priv) {
2101                 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
2102
2103                 rte_free(s->cipher_key.data);
2104                 rte_free(s->auth_key.data);
2105                 memset(sess, 0, sizeof(dpaa_sec_session));
2106                 set_sec_session_private_data(sess, NULL);
2107                 rte_mempool_put(sess_mp, sess_priv);
2108         }
2109         return 0;
2110 }
2111
2112
2113 static int
2114 dpaa_sec_dev_configure(struct rte_cryptodev *dev,
2115                        struct rte_cryptodev_config *config __rte_unused)
2116 {
2117
2118         char str[20];
2119         struct dpaa_sec_dev_private *internals;
2120
2121         PMD_INIT_FUNC_TRACE();
2122
2123         internals = dev->data->dev_private;
2124         sprintf(str, "ctx_pool_%d", dev->data->dev_id);
2125         if (!internals->ctx_pool) {
2126                 internals->ctx_pool = rte_mempool_create((const char *)str,
2127                                                         CTX_POOL_NUM_BUFS,
2128                                                         CTX_POOL_BUF_SIZE,
2129                                                         CTX_POOL_CACHE_SIZE, 0,
2130                                                         NULL, NULL, NULL, NULL,
2131                                                         SOCKET_ID_ANY, 0);
2132                 if (!internals->ctx_pool) {
2133                         DPAA_SEC_ERR("%s create failed\n", str);
2134                         return -ENOMEM;
2135                 }
2136         } else
2137                 DPAA_SEC_INFO("mempool already created for dev_id : %d",
2138                                 dev->data->dev_id);
2139
2140         return 0;
2141 }
2142
2143 static int
2144 dpaa_sec_dev_start(struct rte_cryptodev *dev __rte_unused)
2145 {
2146         PMD_INIT_FUNC_TRACE();
2147         return 0;
2148 }
2149
2150 static void
2151 dpaa_sec_dev_stop(struct rte_cryptodev *dev __rte_unused)
2152 {
2153         PMD_INIT_FUNC_TRACE();
2154 }
2155
2156 static int
2157 dpaa_sec_dev_close(struct rte_cryptodev *dev)
2158 {
2159         struct dpaa_sec_dev_private *internals;
2160
2161         PMD_INIT_FUNC_TRACE();
2162
2163         if (dev == NULL)
2164                 return -ENOMEM;
2165
2166         internals = dev->data->dev_private;
2167         rte_mempool_free(internals->ctx_pool);
2168         internals->ctx_pool = NULL;
2169
2170         return 0;
2171 }
2172
2173 static void
2174 dpaa_sec_dev_infos_get(struct rte_cryptodev *dev,
2175                        struct rte_cryptodev_info *info)
2176 {
2177         struct dpaa_sec_dev_private *internals = dev->data->dev_private;
2178
2179         PMD_INIT_FUNC_TRACE();
2180         if (info != NULL) {
2181                 info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
2182                 info->feature_flags = dev->feature_flags;
2183                 info->capabilities = dpaa_sec_capabilities;
2184                 info->sym.max_nb_sessions = internals->max_nb_sessions;
2185                 info->driver_id = cryptodev_driver_id;
2186         }
2187 }
2188
2189 static struct rte_cryptodev_ops crypto_ops = {
2190         .dev_configure        = dpaa_sec_dev_configure,
2191         .dev_start            = dpaa_sec_dev_start,
2192         .dev_stop             = dpaa_sec_dev_stop,
2193         .dev_close            = dpaa_sec_dev_close,
2194         .dev_infos_get        = dpaa_sec_dev_infos_get,
2195         .queue_pair_setup     = dpaa_sec_queue_pair_setup,
2196         .queue_pair_release   = dpaa_sec_queue_pair_release,
2197         .queue_pair_count     = dpaa_sec_queue_pair_count,
2198         .sym_session_get_size     = dpaa_sec_sym_session_get_size,
2199         .sym_session_configure    = dpaa_sec_sym_session_configure,
2200         .sym_session_clear        = dpaa_sec_sym_session_clear
2201 };
2202
2203 static const struct rte_security_capability *
2204 dpaa_sec_capabilities_get(void *device __rte_unused)
2205 {
2206         return dpaa_sec_security_cap;
2207 }
2208
2209 struct rte_security_ops dpaa_sec_security_ops = {
2210         .session_create = dpaa_sec_security_session_create,
2211         .session_update = NULL,
2212         .session_stats_get = NULL,
2213         .session_destroy = dpaa_sec_security_session_destroy,
2214         .set_pkt_metadata = NULL,
2215         .capabilities_get = dpaa_sec_capabilities_get
2216 };
2217
2218 static int
2219 dpaa_sec_uninit(struct rte_cryptodev *dev)
2220 {
2221         struct dpaa_sec_dev_private *internals;
2222
2223         if (dev == NULL)
2224                 return -ENODEV;
2225
2226         internals = dev->data->dev_private;
2227         rte_free(dev->security_ctx);
2228
2229         /* In case close has been called, internals->ctx_pool would be NULL */
2230         rte_mempool_free(internals->ctx_pool);
2231         rte_free(internals);
2232
2233         DPAA_SEC_INFO("Closing DPAA_SEC device %s on numa socket %u",
2234                       dev->data->name, rte_socket_id());
2235
2236         return 0;
2237 }
2238
2239 static int
2240 dpaa_sec_dev_init(struct rte_cryptodev *cryptodev)
2241 {
2242         struct dpaa_sec_dev_private *internals;
2243         struct rte_security_ctx *security_instance;
2244         struct dpaa_sec_qp *qp;
2245         uint32_t i, flags;
2246         int ret;
2247
2248         PMD_INIT_FUNC_TRACE();
2249
2250         cryptodev->driver_id = cryptodev_driver_id;
2251         cryptodev->dev_ops = &crypto_ops;
2252
2253         cryptodev->enqueue_burst = dpaa_sec_enqueue_burst;
2254         cryptodev->dequeue_burst = dpaa_sec_dequeue_burst;
2255         cryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
2256                         RTE_CRYPTODEV_FF_HW_ACCELERATED |
2257                         RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
2258                         RTE_CRYPTODEV_FF_SECURITY |
2259                         RTE_CRYPTODEV_FF_IN_PLACE_SGL |
2260                         RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
2261                         RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
2262                         RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT |
2263                         RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
2264
2265         internals = cryptodev->data->dev_private;
2266         internals->max_nb_queue_pairs = RTE_DPAA_MAX_NB_SEC_QPS;
2267         internals->max_nb_sessions = RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS;
2268
2269         /*
2270          * For secondary processes, we don't initialise any further as primary
2271          * has already done this work. Only check we don't need a different
2272          * RX function
2273          */
2274         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2275                 DPAA_SEC_WARN("Device already init by primary process");
2276                 return 0;
2277         }
2278
2279         /* Initialize security_ctx only for primary process*/
2280         security_instance = rte_malloc("rte_security_instances_ops",
2281                                 sizeof(struct rte_security_ctx), 0);
2282         if (security_instance == NULL)
2283                 return -ENOMEM;
2284         security_instance->device = (void *)cryptodev;
2285         security_instance->ops = &dpaa_sec_security_ops;
2286         security_instance->sess_cnt = 0;
2287         cryptodev->security_ctx = security_instance;
2288
2289         for (i = 0; i < internals->max_nb_queue_pairs; i++) {
2290                 /* init qman fq for queue pair */
2291                 qp = &internals->qps[i];
2292                 ret = dpaa_sec_init_tx(&qp->outq);
2293                 if (ret) {
2294                         DPAA_SEC_ERR("config tx of queue pair  %d", i);
2295                         goto init_error;
2296                 }
2297         }
2298
2299         flags = QMAN_FQ_FLAG_LOCKED | QMAN_FQ_FLAG_DYNAMIC_FQID |
2300                 QMAN_FQ_FLAG_TO_DCPORTAL;
2301         for (i = 0; i < internals->max_nb_sessions; i++) {
2302                 /* create rx qman fq for sessions*/
2303                 ret = qman_create_fq(0, flags, &internals->inq[i]);
2304                 if (unlikely(ret != 0)) {
2305                         DPAA_SEC_ERR("sec qman_create_fq failed");
2306                         goto init_error;
2307                 }
2308         }
2309
2310         RTE_LOG(INFO, PMD, "%s cryptodev init\n", cryptodev->data->name);
2311         return 0;
2312
2313 init_error:
2314         DPAA_SEC_ERR("driver %s: create failed\n", cryptodev->data->name);
2315
2316         dpaa_sec_uninit(cryptodev);
2317         return -EFAULT;
2318 }
2319
2320 static int
2321 cryptodev_dpaa_sec_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
2322                                 struct rte_dpaa_device *dpaa_dev)
2323 {
2324         struct rte_cryptodev *cryptodev;
2325         char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
2326
2327         int retval;
2328
2329         sprintf(cryptodev_name, "dpaa_sec-%d", dpaa_dev->id.dev_id);
2330
2331         cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
2332         if (cryptodev == NULL)
2333                 return -ENOMEM;
2334
2335         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2336                 cryptodev->data->dev_private = rte_zmalloc_socket(
2337                                         "cryptodev private structure",
2338                                         sizeof(struct dpaa_sec_dev_private),
2339                                         RTE_CACHE_LINE_SIZE,
2340                                         rte_socket_id());
2341
2342                 if (cryptodev->data->dev_private == NULL)
2343                         rte_panic("Cannot allocate memzone for private "
2344                                         "device data");
2345         }
2346
2347         dpaa_dev->crypto_dev = cryptodev;
2348         cryptodev->device = &dpaa_dev->device;
2349
2350         /* init user callbacks */
2351         TAILQ_INIT(&(cryptodev->link_intr_cbs));
2352
2353         /* if sec device version is not configured */
2354         if (!rta_get_sec_era()) {
2355                 const struct device_node *caam_node;
2356
2357                 for_each_compatible_node(caam_node, NULL, "fsl,sec-v4.0") {
2358                         const uint32_t *prop = of_get_property(caam_node,
2359                                         "fsl,sec-era",
2360                                         NULL);
2361                         if (prop) {
2362                                 rta_set_sec_era(
2363                                         INTL_SEC_ERA(rte_cpu_to_be_32(*prop)));
2364                                 break;
2365                         }
2366                 }
2367         }
2368
2369         /* Invoke PMD device initialization function */
2370         retval = dpaa_sec_dev_init(cryptodev);
2371         if (retval == 0)
2372                 return 0;
2373
2374         /* In case of error, cleanup is done */
2375         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2376                 rte_free(cryptodev->data->dev_private);
2377
2378         rte_cryptodev_pmd_release_device(cryptodev);
2379
2380         return -ENXIO;
2381 }
2382
2383 static int
2384 cryptodev_dpaa_sec_remove(struct rte_dpaa_device *dpaa_dev)
2385 {
2386         struct rte_cryptodev *cryptodev;
2387         int ret;
2388
2389         cryptodev = dpaa_dev->crypto_dev;
2390         if (cryptodev == NULL)
2391                 return -ENODEV;
2392
2393         ret = dpaa_sec_uninit(cryptodev);
2394         if (ret)
2395                 return ret;
2396
2397         return rte_cryptodev_pmd_destroy(cryptodev);
2398 }
2399
2400 static struct rte_dpaa_driver rte_dpaa_sec_driver = {
2401         .drv_type = FSL_DPAA_CRYPTO,
2402         .driver = {
2403                 .name = "DPAA SEC PMD"
2404         },
2405         .probe = cryptodev_dpaa_sec_probe,
2406         .remove = cryptodev_dpaa_sec_remove,
2407 };
2408
2409 static struct cryptodev_driver dpaa_sec_crypto_drv;
2410
2411 RTE_PMD_REGISTER_DPAA(CRYPTODEV_NAME_DPAA_SEC_PMD, rte_dpaa_sec_driver);
2412 RTE_PMD_REGISTER_CRYPTO_DRIVER(dpaa_sec_crypto_drv, rte_dpaa_sec_driver.driver,
2413                 cryptodev_driver_id);
2414
2415 RTE_INIT(dpaa_sec_init_log)
2416 {
2417         dpaa_logtype_sec = rte_log_register("pmd.crypto.dpaa");
2418         if (dpaa_logtype_sec >= 0)
2419                 rte_log_set_level(dpaa_logtype_sec, RTE_LOG_NOTICE);
2420 }