drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10 #include <rte_event_crypto_adapter.h>
  11
  12 #include "otx2_cryptodev.h"
  13 #include "otx2_cryptodev_capabilities.h"
  14 #include "otx2_cryptodev_hw_access.h"
  15 #include "otx2_cryptodev_mbox.h"
  16 #include "otx2_cryptodev_ops.h"
  17 #include "otx2_cryptodev_ops_helper.h"
  18 #include "otx2_ipsec_anti_replay.h"
  19 #include "otx2_ipsec_po_ops.h"
  20 #include "otx2_mbox.h"
  21 #include "otx2_sec_idev.h"
  22 #include "otx2_security.h"
  23
  24 #include "cpt_hw_types.h"
  25 #include "cpt_pmd_logs.h"
  26 #include "cpt_pmd_ops_helper.h"
  27 #include "cpt_ucode.h"
  28 #include "cpt_ucode_asym.h"
  29
  30 #define METABUF_POOL_CACHE_SIZE 512
  31
  32 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  33
  34 /* Forward declarations */
  35
  36 static int
  37 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  38
  39 static void
  40 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  41 {
  42         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  43 }
  44
  45 static int
  46 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  47                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  48                                 unsigned int nb_elements)
  49 {
  50         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  51         struct cpt_qp_meta_info *meta_info;
  52         int ret, max_mlen, mb_pool_sz;
  53         struct rte_mempool *pool;
  54         int asym_mlen = 0;
  55         int lb_mlen = 0;
  56         int sg_mlen = 0;
  57
  58         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  59
  60                 /* Get meta len for scatter gather mode */
  61                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  62
  63                 /* Extra 32B saved for future considerations */
  64                 sg_mlen += 4 * sizeof(uint64_t);
  65
  66                 /* Get meta len for linear buffer (direct) mode */
  67                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  68
  69                 /* Extra 32B saved for future considerations */
  70                 lb_mlen += 4 * sizeof(uint64_t);
  71         }
  72
  73         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  74
  75                 /* Get meta len required for asymmetric operations */
  76                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  77         }
  78
  79         /*
  80          * Check max requirement for meta buffer to
  81          * support crypto op of any type (sym/asym).
  82          */
  83         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  84
  85         /* Allocate mempool */
  86
  87         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  88                  dev->data->dev_id, qp_id);
  89
  90         mb_pool_sz = RTE_MAX(nb_elements, (METABUF_POOL_CACHE_SIZE * rte_lcore_count()));
  91
  92         pool = rte_mempool_create_empty(mempool_name, mb_pool_sz, max_mlen,
  93                                         METABUF_POOL_CACHE_SIZE, 0,
  94                                         rte_socket_id(), 0);
  95
  96         if (pool == NULL) {
  97                 CPT_LOG_ERR("Could not create mempool for metabuf");
  98                 return rte_errno;
  99         }
 100
 101         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
 102                                          NULL);
 103         if (ret) {
 104                 CPT_LOG_ERR("Could not set mempool ops");
 105                 goto mempool_free;
 106         }
 107
 108         ret = rte_mempool_populate_default(pool);
 109         if (ret <= 0) {
 110                 CPT_LOG_ERR("Could not populate metabuf pool");
 111                 goto mempool_free;
 112         }
 113
 114         meta_info = &qp->meta_info;
 115
 116         meta_info->pool = pool;
 117         meta_info->lb_mlen = lb_mlen;
 118         meta_info->sg_mlen = sg_mlen;
 119
 120         return 0;
 121
 122 mempool_free:
 123         rte_mempool_free(pool);
 124         return ret;
 125 }
 126
 127 static void
 128 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 129 {
 130         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 131
 132         rte_mempool_free(meta_info->pool);
 133
 134         meta_info->pool = NULL;
 135         meta_info->lb_mlen = 0;
 136         meta_info->sg_mlen = 0;
 137 }
 138
 139 static int
 140 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 141 {
 142         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 143         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 144         int i, ret;
 145
 146         for (i = 0; i < nb_ethport; i++) {
 147                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 148                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 149                         break;
 150         }
 151
 152         if (i >= nb_ethport)
 153                 return 0;
 154
 155         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 156         if (ret)
 157                 return ret;
 158
 159         /* Publish inline Tx QP to eth dev security */
 160         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 161         if (ret)
 162                 return ret;
 163
 164         return 0;
 165 }
 166
 167 static struct otx2_cpt_qp *
 168 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 169                    uint8_t group)
 170 {
 171         struct otx2_cpt_vf *vf = dev->data->dev_private;
 172         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 173         const struct rte_memzone *lf_mem;
 174         uint32_t len, iq_len, size_div40;
 175         char name[RTE_MEMZONE_NAMESIZE];
 176         uint64_t used_len, iova;
 177         struct otx2_cpt_qp *qp;
 178         uint64_t lmtline;
 179         uint8_t *va;
 180         int ret;
 181
 182         /* Allocate queue pair */
 183         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 184                                 OTX2_ALIGN, 0);
 185         if (qp == NULL) {
 186                 CPT_LOG_ERR("Could not allocate queue pair");
 187                 return NULL;
 188         }
 189
 190         iq_len = OTX2_CPT_IQ_LEN;
 191
 192         /*
 193          * Queue size must be a multiple of 40 and effective queue size to
 194          * software is (size_div40 - 1) * 40
 195          */
 196         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 197
 198         /* For pending queue */
 199         len = iq_len * sizeof(uintptr_t);
 200
 201         /* Space for instruction group memory */
 202         len += size_div40 * 16;
 203
 204         /* So that instruction queues start as pg size aligned */
 205         len = RTE_ALIGN(len, pg_sz);
 206
 207         /* For instruction queues */
 208         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 209
 210         /* Wastage after instruction queues */
 211         len = RTE_ALIGN(len, pg_sz);
 212
 213         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 214                             qp_id);
 215
 216         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 217                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 218                         RTE_CACHE_LINE_SIZE);
 219         if (lf_mem == NULL) {
 220                 CPT_LOG_ERR("Could not allocate reserved memzone");
 221                 goto qp_free;
 222         }
 223
 224         va = lf_mem->addr;
 225         iova = lf_mem->iova;
 226
 227         memset(va, 0, len);
 228
 229         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 230         if (ret) {
 231                 CPT_LOG_ERR("Could not create mempool for metabuf");
 232                 goto lf_mem_free;
 233         }
 234
 235         /* Initialize pending queue */
 236         qp->pend_q.req_queue = (uintptr_t *)va;
 237         qp->pend_q.enq_tail = 0;
 238         qp->pend_q.deq_head = 0;
 239         qp->pend_q.pending_count = 0;
 240
 241         used_len = iq_len * sizeof(uintptr_t);
 242         used_len += size_div40 * 16;
 243         used_len = RTE_ALIGN(used_len, pg_sz);
 244         iova += used_len;
 245
 246         qp->iq_dma_addr = iova;
 247         qp->id = qp_id;
 248         qp->blkaddr = vf->lf_blkaddr[qp_id];
 249         qp->base = OTX2_CPT_LF_BAR2(vf, qp->blkaddr, qp_id);
 250
 251         lmtline = vf->otx2_dev.bar2 +
 252                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 253                   OTX2_LMT_LF_LMTLINE(0);
 254
 255         qp->lmtline = (void *)lmtline;
 256
 257         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 258
 259         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 260         if (ret && (ret != -ENOENT)) {
 261                 CPT_LOG_ERR("Could not delete inline configuration");
 262                 goto mempool_destroy;
 263         }
 264
 265         otx2_cpt_iq_disable(qp);
 266
 267         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 268         if (ret) {
 269                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 270                 goto mempool_destroy;
 271         }
 272
 273         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 274                                  size_div40);
 275         if (ret) {
 276                 CPT_LOG_ERR("Could not enable instruction queue");
 277                 goto mempool_destroy;
 278         }
 279
 280         return qp;
 281
 282 mempool_destroy:
 283         otx2_cpt_metabuf_mempool_destroy(qp);
 284 lf_mem_free:
 285         rte_memzone_free(lf_mem);
 286 qp_free:
 287         rte_free(qp);
 288         return NULL;
 289 }
 290
 291 static int
 292 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 293 {
 294         const struct rte_memzone *lf_mem;
 295         char name[RTE_MEMZONE_NAMESIZE];
 296         int ret;
 297
 298         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 299         if (ret && (ret != -ENOENT)) {
 300                 CPT_LOG_ERR("Could not delete inline configuration");
 301                 return ret;
 302         }
 303
 304         otx2_cpt_iq_disable(qp);
 305
 306         otx2_cpt_metabuf_mempool_destroy(qp);
 307
 308         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 309                             qp->id);
 310
 311         lf_mem = rte_memzone_lookup(name);
 312
 313         ret = rte_memzone_free(lf_mem);
 314         if (ret)
 315                 return ret;
 316
 317         rte_free(qp);
 318
 319         return 0;
 320 }
 321
 322 static int
 323 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 324 {
 325         if (xform->next) {
 326                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 327                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 328                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
 329                     (xform->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC ||
 330                      xform->next->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC))
 331                         return -ENOTSUP;
 332
 333                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 334                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 335                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 336                     (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC ||
 337                      xform->next->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC))
 338                         return -ENOTSUP;
 339
 340                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 341                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 342                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 343                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 344                         return -ENOTSUP;
 345
 346                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 347                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 348                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 349                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 350                         return -ENOTSUP;
 351
 352         } else {
 353                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 354                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 355                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 356                         return -ENOTSUP;
 357         }
 358         return 0;
 359 }
 360
 361 static int
 362 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 363                       struct rte_cryptodev_sym_session *sess,
 364                       struct rte_mempool *pool)
 365 {
 366         struct rte_crypto_sym_xform *temp_xform = xform;
 367         struct cpt_sess_misc *misc;
 368         vq_cmd_word3_t vq_cmd_w3;
 369         void *priv;
 370         int ret;
 371
 372         ret = sym_xform_verify(xform);
 373         if (unlikely(ret))
 374                 return ret;
 375
 376         if (unlikely(rte_mempool_get(pool, &priv))) {
 377                 CPT_LOG_ERR("Could not allocate session private data");
 378                 return -ENOMEM;
 379         }
 380
 381         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 382                         offsetof(struct cpt_ctx, mc_ctx));
 383
 384         misc = priv;
 385
 386         for ( ; xform != NULL; xform = xform->next) {
 387                 switch (xform->type) {
 388                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 389                         ret = fill_sess_aead(xform, misc);
 390                         break;
 391                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 392                         ret = fill_sess_cipher(xform, misc);
 393                         break;
 394                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 395                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 396                                 ret = fill_sess_gmac(xform, misc);
 397                         else
 398                                 ret = fill_sess_auth(xform, misc);
 399                         break;
 400                 default:
 401                         ret = -1;
 402                 }
 403
 404                 if (ret)
 405                         goto priv_put;
 406         }
 407
 408         if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) &&
 409                         cpt_mac_len_verify(&temp_xform->auth)) {
 410                 CPT_LOG_ERR("MAC length is not supported");
 411                 struct cpt_ctx *ctx = SESS_PRIV(misc);
 412                 if (ctx->auth_key != NULL) {
 413                         rte_free(ctx->auth_key);
 414                         ctx->auth_key = NULL;
 415                 }
 416                 ret = -ENOTSUP;
 417                 goto priv_put;
 418         }
 419
 420         set_sym_session_private_data(sess, driver_id, misc);
 421
 422         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 423                              sizeof(struct cpt_sess_misc);
 424
 425         vq_cmd_w3.u64 = 0;
 426         vq_cmd_w3.s.cptr = misc->ctx_dma_addr + offsetof(struct cpt_ctx,
 427                                                          mc_ctx);
 428
 429         /*
 430          * IE engines support IPsec operations
 431          * SE engines support IPsec operations, Chacha-Poly and
 432          * Air-Crypto operations
 433          */
 434         if (misc->zsk_flag || misc->chacha_poly)
 435                 vq_cmd_w3.s.grp = OTX2_CPT_EGRP_SE;
 436         else
 437                 vq_cmd_w3.s.grp = OTX2_CPT_EGRP_SE_IE;
 438
 439         misc->cpt_inst_w7 = vq_cmd_w3.u64;
 440
 441         return 0;
 442
 443 priv_put:
 444         rte_mempool_put(pool, priv);
 445
 446         return -ENOTSUP;
 447 }
 448
 449 static __rte_always_inline int32_t __rte_hot
 450 otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
 451                     struct cpt_request_info *req,
 452                     void *lmtline,
 453                     struct rte_crypto_op *op,
 454                     uint64_t cpt_inst_w7)
 455 {
 456         union rte_event_crypto_metadata *m_data;
 457         union cpt_inst_s inst;
 458         uint64_t lmt_status;
 459
 460         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 461                 m_data = rte_cryptodev_sym_session_get_user_data(
 462                                                 op->sym->session);
 463                 if (m_data == NULL) {
 464                         rte_pktmbuf_free(op->sym->m_src);
 465                         rte_crypto_op_free(op);
 466                         rte_errno = EINVAL;
 467                         return -EINVAL;
 468                 }
 469         } else if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS &&
 470                    op->private_data_offset) {
 471                 m_data = (union rte_event_crypto_metadata *)
 472                          ((uint8_t *)op +
 473                           op->private_data_offset);
 474         } else {
 475                 return -EINVAL;
 476         }
 477
 478         inst.u[0] = 0;
 479         inst.s9x.res_addr = req->comp_baddr;
 480         inst.u[2] = 0;
 481         inst.u[3] = 0;
 482
 483         inst.s9x.ei0 = req->ist.ei0;
 484         inst.s9x.ei1 = req->ist.ei1;
 485         inst.s9x.ei2 = req->ist.ei2;
 486         inst.s9x.ei3 = cpt_inst_w7;
 487
 488         inst.u[2] = (((RTE_EVENT_TYPE_CRYPTODEV << 28) |
 489                       m_data->response_info.flow_id) |
 490                      ((uint64_t)m_data->response_info.sched_type << 32) |
 491                      ((uint64_t)m_data->response_info.queue_id << 34));
 492         inst.u[3] = 1 | (((uint64_t)req >> 3) << 3);
 493         req->qp = qp;
 494
 495         do {
 496                 /* Copy CPT command to LMTLINE */
 497                 memcpy(lmtline, &inst, sizeof(inst));
 498
 499                 /*
 500                  * Make sure compiler does not reorder memcpy and ldeor.
 501                  * LMTST transactions are always flushed from the write
 502                  * buffer immediately, a DMB is not required to push out
 503                  * LMTSTs.
 504                  */
 505                 rte_io_wmb();
 506                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 507         } while (lmt_status == 0);
 508
 509         return 0;
 510 }
 511
 512 static __rte_always_inline int32_t __rte_hot
 513 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 514                      struct pending_queue *pend_q,
 515                      struct cpt_request_info *req,
 516                      struct rte_crypto_op *op,
 517                      uint64_t cpt_inst_w7)
 518 {
 519         void *lmtline = qp->lmtline;
 520         union cpt_inst_s inst;
 521         uint64_t lmt_status;
 522
 523         if (qp->ca_enable)
 524                 return otx2_ca_enqueue_req(qp, req, lmtline, op, cpt_inst_w7);
 525
 526         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 527                 return -EAGAIN;
 528
 529         inst.u[0] = 0;
 530         inst.s9x.res_addr = req->comp_baddr;
 531         inst.u[2] = 0;
 532         inst.u[3] = 0;
 533
 534         inst.s9x.ei0 = req->ist.ei0;
 535         inst.s9x.ei1 = req->ist.ei1;
 536         inst.s9x.ei2 = req->ist.ei2;
 537         inst.s9x.ei3 = cpt_inst_w7;
 538
 539         req->time_out = rte_get_timer_cycles() +
 540                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 541
 542         do {
 543                 /* Copy CPT command to LMTLINE */
 544                 memcpy(lmtline, &inst, sizeof(inst));
 545
 546                 /*
 547                  * Make sure compiler does not reorder memcpy and ldeor.
 548                  * LMTST transactions are always flushed from the write
 549                  * buffer immediately, a DMB is not required to push out
 550                  * LMTSTs.
 551                  */
 552                 rte_io_wmb();
 553                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 554         } while (lmt_status == 0);
 555
 556         pend_q->req_queue[pend_q->enq_tail] = (uintptr_t)req;
 557
 558         /* We will use soft queue length here to limit requests */
 559         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 560         pend_q->pending_count += 1;
 561
 562         return 0;
 563 }
 564
 565 static __rte_always_inline int32_t __rte_hot
 566 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 567                       struct rte_crypto_op *op,
 568                       struct pending_queue *pend_q)
 569 {
 570         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 571         struct rte_crypto_asym_op *asym_op = op->asym;
 572         struct asym_op_params params = {0};
 573         struct cpt_asym_sess_misc *sess;
 574         uintptr_t *cop;
 575         void *mdata;
 576         int ret;
 577
 578         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 579                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 580                 return -ENOMEM;
 581         }
 582
 583         sess = get_asym_session_private_data(asym_op->session,
 584                                              otx2_cryptodev_driver_id);
 585
 586         /* Store IO address of the mdata to meta_buf */
 587         params.meta_buf = rte_mempool_virt2iova(mdata);
 588
 589         cop = mdata;
 590         cop[0] = (uintptr_t)mdata;
 591         cop[1] = (uintptr_t)op;
 592         cop[2] = cop[3] = 0ULL;
 593
 594         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 595         params.req->op = cop;
 596
 597         /* Adjust meta_buf to point to end of cpt_request_info structure */
 598         params.meta_buf += (4 * sizeof(uintptr_t)) +
 599                             sizeof(struct cpt_request_info);
 600         switch (sess->xfrm_type) {
 601         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 602                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 603                 if (unlikely(ret))
 604                         goto req_fail;
 605                 break;
 606         case RTE_CRYPTO_ASYM_XFORM_RSA:
 607                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 608                 if (unlikely(ret))
 609                         goto req_fail;
 610                 break;
 611         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 612                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 613                 if (unlikely(ret))
 614                         goto req_fail;
 615                 break;
 616         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 617                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 618                                     sess->ec_ctx.curveid);
 619                 if (unlikely(ret))
 620                         goto req_fail;
 621                 break;
 622         default:
 623                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 624                 ret = -EINVAL;
 625                 goto req_fail;
 626         }
 627
 628         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req, op,
 629                                    sess->cpt_inst_w7);
 630
 631         if (unlikely(ret)) {
 632                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 633                 goto req_fail;
 634         }
 635
 636         return 0;
 637
 638 req_fail:
 639         free_op_meta(mdata, minfo->pool);
 640
 641         return ret;
 642 }
 643
 644 static __rte_always_inline int __rte_hot
 645 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 646                      struct pending_queue *pend_q)
 647 {
 648         struct rte_crypto_sym_op *sym_op = op->sym;
 649         struct cpt_request_info *req;
 650         struct cpt_sess_misc *sess;
 651         uint64_t cpt_op;
 652         void *mdata;
 653         int ret;
 654
 655         sess = get_sym_session_private_data(sym_op->session,
 656                                             otx2_cryptodev_driver_id);
 657
 658         cpt_op = sess->cpt_op;
 659
 660         if (cpt_op & CPT_OP_CIPHER_MASK)
 661                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 662                                      (void **)&req);
 663         else
 664                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 665                                          (void **)&req);
 666
 667         if (unlikely(ret)) {
 668                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 669                                 op, (unsigned int)cpt_op, ret);
 670                 return ret;
 671         }
 672
 673         ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7);
 674
 675         if (unlikely(ret)) {
 676                 /* Free buffer allocated by fill params routines */
 677                 free_op_meta(mdata, qp->meta_info.pool);
 678         }
 679
 680         return ret;
 681 }
 682
 683 static __rte_always_inline int __rte_hot
 684 otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 685                      struct pending_queue *pend_q)
 686 {
 687         uint32_t winsz, esn_low = 0, esn_hi = 0, seql = 0, seqh = 0;
 688         struct rte_mbuf *m_src = op->sym->m_src;
 689         struct otx2_sec_session_ipsec_lp *sess;
 690         struct otx2_ipsec_po_sa_ctl *ctl_wrd;
 691         struct otx2_ipsec_po_in_sa *sa;
 692         struct otx2_sec_session *priv;
 693         struct cpt_request_info *req;
 694         uint64_t seq_in_sa, seq = 0;
 695         uint8_t esn;
 696         int ret;
 697
 698         priv = get_sec_session_private_data(op->sym->sec_session);
 699         sess = &priv->ipsec.lp;
 700         sa = &sess->in_sa;
 701
 702         ctl_wrd = &sa->ctl;
 703         esn = ctl_wrd->esn_en;
 704         winsz = sa->replay_win_sz;
 705
 706         if (ctl_wrd->direction == OTX2_IPSEC_PO_SA_DIRECTION_OUTBOUND)
 707                 ret = process_outb_sa(op, sess, &qp->meta_info, (void **)&req);
 708         else {
 709                 if (winsz) {
 710                         esn_low = rte_be_to_cpu_32(sa->esn_low);
 711                         esn_hi = rte_be_to_cpu_32(sa->esn_hi);
 712                         seql = *rte_pktmbuf_mtod_offset(m_src, uint32_t *,
 713                                 sizeof(struct rte_ipv4_hdr) + 4);
 714                         seql = rte_be_to_cpu_32(seql);
 715
 716                         if (!esn)
 717                                 seq = (uint64_t)seql;
 718                         else {
 719                                 seqh = anti_replay_get_seqh(winsz, seql, esn_hi,
 720                                                 esn_low);
 721                                 seq = ((uint64_t)seqh << 32) | seql;
 722                         }
 723
 724                         if (unlikely(seq == 0))
 725                                 return IPSEC_ANTI_REPLAY_FAILED;
 726
 727                         ret = anti_replay_check(sa->replay, seq, winsz);
 728                         if (unlikely(ret)) {
 729                                 otx2_err("Anti replay check failed");
 730                                 return IPSEC_ANTI_REPLAY_FAILED;
 731                         }
 732                 }
 733
 734                 ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req);
 735         }
 736
 737         if (unlikely(ret)) {
 738                 otx2_err("Crypto req : op %p, ret 0x%x", op, ret);
 739                 return ret;
 740         }
 741
 742         ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7);
 743
 744         if (winsz && esn) {
 745                 seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low;
 746                 if (seq > seq_in_sa) {
 747                         sa->esn_low = rte_cpu_to_be_32(seql);
 748                         sa->esn_hi = rte_cpu_to_be_32(seqh);
 749                 }
 750         }
 751
 752         return ret;
 753 }
 754
 755 static __rte_always_inline int __rte_hot
 756 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 757                               struct pending_queue *pend_q)
 758 {
 759         const int driver_id = otx2_cryptodev_driver_id;
 760         struct rte_crypto_sym_op *sym_op = op->sym;
 761         struct rte_cryptodev_sym_session *sess;
 762         int ret;
 763
 764         /* Create temporary session */
 765         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
 766         if (sess == NULL)
 767                 return -ENOMEM;
 768
 769         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 770                                     qp->sess_mp_priv);
 771         if (ret)
 772                 goto sess_put;
 773
 774         sym_op->session = sess;
 775
 776         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 777
 778         if (unlikely(ret))
 779                 goto priv_put;
 780
 781         return 0;
 782
 783 priv_put:
 784         sym_session_clear(driver_id, sess);
 785 sess_put:
 786         rte_mempool_put(qp->sess_mp, sess);
 787         return ret;
 788 }
 789
 790 static uint16_t
 791 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 792 {
 793         uint16_t nb_allowed, count = 0;
 794         struct otx2_cpt_qp *qp = qptr;
 795         struct pending_queue *pend_q;
 796         struct rte_crypto_op *op;
 797         int ret;
 798
 799         pend_q = &qp->pend_q;
 800
 801         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 802         if (nb_ops > nb_allowed)
 803                 nb_ops = nb_allowed;
 804
 805         for (count = 0; count < nb_ops; count++) {
 806                 op = ops[count];
 807                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 808                         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 809                                 ret = otx2_cpt_enqueue_sec(qp, op, pend_q);
 810                         else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 811                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 812                         else
 813                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 814                                                                     pend_q);
 815                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 816                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 817                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 818                         else
 819                                 break;
 820                 } else
 821                         break;
 822
 823                 if (unlikely(ret))
 824                         break;
 825         }
 826
 827         return count;
 828 }
 829
 830 static __rte_always_inline void
 831 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 832                      struct rte_crypto_rsa_xform *rsa_ctx)
 833 {
 834         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 835
 836         switch (rsa->op_type) {
 837         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 838                 rsa->cipher.length = rsa_ctx->n.length;
 839                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 840                 break;
 841         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 842                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 843                         rsa->message.length = rsa_ctx->n.length;
 844                         memcpy(rsa->message.data, req->rptr,
 845                                rsa->message.length);
 846                 } else {
 847                         /* Get length of decrypted output */
 848                         rsa->message.length = rte_cpu_to_be_16
 849                                              (*((uint16_t *)req->rptr));
 850                         /*
 851                          * Offset output data pointer by length field
 852                          * (2 bytes) and copy decrypted data.
 853                          */
 854                         memcpy(rsa->message.data, req->rptr + 2,
 855                                rsa->message.length);
 856                 }
 857                 break;
 858         case RTE_CRYPTO_ASYM_OP_SIGN:
 859                 rsa->sign.length = rsa_ctx->n.length;
 860                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 861                 break;
 862         case RTE_CRYPTO_ASYM_OP_VERIFY:
 863                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 864                         rsa->sign.length = rsa_ctx->n.length;
 865                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 866                 } else {
 867                         /* Get length of signed output */
 868                         rsa->sign.length = rte_cpu_to_be_16
 869                                           (*((uint16_t *)req->rptr));
 870                         /*
 871                          * Offset output data pointer by length field
 872                          * (2 bytes) and copy signed data.
 873                          */
 874                         memcpy(rsa->sign.data, req->rptr + 2,
 875                                rsa->sign.length);
 876                 }
 877                 if (memcmp(rsa->sign.data, rsa->message.data,
 878                            rsa->message.length)) {
 879                         CPT_LOG_DP_ERR("RSA verification failed");
 880                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 881                 }
 882                 break;
 883         default:
 884                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 885                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 886                 break;
 887         }
 888 }
 889
 890 static __rte_always_inline void
 891 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 892                                struct cpt_request_info *req,
 893                                struct cpt_asym_ec_ctx *ec)
 894 {
 895         int prime_len = ec_grp[ec->curveid].prime.length;
 896
 897         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 898                 return;
 899
 900         /* Separate out sign r and s components */
 901         memcpy(ecdsa->r.data, req->rptr, prime_len);
 902         memcpy(ecdsa->s.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8),
 903                prime_len);
 904         ecdsa->r.length = prime_len;
 905         ecdsa->s.length = prime_len;
 906 }
 907
 908 static __rte_always_inline void
 909 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 910                              struct cpt_request_info *req,
 911                              struct cpt_asym_ec_ctx *ec)
 912 {
 913         int prime_len = ec_grp[ec->curveid].prime.length;
 914
 915         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 916         memcpy(ecpm->r.y.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8),
 917                prime_len);
 918         ecpm->r.x.length = prime_len;
 919         ecpm->r.y.length = prime_len;
 920 }
 921
 922 static void
 923 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 924                            struct cpt_request_info *req)
 925 {
 926         struct rte_crypto_asym_op *op = cop->asym;
 927         struct cpt_asym_sess_misc *sess;
 928
 929         sess = get_asym_session_private_data(op->session,
 930                                              otx2_cryptodev_driver_id);
 931
 932         switch (sess->xfrm_type) {
 933         case RTE_CRYPTO_ASYM_XFORM_RSA:
 934                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 935                 break;
 936         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 937                 op->modex.result.length = sess->mod_ctx.modulus.length;
 938                 memcpy(op->modex.result.data, req->rptr,
 939                        op->modex.result.length);
 940                 break;
 941         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 942                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 943                 break;
 944         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 945                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 946                 break;
 947         default:
 948                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 949                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 950                 break;
 951         }
 952 }
 953
 954 static void
 955 otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 956 {
 957         struct cpt_request_info *req = (struct cpt_request_info *)rsp[2];
 958         vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;
 959         struct rte_crypto_sym_op *sym_op = cop->sym;
 960         struct rte_mbuf *m = sym_op->m_src;
 961         struct rte_ipv6_hdr *ip6;
 962         struct rte_ipv4_hdr *ip;
 963         uint16_t m_len = 0;
 964         int mdata_len;
 965         char *data;
 966
 967         mdata_len = (int)rsp[3];
 968         rte_pktmbuf_trim(m, mdata_len);
 969
 970         if (word0->s.opcode.major == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 971                 data = rte_pktmbuf_mtod(m, char *);
 972
 973                 if (rsp[4] == OTX2_IPSEC_PO_TRANSPORT ||
 974                     rsp[4] == OTX2_IPSEC_PO_TUNNEL_IPV4) {
 975                         ip = (struct rte_ipv4_hdr *)(data +
 976                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 977                         m_len = rte_be_to_cpu_16(ip->total_length);
 978                 } else if (rsp[4] == OTX2_IPSEC_PO_TUNNEL_IPV6) {
 979                         ip6 = (struct rte_ipv6_hdr *)(data +
 980                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 981                         m_len = rte_be_to_cpu_16(ip6->payload_len) +
 982                                 sizeof(struct rte_ipv6_hdr);
 983                 }
 984
 985                 m->data_len = m_len;
 986                 m->pkt_len = m_len;
 987                 m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;
 988         }
 989 }
 990
 991 static inline void
 992 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 993                               uintptr_t *rsp, uint8_t cc)
 994 {
 995         unsigned int sz;
 996
 997         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 998                 if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 999                         if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {
1000                                 otx2_cpt_sec_post_process(cop, rsp);
1001                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1002                         } else
1003                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1004
1005                         return;
1006                 }
1007
1008                 if (likely(cc == NO_ERR)) {
1009                         /* Verify authentication data if required */
1010                         if (unlikely(rsp[2]))
1011                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
1012                                                  rsp[3]);
1013                         else
1014                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1015                 } else {
1016                         if (cc == ERR_GC_ICV_MISCOMPARE)
1017                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
1018                         else
1019                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1020                 }
1021
1022                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
1023                         sym_session_clear(otx2_cryptodev_driver_id,
1024                                           cop->sym->session);
1025                         sz = rte_cryptodev_sym_get_existing_header_session_size(
1026                                         cop->sym->session);
1027                         memset(cop->sym->session, 0, sz);
1028                         rte_mempool_put(qp->sess_mp, cop->sym->session);
1029                         cop->sym->session = NULL;
1030                 }
1031         }
1032
1033         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
1034                 if (likely(cc == NO_ERR)) {
1035                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1036                         /*
1037                          * Pass cpt_req_info stored in metabuf during
1038                          * enqueue.
1039                          */
1040                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
1041                         otx2_cpt_asym_post_process(cop,
1042                                         (struct cpt_request_info *)rsp);
1043                 } else
1044                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1045         }
1046 }
1047
1048 static uint16_t
1049 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
1050 {
1051         int i, nb_pending, nb_completed;
1052         struct otx2_cpt_qp *qp = qptr;
1053         struct pending_queue *pend_q;
1054         struct cpt_request_info *req;
1055         struct rte_crypto_op *cop;
1056         uint8_t cc[nb_ops];
1057         uintptr_t *rsp;
1058         void *metabuf;
1059
1060         pend_q = &qp->pend_q;
1061
1062         nb_pending = pend_q->pending_count;
1063
1064         if (nb_ops > nb_pending)
1065                 nb_ops = nb_pending;
1066
1067         for (i = 0; i < nb_ops; i++) {
1068                 req = (struct cpt_request_info *)
1069                                 pend_q->req_queue[pend_q->deq_head];
1070
1071                 cc[i] = otx2_cpt_compcode_get(req);
1072
1073                 if (unlikely(cc[i] == ERR_REQ_PENDING))
1074                         break;
1075
1076                 ops[i] = req->op;
1077
1078                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
1079                 pend_q->pending_count -= 1;
1080         }
1081
1082         nb_completed = i;
1083
1084         for (i = 0; i < nb_completed; i++) {
1085                 rsp = (void *)ops[i];
1086
1087                 metabuf = (void *)rsp[0];
1088                 cop = (void *)rsp[1];
1089
1090                 ops[i] = cop;
1091
1092                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
1093
1094                 free_op_meta(metabuf, qp->meta_info.pool);
1095         }
1096
1097         return nb_completed;
1098 }
1099
1100 void
1101 otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
1102 {
1103         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1104         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1105
1106         rte_mb();
1107 }
1108
1109 /* PMD ops */
1110
1111 static int
1112 otx2_cpt_dev_config(struct rte_cryptodev *dev,
1113                     struct rte_cryptodev_config *conf)
1114 {
1115         struct otx2_cpt_vf *vf = dev->data->dev_private;
1116         int ret;
1117
1118         if (conf->nb_queue_pairs > vf->max_queues) {
1119                 CPT_LOG_ERR("Invalid number of queue pairs requested");
1120                 return -EINVAL;
1121         }
1122
1123         dev->feature_flags = otx2_cpt_default_ff_get() & ~conf->ff_disable;
1124
1125         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
1126                 /* Initialize shared FPM table */
1127                 ret = cpt_fpm_init(otx2_fpm_iova);
1128                 if (ret)
1129                         return ret;
1130         }
1131
1132         /* Unregister error interrupts */
1133         if (vf->err_intr_registered)
1134                 otx2_cpt_err_intr_unregister(dev);
1135
1136         /* Detach queues */
1137         if (vf->nb_queues) {
1138                 ret = otx2_cpt_queues_detach(dev);
1139                 if (ret) {
1140                         CPT_LOG_ERR("Could not detach CPT queues");
1141                         return ret;
1142                 }
1143         }
1144
1145         /* Attach queues */
1146         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
1147         if (ret) {
1148                 CPT_LOG_ERR("Could not attach CPT queues");
1149                 return -ENODEV;
1150         }
1151
1152         ret = otx2_cpt_msix_offsets_get(dev);
1153         if (ret) {
1154                 CPT_LOG_ERR("Could not get MSI-X offsets");
1155                 goto queues_detach;
1156         }
1157
1158         /* Register error interrupts */
1159         ret = otx2_cpt_err_intr_register(dev);
1160         if (ret) {
1161                 CPT_LOG_ERR("Could not register error interrupts");
1162                 goto queues_detach;
1163         }
1164
1165         ret = otx2_cpt_inline_init(dev);
1166         if (ret) {
1167                 CPT_LOG_ERR("Could not enable inline IPsec");
1168                 goto intr_unregister;
1169         }
1170
1171         otx2_cpt_set_enqdeq_fns(dev);
1172
1173         return 0;
1174
1175 intr_unregister:
1176         otx2_cpt_err_intr_unregister(dev);
1177 queues_detach:
1178         otx2_cpt_queues_detach(dev);
1179         return ret;
1180 }
1181
1182 static int
1183 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1184 {
1185         RTE_SET_USED(dev);
1186
1187         CPT_PMD_INIT_FUNC_TRACE();
1188
1189         return 0;
1190 }
1191
1192 static void
1193 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1194 {
1195         CPT_PMD_INIT_FUNC_TRACE();
1196
1197         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1198                 cpt_fpm_clear();
1199 }
1200
1201 static int
1202 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1203 {
1204         struct otx2_cpt_vf *vf = dev->data->dev_private;
1205         int i, ret = 0;
1206
1207         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1208                 ret = otx2_cpt_queue_pair_release(dev, i);
1209                 if (ret)
1210                         return ret;
1211         }
1212
1213         /* Unregister error interrupts */
1214         if (vf->err_intr_registered)
1215                 otx2_cpt_err_intr_unregister(dev);
1216
1217         /* Detach queues */
1218         if (vf->nb_queues) {
1219                 ret = otx2_cpt_queues_detach(dev);
1220                 if (ret)
1221                         CPT_LOG_ERR("Could not detach CPT queues");
1222         }
1223
1224         return ret;
1225 }
1226
1227 static void
1228 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1229                       struct rte_cryptodev_info *info)
1230 {
1231         struct otx2_cpt_vf *vf = dev->data->dev_private;
1232
1233         if (info != NULL) {
1234                 info->max_nb_queue_pairs = vf->max_queues;
1235                 info->feature_flags = otx2_cpt_default_ff_get();
1236                 info->capabilities = otx2_cpt_capabilities_get();
1237                 info->sym.max_nb_sessions = 0;
1238                 info->driver_id = otx2_cryptodev_driver_id;
1239                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1240                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1241         }
1242 }
1243
1244 static int
1245 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1246                           const struct rte_cryptodev_qp_conf *conf,
1247                           int socket_id __rte_unused)
1248 {
1249         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1250         struct rte_pci_device *pci_dev;
1251         struct otx2_cpt_qp *qp;
1252
1253         CPT_PMD_INIT_FUNC_TRACE();
1254
1255         if (dev->data->queue_pairs[qp_id] != NULL)
1256                 otx2_cpt_queue_pair_release(dev, qp_id);
1257
1258         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1259                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1260                             conf->nb_descriptors);
1261                 return -EINVAL;
1262         }
1263
1264         pci_dev = RTE_DEV_TO_PCI(dev->device);
1265
1266         if (pci_dev->mem_resource[2].addr == NULL) {
1267                 CPT_LOG_ERR("Invalid PCI mem address");
1268                 return -EIO;
1269         }
1270
1271         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1272         if (qp == NULL) {
1273                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1274                 return -ENOMEM;
1275         }
1276
1277         qp->sess_mp = conf->mp_session;
1278         qp->sess_mp_priv = conf->mp_session_private;
1279         dev->data->queue_pairs[qp_id] = qp;
1280
1281         return 0;
1282 }
1283
1284 static int
1285 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1286 {
1287         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1288         int ret;
1289
1290         CPT_PMD_INIT_FUNC_TRACE();
1291
1292         if (qp == NULL)
1293                 return -EINVAL;
1294
1295         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1296
1297         ret = otx2_cpt_qp_destroy(dev, qp);
1298         if (ret) {
1299                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1300                 return ret;
1301         }
1302
1303         dev->data->queue_pairs[qp_id] = NULL;
1304
1305         return 0;
1306 }
1307
1308 static unsigned int
1309 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1310 {
1311         return cpt_get_session_size();
1312 }
1313
1314 static int
1315 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1316                                struct rte_crypto_sym_xform *xform,
1317                                struct rte_cryptodev_sym_session *sess,
1318                                struct rte_mempool *pool)
1319 {
1320         CPT_PMD_INIT_FUNC_TRACE();
1321
1322         return sym_session_configure(dev->driver_id, xform, sess, pool);
1323 }
1324
1325 static void
1326 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1327                            struct rte_cryptodev_sym_session *sess)
1328 {
1329         CPT_PMD_INIT_FUNC_TRACE();
1330
1331         return sym_session_clear(dev->driver_id, sess);
1332 }
1333
1334 static unsigned int
1335 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1336 {
1337         return sizeof(struct cpt_asym_sess_misc);
1338 }
1339
1340 static int
1341 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1342                           struct rte_crypto_asym_xform *xform,
1343                           struct rte_cryptodev_asym_session *sess,
1344                           struct rte_mempool *pool)
1345 {
1346         struct cpt_asym_sess_misc *priv;
1347         vq_cmd_word3_t vq_cmd_w3;
1348         int ret;
1349
1350         CPT_PMD_INIT_FUNC_TRACE();
1351
1352         if (rte_mempool_get(pool, (void **)&priv)) {
1353                 CPT_LOG_ERR("Could not allocate session_private_data");
1354                 return -ENOMEM;
1355         }
1356
1357         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1358
1359         ret = cpt_fill_asym_session_parameters(priv, xform);
1360         if (ret) {
1361                 CPT_LOG_ERR("Could not configure session parameters");
1362
1363                 /* Return session to mempool */
1364                 rte_mempool_put(pool, priv);
1365                 return ret;
1366         }
1367
1368         vq_cmd_w3.u64 = 0;
1369         vq_cmd_w3.s.grp = OTX2_CPT_EGRP_AE;
1370         priv->cpt_inst_w7 = vq_cmd_w3.u64;
1371
1372         set_asym_session_private_data(sess, dev->driver_id, priv);
1373
1374         return 0;
1375 }
1376
1377 static void
1378 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1379                             struct rte_cryptodev_asym_session *sess)
1380 {
1381         struct cpt_asym_sess_misc *priv;
1382         struct rte_mempool *sess_mp;
1383
1384         CPT_PMD_INIT_FUNC_TRACE();
1385
1386         priv = get_asym_session_private_data(sess, dev->driver_id);
1387         if (priv == NULL)
1388                 return;
1389
1390         /* Free resources allocated in session_cfg */
1391         cpt_free_asym_session_parameters(priv);
1392
1393         /* Reset and free object back to pool */
1394         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1395         sess_mp = rte_mempool_from_obj(priv);
1396         set_asym_session_private_data(sess, dev->driver_id, NULL);
1397         rte_mempool_put(sess_mp, priv);
1398 }
1399
1400 struct rte_cryptodev_ops otx2_cpt_ops = {
1401         /* Device control ops */
1402         .dev_configure = otx2_cpt_dev_config,
1403         .dev_start = otx2_cpt_dev_start,
1404         .dev_stop = otx2_cpt_dev_stop,
1405         .dev_close = otx2_cpt_dev_close,
1406         .dev_infos_get = otx2_cpt_dev_info_get,
1407
1408         .stats_get = NULL,
1409         .stats_reset = NULL,
1410         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1411         .queue_pair_release = otx2_cpt_queue_pair_release,
1412
1413         /* Symmetric crypto ops */
1414         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1415         .sym_session_configure = otx2_cpt_sym_session_configure,
1416         .sym_session_clear = otx2_cpt_sym_session_clear,
1417
1418         /* Asymmetric crypto ops */
1419         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1420         .asym_session_configure = otx2_cpt_asym_session_cfg,
1421         .asym_session_clear = otx2_cpt_asym_session_clear,
1422
1423 };