drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10
  11 #include "otx2_cryptodev.h"
  12 #include "otx2_cryptodev_capabilities.h"
  13 #include "otx2_cryptodev_hw_access.h"
  14 #include "otx2_cryptodev_mbox.h"
  15 #include "otx2_cryptodev_ops.h"
  16 #include "otx2_ipsec_po_ops.h"
  17 #include "otx2_mbox.h"
  18 #include "otx2_sec_idev.h"
  19 #include "otx2_security.h"
  20
  21 #include "cpt_hw_types.h"
  22 #include "cpt_pmd_logs.h"
  23 #include "cpt_pmd_ops_helper.h"
  24 #include "cpt_ucode.h"
  25 #include "cpt_ucode_asym.h"
  26
  27 #define METABUF_POOL_CACHE_SIZE 512
  28
  29 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  30
  31 /* Forward declarations */
  32
  33 static int
  34 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  35
  36 static void
  37 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  38 {
  39         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  40 }
  41
  42 static int
  43 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  44                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  45                                 int nb_elements)
  46 {
  47         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  48         struct cpt_qp_meta_info *meta_info;
  49         struct rte_mempool *pool;
  50         int ret, max_mlen;
  51         int asym_mlen = 0;
  52         int lb_mlen = 0;
  53         int sg_mlen = 0;
  54
  55         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  56
  57                 /* Get meta len for scatter gather mode */
  58                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  59
  60                 /* Extra 32B saved for future considerations */
  61                 sg_mlen += 4 * sizeof(uint64_t);
  62
  63                 /* Get meta len for linear buffer (direct) mode */
  64                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  65
  66                 /* Extra 32B saved for future considerations */
  67                 lb_mlen += 4 * sizeof(uint64_t);
  68         }
  69
  70         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  71
  72                 /* Get meta len required for asymmetric operations */
  73                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  74         }
  75
  76         /*
  77          * Check max requirement for meta buffer to
  78          * support crypto op of any type (sym/asym).
  79          */
  80         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  81
  82         /* Allocate mempool */
  83
  84         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  85                  dev->data->dev_id, qp_id);
  86
  87         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  88                                         METABUF_POOL_CACHE_SIZE, 0,
  89                                         rte_socket_id(), 0);
  90
  91         if (pool == NULL) {
  92                 CPT_LOG_ERR("Could not create mempool for metabuf");
  93                 return rte_errno;
  94         }
  95
  96         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
  97                                          NULL);
  98         if (ret) {
  99                 CPT_LOG_ERR("Could not set mempool ops");
 100                 goto mempool_free;
 101         }
 102
 103         ret = rte_mempool_populate_default(pool);
 104         if (ret <= 0) {
 105                 CPT_LOG_ERR("Could not populate metabuf pool");
 106                 goto mempool_free;
 107         }
 108
 109         meta_info = &qp->meta_info;
 110
 111         meta_info->pool = pool;
 112         meta_info->lb_mlen = lb_mlen;
 113         meta_info->sg_mlen = sg_mlen;
 114
 115         return 0;
 116
 117 mempool_free:
 118         rte_mempool_free(pool);
 119         return ret;
 120 }
 121
 122 static void
 123 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 124 {
 125         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 126
 127         rte_mempool_free(meta_info->pool);
 128
 129         meta_info->pool = NULL;
 130         meta_info->lb_mlen = 0;
 131         meta_info->sg_mlen = 0;
 132 }
 133
 134 static int
 135 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 136 {
 137         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 138         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 139         int i, ret;
 140
 141         for (i = 0; i < nb_ethport; i++) {
 142                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 143                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 144                         break;
 145         }
 146
 147         if (i >= nb_ethport)
 148                 return 0;
 149
 150         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 151         if (ret)
 152                 return ret;
 153
 154         /* Publish inline Tx QP to eth dev security */
 155         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 156         if (ret)
 157                 return ret;
 158
 159         return 0;
 160 }
 161
 162 static struct otx2_cpt_qp *
 163 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 164                    uint8_t group)
 165 {
 166         struct otx2_cpt_vf *vf = dev->data->dev_private;
 167         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 168         const struct rte_memzone *lf_mem;
 169         uint32_t len, iq_len, size_div40;
 170         char name[RTE_MEMZONE_NAMESIZE];
 171         uint64_t used_len, iova;
 172         struct otx2_cpt_qp *qp;
 173         uint64_t lmtline;
 174         uint8_t *va;
 175         int ret;
 176
 177         /* Allocate queue pair */
 178         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 179                                 OTX2_ALIGN, 0);
 180         if (qp == NULL) {
 181                 CPT_LOG_ERR("Could not allocate queue pair");
 182                 return NULL;
 183         }
 184
 185         iq_len = OTX2_CPT_IQ_LEN;
 186
 187         /*
 188          * Queue size must be a multiple of 40 and effective queue size to
 189          * software is (size_div40 - 1) * 40
 190          */
 191         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 192
 193         /* For pending queue */
 194         len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 195
 196         /* Space for instruction group memory */
 197         len += size_div40 * 16;
 198
 199         /* So that instruction queues start as pg size aligned */
 200         len = RTE_ALIGN(len, pg_sz);
 201
 202         /* For instruction queues */
 203         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 204
 205         /* Wastage after instruction queues */
 206         len = RTE_ALIGN(len, pg_sz);
 207
 208         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 209                             qp_id);
 210
 211         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 212                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 213                         RTE_CACHE_LINE_SIZE);
 214         if (lf_mem == NULL) {
 215                 CPT_LOG_ERR("Could not allocate reserved memzone");
 216                 goto qp_free;
 217         }
 218
 219         va = lf_mem->addr;
 220         iova = lf_mem->iova;
 221
 222         memset(va, 0, len);
 223
 224         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 225         if (ret) {
 226                 CPT_LOG_ERR("Could not create mempool for metabuf");
 227                 goto lf_mem_free;
 228         }
 229
 230         /* Initialize pending queue */
 231         qp->pend_q.rid_queue = (struct rid *)va;
 232         qp->pend_q.enq_tail = 0;
 233         qp->pend_q.deq_head = 0;
 234         qp->pend_q.pending_count = 0;
 235
 236         used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 237         used_len += size_div40 * 16;
 238         used_len = RTE_ALIGN(used_len, pg_sz);
 239         iova += used_len;
 240
 241         qp->iq_dma_addr = iova;
 242         qp->id = qp_id;
 243         qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
 244
 245         lmtline = vf->otx2_dev.bar2 +
 246                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 247                   OTX2_LMT_LF_LMTLINE(0);
 248
 249         qp->lmtline = (void *)lmtline;
 250
 251         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 252
 253         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 254         if (ret && (ret != -ENOENT)) {
 255                 CPT_LOG_ERR("Could not delete inline configuration");
 256                 goto mempool_destroy;
 257         }
 258
 259         otx2_cpt_iq_disable(qp);
 260
 261         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 262         if (ret) {
 263                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 264                 goto mempool_destroy;
 265         }
 266
 267         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 268                                  size_div40);
 269         if (ret) {
 270                 CPT_LOG_ERR("Could not enable instruction queue");
 271                 goto mempool_destroy;
 272         }
 273
 274         return qp;
 275
 276 mempool_destroy:
 277         otx2_cpt_metabuf_mempool_destroy(qp);
 278 lf_mem_free:
 279         rte_memzone_free(lf_mem);
 280 qp_free:
 281         rte_free(qp);
 282         return NULL;
 283 }
 284
 285 static int
 286 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 287 {
 288         const struct rte_memzone *lf_mem;
 289         char name[RTE_MEMZONE_NAMESIZE];
 290         int ret;
 291
 292         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 293         if (ret && (ret != -ENOENT)) {
 294                 CPT_LOG_ERR("Could not delete inline configuration");
 295                 return ret;
 296         }
 297
 298         otx2_cpt_iq_disable(qp);
 299
 300         otx2_cpt_metabuf_mempool_destroy(qp);
 301
 302         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 303                             qp->id);
 304
 305         lf_mem = rte_memzone_lookup(name);
 306
 307         ret = rte_memzone_free(lf_mem);
 308         if (ret)
 309                 return ret;
 310
 311         rte_free(qp);
 312
 313         return 0;
 314 }
 315
 316 static int
 317 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 318 {
 319         if (xform->next) {
 320                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 321                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 322                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 323                         return -ENOTSUP;
 324
 325                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 326                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 327                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 328                         return -ENOTSUP;
 329
 330                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 331                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 332                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 333                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 334                         return -ENOTSUP;
 335
 336                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 337                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 338                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 339                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 340                         return -ENOTSUP;
 341
 342         } else {
 343                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 344                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 345                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 346                         return -ENOTSUP;
 347         }
 348         return 0;
 349 }
 350
 351 static int
 352 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 353                       struct rte_cryptodev_sym_session *sess,
 354                       struct rte_mempool *pool)
 355 {
 356         struct cpt_sess_misc *misc;
 357         void *priv;
 358         int ret;
 359
 360         ret = sym_xform_verify(xform);
 361         if (unlikely(ret))
 362                 return ret;
 363
 364         if (unlikely(rte_mempool_get(pool, &priv))) {
 365                 CPT_LOG_ERR("Could not allocate session private data");
 366                 return -ENOMEM;
 367         }
 368
 369         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 370                         offsetof(struct cpt_ctx, fctx));
 371
 372         misc = priv;
 373
 374         for ( ; xform != NULL; xform = xform->next) {
 375                 switch (xform->type) {
 376                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 377                         ret = fill_sess_aead(xform, misc);
 378                         break;
 379                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 380                         ret = fill_sess_cipher(xform, misc);
 381                         break;
 382                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 383                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 384                                 ret = fill_sess_gmac(xform, misc);
 385                         else
 386                                 ret = fill_sess_auth(xform, misc);
 387                         break;
 388                 default:
 389                         ret = -1;
 390                 }
 391
 392                 if (ret)
 393                         goto priv_put;
 394         }
 395
 396         set_sym_session_private_data(sess, driver_id, misc);
 397
 398         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 399                              sizeof(struct cpt_sess_misc);
 400
 401         /*
 402          * IE engines support IPsec operations
 403          * SE engines support IPsec operations, Chacha-Poly and
 404          * Air-Crypto operations
 405          */
 406         if (misc->zsk_flag || misc->chacha_poly)
 407                 misc->egrp = OTX2_CPT_EGRP_SE;
 408         else
 409                 misc->egrp = OTX2_CPT_EGRP_SE_IE;
 410
 411         return 0;
 412
 413 priv_put:
 414         rte_mempool_put(pool, priv);
 415
 416         return -ENOTSUP;
 417 }
 418
 419 static void
 420 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
 421 {
 422         void *priv = get_sym_session_private_data(sess, driver_id);
 423         struct rte_mempool *pool;
 424
 425         if (priv == NULL)
 426                 return;
 427
 428         memset(priv, 0, cpt_get_session_size());
 429
 430         pool = rte_mempool_from_obj(priv);
 431
 432         set_sym_session_private_data(sess, driver_id, NULL);
 433
 434         rte_mempool_put(pool, priv);
 435 }
 436
 437 static __rte_always_inline int32_t __rte_hot
 438 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 439                      struct pending_queue *pend_q,
 440                      struct cpt_request_info *req)
 441 {
 442         void *lmtline = qp->lmtline;
 443         union cpt_inst_s inst;
 444         uint64_t lmt_status;
 445
 446         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 447                 return -EAGAIN;
 448
 449         inst.u[0] = 0;
 450         inst.s9x.res_addr = req->comp_baddr;
 451         inst.u[2] = 0;
 452         inst.u[3] = 0;
 453
 454         inst.s9x.ei0 = req->ist.ei0;
 455         inst.s9x.ei1 = req->ist.ei1;
 456         inst.s9x.ei2 = req->ist.ei2;
 457         inst.s9x.ei3 = req->ist.ei3;
 458
 459         req->time_out = rte_get_timer_cycles() +
 460                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 461
 462         do {
 463                 /* Copy CPT command to LMTLINE */
 464                 memcpy(lmtline, &inst, sizeof(inst));
 465
 466                 /*
 467                  * Make sure compiler does not reorder memcpy and ldeor.
 468                  * LMTST transactions are always flushed from the write
 469                  * buffer immediately, a DMB is not required to push out
 470                  * LMTSTs.
 471                  */
 472                 rte_io_wmb();
 473                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 474         } while (lmt_status == 0);
 475
 476         pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
 477
 478         /* We will use soft queue length here to limit requests */
 479         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 480         pend_q->pending_count += 1;
 481
 482         return 0;
 483 }
 484
 485 static __rte_always_inline int32_t __rte_hot
 486 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 487                       struct rte_crypto_op *op,
 488                       struct pending_queue *pend_q)
 489 {
 490         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 491         struct rte_crypto_asym_op *asym_op = op->asym;
 492         struct asym_op_params params = {0};
 493         struct cpt_asym_sess_misc *sess;
 494         vq_cmd_word3_t *w3;
 495         uintptr_t *cop;
 496         void *mdata;
 497         int ret;
 498
 499         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 500                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 501                 return -ENOMEM;
 502         }
 503
 504         sess = get_asym_session_private_data(asym_op->session,
 505                                              otx2_cryptodev_driver_id);
 506
 507         /* Store IO address of the mdata to meta_buf */
 508         params.meta_buf = rte_mempool_virt2iova(mdata);
 509
 510         cop = mdata;
 511         cop[0] = (uintptr_t)mdata;
 512         cop[1] = (uintptr_t)op;
 513         cop[2] = cop[3] = 0ULL;
 514
 515         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 516         params.req->op = cop;
 517
 518         /* Adjust meta_buf to point to end of cpt_request_info structure */
 519         params.meta_buf += (4 * sizeof(uintptr_t)) +
 520                             sizeof(struct cpt_request_info);
 521         switch (sess->xfrm_type) {
 522         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 523                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 524                 if (unlikely(ret))
 525                         goto req_fail;
 526                 break;
 527         case RTE_CRYPTO_ASYM_XFORM_RSA:
 528                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 529                 if (unlikely(ret))
 530                         goto req_fail;
 531                 break;
 532         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 533                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 534                 if (unlikely(ret))
 535                         goto req_fail;
 536                 break;
 537         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 538                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 539                                     sess->ec_ctx.curveid);
 540                 if (unlikely(ret))
 541                         goto req_fail;
 542                 break;
 543         default:
 544                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 545                 ret = -EINVAL;
 546                 goto req_fail;
 547         }
 548
 549         /* Set engine group of AE */
 550         w3 = (vq_cmd_word3_t *)&params.req->ist.ei3;
 551         w3->s.grp = OTX2_CPT_EGRP_AE;
 552
 553         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req);
 554
 555         if (unlikely(ret)) {
 556                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 557                 goto req_fail;
 558         }
 559
 560         return 0;
 561
 562 req_fail:
 563         free_op_meta(mdata, minfo->pool);
 564
 565         return ret;
 566 }
 567
 568 static __rte_always_inline int __rte_hot
 569 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 570                      struct pending_queue *pend_q)
 571 {
 572         struct rte_crypto_sym_op *sym_op = op->sym;
 573         struct cpt_request_info *req;
 574         struct cpt_sess_misc *sess;
 575         vq_cmd_word3_t *w3;
 576         uint64_t cpt_op;
 577         void *mdata;
 578         int ret;
 579
 580         sess = get_sym_session_private_data(sym_op->session,
 581                                             otx2_cryptodev_driver_id);
 582
 583         cpt_op = sess->cpt_op;
 584
 585         if (cpt_op & CPT_OP_CIPHER_MASK)
 586                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 587                                      (void **)&req);
 588         else
 589                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 590                                          (void **)&req);
 591
 592         if (unlikely(ret)) {
 593                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 594                                 op, (unsigned int)cpt_op, ret);
 595                 return ret;
 596         }
 597
 598         w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
 599         w3->s.grp = sess->egrp;
 600
 601         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 602
 603         if (unlikely(ret)) {
 604                 /* Free buffer allocated by fill params routines */
 605                 free_op_meta(mdata, qp->meta_info.pool);
 606         }
 607
 608         return ret;
 609 }
 610
 611 static __rte_always_inline int __rte_hot
 612 otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 613                      struct pending_queue *pend_q)
 614 {
 615         struct otx2_sec_session_ipsec_lp *sess;
 616         struct otx2_ipsec_po_sa_ctl *ctl_wrd;
 617         struct otx2_sec_session *priv;
 618         struct cpt_request_info *req;
 619         int ret;
 620
 621         priv = get_sec_session_private_data(op->sym->sec_session);
 622         sess = &priv->ipsec.lp;
 623
 624         ctl_wrd = &sess->in_sa.ctl;
 625
 626         if (ctl_wrd->direction == OTX2_IPSEC_PO_SA_DIRECTION_OUTBOUND)
 627                 ret = process_outb_sa(op, sess, &qp->meta_info, (void **)&req);
 628         else
 629                 ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req);
 630
 631         if (unlikely(ret)) {
 632                 otx2_err("Crypto req : op %p, ret 0x%x", op, ret);
 633                 return ret;
 634         }
 635
 636         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 637
 638         return ret;
 639 }
 640
 641 static __rte_always_inline int __rte_hot
 642 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 643                               struct pending_queue *pend_q)
 644 {
 645         const int driver_id = otx2_cryptodev_driver_id;
 646         struct rte_crypto_sym_op *sym_op = op->sym;
 647         struct rte_cryptodev_sym_session *sess;
 648         int ret;
 649
 650         /* Create temporary session */
 651
 652         if (rte_mempool_get(qp->sess_mp, (void **)&sess))
 653                 return -ENOMEM;
 654
 655         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 656                                     qp->sess_mp_priv);
 657         if (ret)
 658                 goto sess_put;
 659
 660         sym_op->session = sess;
 661
 662         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 663
 664         if (unlikely(ret))
 665                 goto priv_put;
 666
 667         return 0;
 668
 669 priv_put:
 670         sym_session_clear(driver_id, sess);
 671 sess_put:
 672         rte_mempool_put(qp->sess_mp, sess);
 673         return ret;
 674 }
 675
 676 static uint16_t
 677 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 678 {
 679         uint16_t nb_allowed, count = 0;
 680         struct otx2_cpt_qp *qp = qptr;
 681         struct pending_queue *pend_q;
 682         struct rte_crypto_op *op;
 683         int ret;
 684
 685         pend_q = &qp->pend_q;
 686
 687         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 688         if (nb_ops > nb_allowed)
 689                 nb_ops = nb_allowed;
 690
 691         for (count = 0; count < nb_ops; count++) {
 692                 op = ops[count];
 693                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 694                         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 695                                 ret = otx2_cpt_enqueue_sec(qp, op, pend_q);
 696                         else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 697                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 698                         else
 699                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 700                                                                     pend_q);
 701                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 702                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 703                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 704                         else
 705                                 break;
 706                 } else
 707                         break;
 708
 709                 if (unlikely(ret))
 710                         break;
 711         }
 712
 713         return count;
 714 }
 715
 716 static __rte_always_inline void
 717 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 718                      struct rte_crypto_rsa_xform *rsa_ctx)
 719 {
 720         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 721
 722         switch (rsa->op_type) {
 723         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 724                 rsa->cipher.length = rsa_ctx->n.length;
 725                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 726                 break;
 727         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 728                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 729                         rsa->message.length = rsa_ctx->n.length;
 730                         memcpy(rsa->message.data, req->rptr,
 731                                rsa->message.length);
 732                 } else {
 733                         /* Get length of decrypted output */
 734                         rsa->message.length = rte_cpu_to_be_16
 735                                              (*((uint16_t *)req->rptr));
 736                         /*
 737                          * Offset output data pointer by length field
 738                          * (2 bytes) and copy decrypted data.
 739                          */
 740                         memcpy(rsa->message.data, req->rptr + 2,
 741                                rsa->message.length);
 742                 }
 743                 break;
 744         case RTE_CRYPTO_ASYM_OP_SIGN:
 745                 rsa->sign.length = rsa_ctx->n.length;
 746                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 747                 break;
 748         case RTE_CRYPTO_ASYM_OP_VERIFY:
 749                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 750                         rsa->sign.length = rsa_ctx->n.length;
 751                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 752                 } else {
 753                         /* Get length of signed output */
 754                         rsa->sign.length = rte_cpu_to_be_16
 755                                           (*((uint16_t *)req->rptr));
 756                         /*
 757                          * Offset output data pointer by length field
 758                          * (2 bytes) and copy signed data.
 759                          */
 760                         memcpy(rsa->sign.data, req->rptr + 2,
 761                                rsa->sign.length);
 762                 }
 763                 if (memcmp(rsa->sign.data, rsa->message.data,
 764                            rsa->message.length)) {
 765                         CPT_LOG_DP_ERR("RSA verification failed");
 766                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 767                 }
 768                 break;
 769         default:
 770                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 771                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 772                 break;
 773         }
 774 }
 775
 776 static __rte_always_inline void
 777 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 778                                struct cpt_request_info *req,
 779                                struct cpt_asym_ec_ctx *ec)
 780 {
 781         int prime_len = ec_grp[ec->curveid].prime.length;
 782
 783         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 784                 return;
 785
 786         /* Separate out sign r and s components */
 787         memcpy(ecdsa->r.data, req->rptr, prime_len);
 788         memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 789         ecdsa->r.length = prime_len;
 790         ecdsa->s.length = prime_len;
 791 }
 792
 793 static __rte_always_inline void
 794 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 795                              struct cpt_request_info *req,
 796                              struct cpt_asym_ec_ctx *ec)
 797 {
 798         int prime_len = ec_grp[ec->curveid].prime.length;
 799
 800         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 801         memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 802         ecpm->r.x.length = prime_len;
 803         ecpm->r.y.length = prime_len;
 804 }
 805
 806 static void
 807 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 808                            struct cpt_request_info *req)
 809 {
 810         struct rte_crypto_asym_op *op = cop->asym;
 811         struct cpt_asym_sess_misc *sess;
 812
 813         sess = get_asym_session_private_data(op->session,
 814                                              otx2_cryptodev_driver_id);
 815
 816         switch (sess->xfrm_type) {
 817         case RTE_CRYPTO_ASYM_XFORM_RSA:
 818                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 819                 break;
 820         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 821                 op->modex.result.length = sess->mod_ctx.modulus.length;
 822                 memcpy(op->modex.result.data, req->rptr,
 823                        op->modex.result.length);
 824                 break;
 825         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 826                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 827                 break;
 828         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 829                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 830                 break;
 831         default:
 832                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 833                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 834                 break;
 835         }
 836 }
 837
 838 static void
 839 otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 840 {
 841         struct cpt_request_info *req = (struct cpt_request_info *)rsp[2];
 842         vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;
 843         struct rte_crypto_sym_op *sym_op = cop->sym;
 844         struct rte_mbuf *m = sym_op->m_src;
 845         struct rte_ipv4_hdr *ip;
 846         uint16_t m_len;
 847         int mdata_len;
 848         char *data;
 849
 850         mdata_len = (int)rsp[3];
 851         rte_pktmbuf_trim(m, mdata_len);
 852
 853         if ((word0->s.opcode & 0xff) == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 854                 data = rte_pktmbuf_mtod(m, char *);
 855                 ip = (struct rte_ipv4_hdr *)(data + OTX2_IPSEC_PO_INB_RPTR_HDR);
 856
 857                 m_len = rte_be_to_cpu_16(ip->total_length);
 858
 859                 m->data_len = m_len;
 860                 m->pkt_len = m_len;
 861                 m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;
 862         }
 863 }
 864
 865 static inline void
 866 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 867                               uintptr_t *rsp, uint8_t cc)
 868 {
 869         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 870                 if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 871                         if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {
 872                                 otx2_cpt_sec_post_process(cop, rsp);
 873                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 874                         } else
 875                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 876
 877                         return;
 878                 }
 879
 880                 if (likely(cc == NO_ERR)) {
 881                         /* Verify authentication data if required */
 882                         if (unlikely(rsp[2]))
 883                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
 884                                                  rsp[3]);
 885                         else
 886                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 887                 } else {
 888                         if (cc == ERR_GC_ICV_MISCOMPARE)
 889                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 890                         else
 891                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 892                 }
 893
 894                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 895                         sym_session_clear(otx2_cryptodev_driver_id,
 896                                           cop->sym->session);
 897                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 898                         cop->sym->session = NULL;
 899                 }
 900         }
 901
 902         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 903                 if (likely(cc == NO_ERR)) {
 904                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 905                         /*
 906                          * Pass cpt_req_info stored in metabuf during
 907                          * enqueue.
 908                          */
 909                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
 910                         otx2_cpt_asym_post_process(cop,
 911                                         (struct cpt_request_info *)rsp);
 912                 } else
 913                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 914         }
 915 }
 916
 917 static __rte_always_inline uint8_t
 918 otx2_cpt_compcode_get(struct cpt_request_info *req)
 919 {
 920         volatile struct cpt_res_s_9s *res;
 921         uint8_t ret;
 922
 923         res = (volatile struct cpt_res_s_9s *)req->completion_addr;
 924
 925         if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
 926                 if (rte_get_timer_cycles() < req->time_out)
 927                         return ERR_REQ_PENDING;
 928
 929                 CPT_LOG_DP_ERR("Request timed out");
 930                 return ERR_REQ_TIMEOUT;
 931         }
 932
 933         if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
 934                 ret = NO_ERR;
 935                 if (unlikely(res->uc_compcode)) {
 936                         ret = res->uc_compcode;
 937                         CPT_LOG_DP_DEBUG("Request failed with microcode error");
 938                         CPT_LOG_DP_DEBUG("MC completion code 0x%x",
 939                                          res->uc_compcode);
 940                 }
 941         } else {
 942                 CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
 943
 944                 ret = res->compcode;
 945                 switch (res->compcode) {
 946                 case CPT_9X_COMP_E_INSTERR:
 947                         CPT_LOG_DP_ERR("Request failed with instruction error");
 948                         break;
 949                 case CPT_9X_COMP_E_FAULT:
 950                         CPT_LOG_DP_ERR("Request failed with DMA fault");
 951                         break;
 952                 case CPT_9X_COMP_E_HWERR:
 953                         CPT_LOG_DP_ERR("Request failed with hardware error");
 954                         break;
 955                 default:
 956                         CPT_LOG_DP_ERR("Request failed with unknown completion code");
 957                 }
 958         }
 959
 960         return ret;
 961 }
 962
 963 static uint16_t
 964 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 965 {
 966         int i, nb_pending, nb_completed;
 967         struct otx2_cpt_qp *qp = qptr;
 968         struct pending_queue *pend_q;
 969         struct cpt_request_info *req;
 970         struct rte_crypto_op *cop;
 971         uint8_t cc[nb_ops];
 972         struct rid *rid;
 973         uintptr_t *rsp;
 974         void *metabuf;
 975
 976         pend_q = &qp->pend_q;
 977
 978         nb_pending = pend_q->pending_count;
 979
 980         if (nb_ops > nb_pending)
 981                 nb_ops = nb_pending;
 982
 983         for (i = 0; i < nb_ops; i++) {
 984                 rid = &pend_q->rid_queue[pend_q->deq_head];
 985                 req = (struct cpt_request_info *)(rid->rid);
 986
 987                 cc[i] = otx2_cpt_compcode_get(req);
 988
 989                 if (unlikely(cc[i] == ERR_REQ_PENDING))
 990                         break;
 991
 992                 ops[i] = req->op;
 993
 994                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
 995                 pend_q->pending_count -= 1;
 996         }
 997
 998         nb_completed = i;
 999
1000         for (i = 0; i < nb_completed; i++) {
1001                 rsp = (void *)ops[i];
1002
1003                 metabuf = (void *)rsp[0];
1004                 cop = (void *)rsp[1];
1005
1006                 ops[i] = cop;
1007
1008                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
1009
1010                 free_op_meta(metabuf, qp->meta_info.pool);
1011         }
1012
1013         return nb_completed;
1014 }
1015
1016 /* PMD ops */
1017
1018 static int
1019 otx2_cpt_dev_config(struct rte_cryptodev *dev,
1020                     struct rte_cryptodev_config *conf)
1021 {
1022         struct otx2_cpt_vf *vf = dev->data->dev_private;
1023         int ret;
1024
1025         if (conf->nb_queue_pairs > vf->max_queues) {
1026                 CPT_LOG_ERR("Invalid number of queue pairs requested");
1027                 return -EINVAL;
1028         }
1029
1030         dev->feature_flags &= ~conf->ff_disable;
1031
1032         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
1033                 /* Initialize shared FPM table */
1034                 ret = cpt_fpm_init(otx2_fpm_iova);
1035                 if (ret)
1036                         return ret;
1037         }
1038
1039         /* Unregister error interrupts */
1040         if (vf->err_intr_registered)
1041                 otx2_cpt_err_intr_unregister(dev);
1042
1043         /* Detach queues */
1044         if (vf->nb_queues) {
1045                 ret = otx2_cpt_queues_detach(dev);
1046                 if (ret) {
1047                         CPT_LOG_ERR("Could not detach CPT queues");
1048                         return ret;
1049                 }
1050         }
1051
1052         /* Attach queues */
1053         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
1054         if (ret) {
1055                 CPT_LOG_ERR("Could not attach CPT queues");
1056                 return -ENODEV;
1057         }
1058
1059         ret = otx2_cpt_msix_offsets_get(dev);
1060         if (ret) {
1061                 CPT_LOG_ERR("Could not get MSI-X offsets");
1062                 goto queues_detach;
1063         }
1064
1065         /* Register error interrupts */
1066         ret = otx2_cpt_err_intr_register(dev);
1067         if (ret) {
1068                 CPT_LOG_ERR("Could not register error interrupts");
1069                 goto queues_detach;
1070         }
1071
1072         ret = otx2_cpt_inline_init(dev);
1073         if (ret) {
1074                 CPT_LOG_ERR("Could not enable inline IPsec");
1075                 goto intr_unregister;
1076         }
1077
1078         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1079         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1080
1081         rte_mb();
1082         return 0;
1083
1084 intr_unregister:
1085         otx2_cpt_err_intr_unregister(dev);
1086 queues_detach:
1087         otx2_cpt_queues_detach(dev);
1088         return ret;
1089 }
1090
1091 static int
1092 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1093 {
1094         RTE_SET_USED(dev);
1095
1096         CPT_PMD_INIT_FUNC_TRACE();
1097
1098         return 0;
1099 }
1100
1101 static void
1102 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1103 {
1104         CPT_PMD_INIT_FUNC_TRACE();
1105
1106         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1107                 cpt_fpm_clear();
1108 }
1109
1110 static int
1111 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1112 {
1113         struct otx2_cpt_vf *vf = dev->data->dev_private;
1114         int i, ret = 0;
1115
1116         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1117                 ret = otx2_cpt_queue_pair_release(dev, i);
1118                 if (ret)
1119                         return ret;
1120         }
1121
1122         /* Unregister error interrupts */
1123         if (vf->err_intr_registered)
1124                 otx2_cpt_err_intr_unregister(dev);
1125
1126         /* Detach queues */
1127         if (vf->nb_queues) {
1128                 ret = otx2_cpt_queues_detach(dev);
1129                 if (ret)
1130                         CPT_LOG_ERR("Could not detach CPT queues");
1131         }
1132
1133         return ret;
1134 }
1135
1136 static void
1137 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1138                       struct rte_cryptodev_info *info)
1139 {
1140         struct otx2_cpt_vf *vf = dev->data->dev_private;
1141
1142         if (info != NULL) {
1143                 info->max_nb_queue_pairs = vf->max_queues;
1144                 info->feature_flags = dev->feature_flags;
1145                 info->capabilities = otx2_cpt_capabilities_get();
1146                 info->sym.max_nb_sessions = 0;
1147                 info->driver_id = otx2_cryptodev_driver_id;
1148                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1149                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1150         }
1151 }
1152
1153 static int
1154 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1155                           const struct rte_cryptodev_qp_conf *conf,
1156                           int socket_id __rte_unused)
1157 {
1158         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1159         struct rte_pci_device *pci_dev;
1160         struct otx2_cpt_qp *qp;
1161
1162         CPT_PMD_INIT_FUNC_TRACE();
1163
1164         if (dev->data->queue_pairs[qp_id] != NULL)
1165                 otx2_cpt_queue_pair_release(dev, qp_id);
1166
1167         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1168                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1169                             conf->nb_descriptors);
1170                 return -EINVAL;
1171         }
1172
1173         pci_dev = RTE_DEV_TO_PCI(dev->device);
1174
1175         if (pci_dev->mem_resource[2].addr == NULL) {
1176                 CPT_LOG_ERR("Invalid PCI mem address");
1177                 return -EIO;
1178         }
1179
1180         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1181         if (qp == NULL) {
1182                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1183                 return -ENOMEM;
1184         }
1185
1186         qp->sess_mp = conf->mp_session;
1187         qp->sess_mp_priv = conf->mp_session_private;
1188         dev->data->queue_pairs[qp_id] = qp;
1189
1190         return 0;
1191 }
1192
1193 static int
1194 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1195 {
1196         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1197         int ret;
1198
1199         CPT_PMD_INIT_FUNC_TRACE();
1200
1201         if (qp == NULL)
1202                 return -EINVAL;
1203
1204         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1205
1206         ret = otx2_cpt_qp_destroy(dev, qp);
1207         if (ret) {
1208                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1209                 return ret;
1210         }
1211
1212         dev->data->queue_pairs[qp_id] = NULL;
1213
1214         return 0;
1215 }
1216
1217 static unsigned int
1218 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1219 {
1220         return cpt_get_session_size();
1221 }
1222
1223 static int
1224 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1225                                struct rte_crypto_sym_xform *xform,
1226                                struct rte_cryptodev_sym_session *sess,
1227                                struct rte_mempool *pool)
1228 {
1229         CPT_PMD_INIT_FUNC_TRACE();
1230
1231         return sym_session_configure(dev->driver_id, xform, sess, pool);
1232 }
1233
1234 static void
1235 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1236                            struct rte_cryptodev_sym_session *sess)
1237 {
1238         CPT_PMD_INIT_FUNC_TRACE();
1239
1240         return sym_session_clear(dev->driver_id, sess);
1241 }
1242
1243 static unsigned int
1244 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1245 {
1246         return sizeof(struct cpt_asym_sess_misc);
1247 }
1248
1249 static int
1250 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1251                           struct rte_crypto_asym_xform *xform,
1252                           struct rte_cryptodev_asym_session *sess,
1253                           struct rte_mempool *pool)
1254 {
1255         struct cpt_asym_sess_misc *priv;
1256         int ret;
1257
1258         CPT_PMD_INIT_FUNC_TRACE();
1259
1260         if (rte_mempool_get(pool, (void **)&priv)) {
1261                 CPT_LOG_ERR("Could not allocate session_private_data");
1262                 return -ENOMEM;
1263         }
1264
1265         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1266
1267         ret = cpt_fill_asym_session_parameters(priv, xform);
1268         if (ret) {
1269                 CPT_LOG_ERR("Could not configure session parameters");
1270
1271                 /* Return session to mempool */
1272                 rte_mempool_put(pool, priv);
1273                 return ret;
1274         }
1275
1276         set_asym_session_private_data(sess, dev->driver_id, priv);
1277         return 0;
1278 }
1279
1280 static void
1281 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1282                             struct rte_cryptodev_asym_session *sess)
1283 {
1284         struct cpt_asym_sess_misc *priv;
1285         struct rte_mempool *sess_mp;
1286
1287         CPT_PMD_INIT_FUNC_TRACE();
1288
1289         priv = get_asym_session_private_data(sess, dev->driver_id);
1290         if (priv == NULL)
1291                 return;
1292
1293         /* Free resources allocated in session_cfg */
1294         cpt_free_asym_session_parameters(priv);
1295
1296         /* Reset and free object back to pool */
1297         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1298         sess_mp = rte_mempool_from_obj(priv);
1299         set_asym_session_private_data(sess, dev->driver_id, NULL);
1300         rte_mempool_put(sess_mp, priv);
1301 }
1302
1303 struct rte_cryptodev_ops otx2_cpt_ops = {
1304         /* Device control ops */
1305         .dev_configure = otx2_cpt_dev_config,
1306         .dev_start = otx2_cpt_dev_start,
1307         .dev_stop = otx2_cpt_dev_stop,
1308         .dev_close = otx2_cpt_dev_close,
1309         .dev_infos_get = otx2_cpt_dev_info_get,
1310
1311         .stats_get = NULL,
1312         .stats_reset = NULL,
1313         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1314         .queue_pair_release = otx2_cpt_queue_pair_release,
1315
1316         /* Symmetric crypto ops */
1317         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1318         .sym_session_configure = otx2_cpt_sym_session_configure,
1319         .sym_session_clear = otx2_cpt_sym_session_clear,
1320
1321         /* Asymmetric crypto ops */
1322         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1323         .asym_session_configure = otx2_cpt_asym_session_cfg,
1324         .asym_session_clear = otx2_cpt_asym_session_clear,
1325
1326 };