1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (C) 2019 Marvell International Ltd.
7 #include <rte_cryptodev_pmd.h>
10 #include "otx2_cryptodev.h"
11 #include "otx2_cryptodev_capabilities.h"
12 #include "otx2_cryptodev_hw_access.h"
13 #include "otx2_cryptodev_mbox.h"
14 #include "otx2_cryptodev_ops.h"
15 #include "otx2_mbox.h"
17 #include "cpt_hw_types.h"
18 #include "cpt_pmd_logs.h"
19 #include "cpt_pmd_ops_helper.h"
20 #include "cpt_ucode.h"
21 #include "cpt_ucode_asym.h"
23 #define METABUF_POOL_CACHE_SIZE 512
25 /* Forward declarations */
28 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
31 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
33 snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
37 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
38 struct otx2_cpt_qp *qp, uint8_t qp_id,
41 char mempool_name[RTE_MEMPOOL_NAMESIZE];
42 struct cpt_qp_meta_info *meta_info;
43 struct rte_mempool *pool;
49 if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
51 /* Get meta len for scatter gather mode */
52 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
54 /* Extra 32B saved for future considerations */
55 sg_mlen += 4 * sizeof(uint64_t);
57 /* Get meta len for linear buffer (direct) mode */
58 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
60 /* Extra 32B saved for future considerations */
61 lb_mlen += 4 * sizeof(uint64_t);
64 if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
66 /* Get meta len required for asymmetric operations */
67 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
71 * Check max requirement for meta buffer to
72 * support crypto op of any type (sym/asym).
74 max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
76 /* Allocate mempool */
78 snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
79 dev->data->dev_id, qp_id);
81 pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
82 METABUF_POOL_CACHE_SIZE, 0,
86 CPT_LOG_ERR("Could not create mempool for metabuf");
90 ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
93 CPT_LOG_ERR("Could not set mempool ops");
97 ret = rte_mempool_populate_default(pool);
99 CPT_LOG_ERR("Could not populate metabuf pool");
103 meta_info = &qp->meta_info;
105 meta_info->pool = pool;
106 meta_info->lb_mlen = lb_mlen;
107 meta_info->sg_mlen = sg_mlen;
112 rte_mempool_free(pool);
117 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
119 struct cpt_qp_meta_info *meta_info = &qp->meta_info;
121 rte_mempool_free(meta_info->pool);
123 meta_info->pool = NULL;
124 meta_info->lb_mlen = 0;
125 meta_info->sg_mlen = 0;
128 static struct otx2_cpt_qp *
129 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
132 struct otx2_cpt_vf *vf = dev->data->dev_private;
133 uint64_t pg_sz = sysconf(_SC_PAGESIZE);
134 const struct rte_memzone *lf_mem;
135 uint32_t len, iq_len, size_div40;
136 char name[RTE_MEMZONE_NAMESIZE];
137 uint64_t used_len, iova;
138 struct otx2_cpt_qp *qp;
143 /* Allocate queue pair */
144 qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
147 CPT_LOG_ERR("Could not allocate queue pair");
151 iq_len = OTX2_CPT_IQ_LEN;
154 * Queue size must be a multiple of 40 and effective queue size to
155 * software is (size_div40 - 1) * 40
157 size_div40 = (iq_len + 40 - 1) / 40 + 1;
159 /* For pending queue */
160 len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
162 /* Space for instruction group memory */
163 len += size_div40 * 16;
165 /* So that instruction queues start as pg size aligned */
166 len = RTE_ALIGN(len, pg_sz);
168 /* For instruction queues */
169 len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
171 /* Wastage after instruction queues */
172 len = RTE_ALIGN(len, pg_sz);
174 qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
177 lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
178 RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
179 RTE_CACHE_LINE_SIZE);
180 if (lf_mem == NULL) {
181 CPT_LOG_ERR("Could not allocate reserved memzone");
190 ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
192 CPT_LOG_ERR("Could not create mempool for metabuf");
196 /* Initialize pending queue */
197 qp->pend_q.rid_queue = (struct rid *)va;
198 qp->pend_q.enq_tail = 0;
199 qp->pend_q.deq_head = 0;
200 qp->pend_q.pending_count = 0;
202 used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
203 used_len += size_div40 * 16;
204 used_len = RTE_ALIGN(used_len, pg_sz);
207 qp->iq_dma_addr = iova;
209 qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
211 lmtline = vf->otx2_dev.bar2 +
212 (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
213 OTX2_LMT_LF_LMTLINE(0);
215 qp->lmtline = (void *)lmtline;
217 qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
219 otx2_cpt_iq_disable(qp);
221 ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
224 CPT_LOG_ERR("Could not enable instruction queue");
225 goto mempool_destroy;
231 otx2_cpt_metabuf_mempool_destroy(qp);
233 rte_memzone_free(lf_mem);
240 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
242 const struct rte_memzone *lf_mem;
243 char name[RTE_MEMZONE_NAMESIZE];
246 otx2_cpt_iq_disable(qp);
248 otx2_cpt_metabuf_mempool_destroy(qp);
250 qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
253 lf_mem = rte_memzone_lookup(name);
255 ret = rte_memzone_free(lf_mem);
265 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
266 struct rte_cryptodev_sym_session *sess,
267 struct rte_mempool *pool)
269 struct cpt_sess_misc *misc;
273 if (unlikely(cpt_is_algo_supported(xform))) {
274 CPT_LOG_ERR("Crypto xform not supported");
278 if (unlikely(rte_mempool_get(pool, &priv))) {
279 CPT_LOG_ERR("Could not allocate session private data");
285 for ( ; xform != NULL; xform = xform->next) {
286 switch (xform->type) {
287 case RTE_CRYPTO_SYM_XFORM_AEAD:
288 ret = fill_sess_aead(xform, misc);
290 case RTE_CRYPTO_SYM_XFORM_CIPHER:
291 ret = fill_sess_cipher(xform, misc);
293 case RTE_CRYPTO_SYM_XFORM_AUTH:
294 if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
295 ret = fill_sess_gmac(xform, misc);
297 ret = fill_sess_auth(xform, misc);
307 set_sym_session_private_data(sess, driver_id, misc);
309 misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
310 sizeof(struct cpt_sess_misc);
313 * IE engines support IPsec operations
314 * SE engines support IPsec operations and Air-Crypto operations
317 misc->egrp = OTX2_CPT_EGRP_SE;
319 misc->egrp = OTX2_CPT_EGRP_SE_IE;
324 rte_mempool_put(pool, priv);
326 CPT_LOG_ERR("Crypto xform not supported");
331 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
333 void *priv = get_sym_session_private_data(sess, driver_id);
334 struct rte_mempool *pool;
339 memset(priv, 0, cpt_get_session_size());
341 pool = rte_mempool_from_obj(priv);
343 set_sym_session_private_data(sess, driver_id, NULL);
345 rte_mempool_put(pool, priv);
348 static __rte_always_inline int32_t __hot
349 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
350 struct pending_queue *pend_q,
351 struct cpt_request_info *req)
353 void *lmtline = qp->lmtline;
354 union cpt_inst_s inst;
357 if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
361 inst.s9x.res_addr = req->comp_baddr;
365 inst.s9x.ei0 = req->ist.ei0;
366 inst.s9x.ei1 = req->ist.ei1;
367 inst.s9x.ei2 = req->ist.ei2;
368 inst.s9x.ei3 = req->ist.ei3;
370 req->time_out = rte_get_timer_cycles() +
371 DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
374 /* Copy CPT command to LMTLINE */
375 memcpy(lmtline, &inst, sizeof(inst));
378 * Make sure compiler does not reorder memcpy and ldeor.
379 * LMTST transactions are always flushed from the write
380 * buffer immediately, a DMB is not required to push out
384 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
385 } while (lmt_status == 0);
387 pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
389 /* We will use soft queue length here to limit requests */
390 MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
391 pend_q->pending_count += 1;
396 static __rte_always_inline int __hot
397 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
398 struct pending_queue *pend_q)
400 struct rte_crypto_sym_op *sym_op = op->sym;
401 struct cpt_request_info *req;
402 struct cpt_sess_misc *sess;
408 sess = get_sym_session_private_data(sym_op->session,
409 otx2_cryptodev_driver_id);
411 cpt_op = sess->cpt_op;
413 if (cpt_op & CPT_OP_CIPHER_MASK)
414 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
417 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
421 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
422 op, (unsigned int)cpt_op, ret);
426 w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
427 w3->s.grp = sess->egrp;
429 ret = otx2_cpt_enqueue_req(qp, pend_q, req);
432 /* Free buffer allocated by fill params routines */
433 free_op_meta(mdata, qp->meta_info.pool);
439 static __rte_always_inline int __hot
440 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
441 struct pending_queue *pend_q)
443 const int driver_id = otx2_cryptodev_driver_id;
444 struct rte_crypto_sym_op *sym_op = op->sym;
445 struct rte_cryptodev_sym_session *sess;
448 /* Create temporary session */
450 if (rte_mempool_get(qp->sess_mp, (void **)&sess))
453 ret = sym_session_configure(driver_id, sym_op->xform, sess,
458 sym_op->session = sess;
460 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
468 sym_session_clear(driver_id, sess);
470 rte_mempool_put(qp->sess_mp, sess);
475 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
477 uint16_t nb_allowed, count = 0;
478 struct otx2_cpt_qp *qp = qptr;
479 struct pending_queue *pend_q;
480 struct rte_crypto_op *op;
483 pend_q = &qp->pend_q;
485 nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
486 if (nb_ops > nb_allowed)
489 for (count = 0; count < nb_ops; count++) {
491 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
492 if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
493 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
495 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
508 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
509 uintptr_t *rsp, uint8_t cc)
511 if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
512 if (likely(cc == NO_ERR)) {
513 /* Verify authentication data if required */
514 if (unlikely(rsp[2]))
515 compl_auth_verify(cop, (uint8_t *)rsp[2],
518 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
520 if (cc == ERR_GC_ICV_MISCOMPARE)
521 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
523 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
526 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
527 sym_session_clear(otx2_cryptodev_driver_id,
529 rte_mempool_put(qp->sess_mp, cop->sym->session);
530 cop->sym->session = NULL;
535 static __rte_always_inline uint8_t
536 otx2_cpt_compcode_get(struct cpt_request_info *req)
538 volatile struct cpt_res_s_9s *res;
541 res = (volatile struct cpt_res_s_9s *)req->completion_addr;
543 if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
544 if (rte_get_timer_cycles() < req->time_out)
545 return ERR_REQ_PENDING;
547 CPT_LOG_DP_ERR("Request timed out");
548 return ERR_REQ_TIMEOUT;
551 if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
553 if (unlikely(res->uc_compcode)) {
554 ret = res->uc_compcode;
555 CPT_LOG_DP_DEBUG("Request failed with microcode error");
556 CPT_LOG_DP_DEBUG("MC completion code 0x%x",
560 CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
563 switch (res->compcode) {
564 case CPT_9X_COMP_E_INSTERR:
565 CPT_LOG_DP_ERR("Request failed with instruction error");
567 case CPT_9X_COMP_E_FAULT:
568 CPT_LOG_DP_ERR("Request failed with DMA fault");
570 case CPT_9X_COMP_E_HWERR:
571 CPT_LOG_DP_ERR("Request failed with hardware error");
574 CPT_LOG_DP_ERR("Request failed with unknown completion code");
582 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
584 int i, nb_pending, nb_completed;
585 struct otx2_cpt_qp *qp = qptr;
586 struct pending_queue *pend_q;
587 struct cpt_request_info *req;
588 struct rte_crypto_op *cop;
594 pend_q = &qp->pend_q;
596 nb_pending = pend_q->pending_count;
598 if (nb_ops > nb_pending)
601 for (i = 0; i < nb_ops; i++) {
602 rid = &pend_q->rid_queue[pend_q->deq_head];
603 req = (struct cpt_request_info *)(rid->rid);
605 cc[i] = otx2_cpt_compcode_get(req);
607 if (unlikely(cc[i] == ERR_REQ_PENDING))
612 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
613 pend_q->pending_count -= 1;
618 for (i = 0; i < nb_completed; i++) {
619 rsp = (void *)ops[i];
621 metabuf = (void *)rsp[0];
622 cop = (void *)rsp[1];
626 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
628 free_op_meta(metabuf, qp->meta_info.pool);
637 otx2_cpt_dev_config(struct rte_cryptodev *dev,
638 struct rte_cryptodev_config *conf)
640 struct otx2_cpt_vf *vf = dev->data->dev_private;
643 if (conf->nb_queue_pairs > vf->max_queues) {
644 CPT_LOG_ERR("Invalid number of queue pairs requested");
648 dev->feature_flags &= ~conf->ff_disable;
650 /* Unregister error interrupts */
651 if (vf->err_intr_registered)
652 otx2_cpt_err_intr_unregister(dev);
656 ret = otx2_cpt_queues_detach(dev);
658 CPT_LOG_ERR("Could not detach CPT queues");
664 ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
666 CPT_LOG_ERR("Could not attach CPT queues");
670 ret = otx2_cpt_msix_offsets_get(dev);
672 CPT_LOG_ERR("Could not get MSI-X offsets");
676 /* Register error interrupts */
677 ret = otx2_cpt_err_intr_register(dev);
679 CPT_LOG_ERR("Could not register error interrupts");
683 dev->enqueue_burst = otx2_cpt_enqueue_burst;
684 dev->dequeue_burst = otx2_cpt_dequeue_burst;
690 otx2_cpt_queues_detach(dev);
695 otx2_cpt_dev_start(struct rte_cryptodev *dev)
699 CPT_PMD_INIT_FUNC_TRACE();
705 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
709 CPT_PMD_INIT_FUNC_TRACE();
713 otx2_cpt_dev_close(struct rte_cryptodev *dev)
715 struct otx2_cpt_vf *vf = dev->data->dev_private;
718 for (i = 0; i < dev->data->nb_queue_pairs; i++) {
719 ret = otx2_cpt_queue_pair_release(dev, i);
724 /* Unregister error interrupts */
725 if (vf->err_intr_registered)
726 otx2_cpt_err_intr_unregister(dev);
730 ret = otx2_cpt_queues_detach(dev);
732 CPT_LOG_ERR("Could not detach CPT queues");
739 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
740 struct rte_cryptodev_info *info)
742 struct otx2_cpt_vf *vf = dev->data->dev_private;
745 info->max_nb_queue_pairs = vf->max_queues;
746 info->feature_flags = dev->feature_flags;
747 info->capabilities = otx2_cpt_capabilities_get();
748 info->sym.max_nb_sessions = 0;
749 info->driver_id = otx2_cryptodev_driver_id;
750 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
751 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
756 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
757 const struct rte_cryptodev_qp_conf *conf,
758 int socket_id __rte_unused)
760 uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
761 struct rte_pci_device *pci_dev;
762 struct otx2_cpt_qp *qp;
764 CPT_PMD_INIT_FUNC_TRACE();
766 if (dev->data->queue_pairs[qp_id] != NULL)
767 otx2_cpt_queue_pair_release(dev, qp_id);
769 if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
770 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
771 conf->nb_descriptors);
775 pci_dev = RTE_DEV_TO_PCI(dev->device);
777 if (pci_dev->mem_resource[2].addr == NULL) {
778 CPT_LOG_ERR("Invalid PCI mem address");
782 qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
784 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
788 qp->sess_mp = conf->mp_session;
789 qp->sess_mp_priv = conf->mp_session_private;
790 dev->data->queue_pairs[qp_id] = qp;
796 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
798 struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
801 CPT_PMD_INIT_FUNC_TRACE();
806 CPT_LOG_INFO("Releasing queue pair %d", qp_id);
808 ret = otx2_cpt_qp_destroy(dev, qp);
810 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
814 dev->data->queue_pairs[qp_id] = NULL;
820 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
822 return cpt_get_session_size();
826 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
827 struct rte_crypto_sym_xform *xform,
828 struct rte_cryptodev_sym_session *sess,
829 struct rte_mempool *pool)
831 CPT_PMD_INIT_FUNC_TRACE();
833 return sym_session_configure(dev->driver_id, xform, sess, pool);
837 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
838 struct rte_cryptodev_sym_session *sess)
840 CPT_PMD_INIT_FUNC_TRACE();
842 return sym_session_clear(dev->driver_id, sess);
846 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
848 return sizeof(struct cpt_asym_sess_misc);
852 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
853 struct rte_crypto_asym_xform *xform,
854 struct rte_cryptodev_asym_session *sess,
855 struct rte_mempool *pool)
857 struct cpt_asym_sess_misc *priv;
860 CPT_PMD_INIT_FUNC_TRACE();
862 if (rte_mempool_get(pool, (void **)&priv)) {
863 CPT_LOG_ERR("Could not allocate session_private_data");
867 memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
869 ret = cpt_fill_asym_session_parameters(priv, xform);
871 CPT_LOG_ERR("Could not configure session parameters");
873 /* Return session to mempool */
874 rte_mempool_put(pool, priv);
878 set_asym_session_private_data(sess, dev->driver_id, priv);
883 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
884 struct rte_cryptodev_asym_session *sess)
886 struct cpt_asym_sess_misc *priv;
887 struct rte_mempool *sess_mp;
889 CPT_PMD_INIT_FUNC_TRACE();
891 priv = get_asym_session_private_data(sess, dev->driver_id);
895 /* Free resources allocated in session_cfg */
896 cpt_free_asym_session_parameters(priv);
898 /* Reset and free object back to pool */
899 memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
900 sess_mp = rte_mempool_from_obj(priv);
901 set_asym_session_private_data(sess, dev->driver_id, NULL);
902 rte_mempool_put(sess_mp, priv);
905 struct rte_cryptodev_ops otx2_cpt_ops = {
906 /* Device control ops */
907 .dev_configure = otx2_cpt_dev_config,
908 .dev_start = otx2_cpt_dev_start,
909 .dev_stop = otx2_cpt_dev_stop,
910 .dev_close = otx2_cpt_dev_close,
911 .dev_infos_get = otx2_cpt_dev_info_get,
915 .queue_pair_setup = otx2_cpt_queue_pair_setup,
916 .queue_pair_release = otx2_cpt_queue_pair_release,
917 .queue_pair_count = NULL,
919 /* Symmetric crypto ops */
920 .sym_session_get_size = otx2_cpt_sym_session_get_size,
921 .sym_session_configure = otx2_cpt_sym_session_configure,
922 .sym_session_clear = otx2_cpt_sym_session_clear,
924 /* Asymmetric crypto ops */
925 .asym_session_get_size = otx2_cpt_asym_session_size_get,
926 .asym_session_configure = otx2_cpt_asym_session_cfg,
927 .asym_session_clear = otx2_cpt_asym_session_clear,