drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10 #include <rte_event_crypto_adapter.h>
  11
  12 #include "otx2_cryptodev.h"
  13 #include "otx2_cryptodev_capabilities.h"
  14 #include "otx2_cryptodev_hw_access.h"
  15 #include "otx2_cryptodev_mbox.h"
  16 #include "otx2_cryptodev_ops.h"
  17 #include "otx2_cryptodev_ops_helper.h"
  18 #include "otx2_ipsec_anti_replay.h"
  19 #include "otx2_ipsec_po_ops.h"
  20 #include "otx2_mbox.h"
  21 #include "otx2_sec_idev.h"
  22 #include "otx2_security.h"
  23
  24 #include "cpt_hw_types.h"
  25 #include "cpt_pmd_logs.h"
  26 #include "cpt_pmd_ops_helper.h"
  27 #include "cpt_ucode.h"
  28 #include "cpt_ucode_asym.h"
  29
  30 #define METABUF_POOL_CACHE_SIZE 512
  31
  32 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  33
  34 /* Forward declarations */
  35
  36 static int
  37 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  38
  39 static void
  40 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  41 {
  42         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  43 }
  44
  45 static int
  46 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  47                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  48                                 unsigned int nb_elements)
  49 {
  50         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  51         struct cpt_qp_meta_info *meta_info;
  52         int ret, max_mlen, mb_pool_sz;
  53         struct rte_mempool *pool;
  54         int asym_mlen = 0;
  55         int lb_mlen = 0;
  56         int sg_mlen = 0;
  57
  58         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  59
  60                 /* Get meta len for scatter gather mode */
  61                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  62
  63                 /* Extra 32B saved for future considerations */
  64                 sg_mlen += 4 * sizeof(uint64_t);
  65
  66                 /* Get meta len for linear buffer (direct) mode */
  67                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  68
  69                 /* Extra 32B saved for future considerations */
  70                 lb_mlen += 4 * sizeof(uint64_t);
  71         }
  72
  73         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  74
  75                 /* Get meta len required for asymmetric operations */
  76                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  77         }
  78
  79         /*
  80          * Check max requirement for meta buffer to
  81          * support crypto op of any type (sym/asym).
  82          */
  83         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  84
  85         /* Allocate mempool */
  86
  87         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  88                  dev->data->dev_id, qp_id);
  89
  90         mb_pool_sz = RTE_MAX(nb_elements, (METABUF_POOL_CACHE_SIZE * rte_lcore_count()));
  91
  92         pool = rte_mempool_create_empty(mempool_name, mb_pool_sz, max_mlen,
  93                                         METABUF_POOL_CACHE_SIZE, 0,
  94                                         rte_socket_id(), 0);
  95
  96         if (pool == NULL) {
  97                 CPT_LOG_ERR("Could not create mempool for metabuf");
  98                 return rte_errno;
  99         }
 100
 101         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
 102                                          NULL);
 103         if (ret) {
 104                 CPT_LOG_ERR("Could not set mempool ops");
 105                 goto mempool_free;
 106         }
 107
 108         ret = rte_mempool_populate_default(pool);
 109         if (ret <= 0) {
 110                 CPT_LOG_ERR("Could not populate metabuf pool");
 111                 goto mempool_free;
 112         }
 113
 114         meta_info = &qp->meta_info;
 115
 116         meta_info->pool = pool;
 117         meta_info->lb_mlen = lb_mlen;
 118         meta_info->sg_mlen = sg_mlen;
 119
 120         return 0;
 121
 122 mempool_free:
 123         rte_mempool_free(pool);
 124         return ret;
 125 }
 126
 127 static void
 128 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 129 {
 130         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 131
 132         rte_mempool_free(meta_info->pool);
 133
 134         meta_info->pool = NULL;
 135         meta_info->lb_mlen = 0;
 136         meta_info->sg_mlen = 0;
 137 }
 138
 139 static int
 140 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 141 {
 142         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 143         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 144         int i, ret;
 145
 146         for (i = 0; i < nb_ethport; i++) {
 147                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 148                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 149                         break;
 150         }
 151
 152         if (i >= nb_ethport)
 153                 return 0;
 154
 155         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 156         if (ret)
 157                 return ret;
 158
 159         /* Publish inline Tx QP to eth dev security */
 160         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 161         if (ret)
 162                 return ret;
 163
 164         return 0;
 165 }
 166
 167 static struct otx2_cpt_qp *
 168 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 169                    uint8_t group)
 170 {
 171         struct otx2_cpt_vf *vf = dev->data->dev_private;
 172         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 173         const struct rte_memzone *lf_mem;
 174         uint32_t len, iq_len, size_div40;
 175         char name[RTE_MEMZONE_NAMESIZE];
 176         uint64_t used_len, iova;
 177         struct otx2_cpt_qp *qp;
 178         uint64_t lmtline;
 179         uint8_t *va;
 180         int ret;
 181
 182         /* Allocate queue pair */
 183         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 184                                 OTX2_ALIGN, 0);
 185         if (qp == NULL) {
 186                 CPT_LOG_ERR("Could not allocate queue pair");
 187                 return NULL;
 188         }
 189
 190         iq_len = OTX2_CPT_IQ_LEN;
 191
 192         /*
 193          * Queue size must be a multiple of 40 and effective queue size to
 194          * software is (size_div40 - 1) * 40
 195          */
 196         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 197
 198         /* For pending queue */
 199         len = iq_len * sizeof(uintptr_t);
 200
 201         /* Space for instruction group memory */
 202         len += size_div40 * 16;
 203
 204         /* So that instruction queues start as pg size aligned */
 205         len = RTE_ALIGN(len, pg_sz);
 206
 207         /* For instruction queues */
 208         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 209
 210         /* Wastage after instruction queues */
 211         len = RTE_ALIGN(len, pg_sz);
 212
 213         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 214                             qp_id);
 215
 216         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 217                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 218                         RTE_CACHE_LINE_SIZE);
 219         if (lf_mem == NULL) {
 220                 CPT_LOG_ERR("Could not allocate reserved memzone");
 221                 goto qp_free;
 222         }
 223
 224         va = lf_mem->addr;
 225         iova = lf_mem->iova;
 226
 227         memset(va, 0, len);
 228
 229         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 230         if (ret) {
 231                 CPT_LOG_ERR("Could not create mempool for metabuf");
 232                 goto lf_mem_free;
 233         }
 234
 235         /* Initialize pending queue */
 236         qp->pend_q.req_queue = (uintptr_t *)va;
 237         qp->pend_q.enq_tail = 0;
 238         qp->pend_q.deq_head = 0;
 239         qp->pend_q.pending_count = 0;
 240
 241         used_len = iq_len * sizeof(uintptr_t);
 242         used_len += size_div40 * 16;
 243         used_len = RTE_ALIGN(used_len, pg_sz);
 244         iova += used_len;
 245
 246         qp->iq_dma_addr = iova;
 247         qp->id = qp_id;
 248         qp->blkaddr = vf->lf_blkaddr[qp_id];
 249         qp->base = OTX2_CPT_LF_BAR2(vf, qp->blkaddr, qp_id);
 250
 251         lmtline = vf->otx2_dev.bar2 +
 252                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 253                   OTX2_LMT_LF_LMTLINE(0);
 254
 255         qp->lmtline = (void *)lmtline;
 256
 257         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 258
 259         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 260         if (ret && (ret != -ENOENT)) {
 261                 CPT_LOG_ERR("Could not delete inline configuration");
 262                 goto mempool_destroy;
 263         }
 264
 265         otx2_cpt_iq_disable(qp);
 266
 267         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 268         if (ret) {
 269                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 270                 goto mempool_destroy;
 271         }
 272
 273         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 274                                  size_div40);
 275         if (ret) {
 276                 CPT_LOG_ERR("Could not enable instruction queue");
 277                 goto mempool_destroy;
 278         }
 279
 280         return qp;
 281
 282 mempool_destroy:
 283         otx2_cpt_metabuf_mempool_destroy(qp);
 284 lf_mem_free:
 285         rte_memzone_free(lf_mem);
 286 qp_free:
 287         rte_free(qp);
 288         return NULL;
 289 }
 290
 291 static int
 292 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 293 {
 294         const struct rte_memzone *lf_mem;
 295         char name[RTE_MEMZONE_NAMESIZE];
 296         int ret;
 297
 298         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 299         if (ret && (ret != -ENOENT)) {
 300                 CPT_LOG_ERR("Could not delete inline configuration");
 301                 return ret;
 302         }
 303
 304         otx2_cpt_iq_disable(qp);
 305
 306         otx2_cpt_metabuf_mempool_destroy(qp);
 307
 308         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 309                             qp->id);
 310
 311         lf_mem = rte_memzone_lookup(name);
 312
 313         ret = rte_memzone_free(lf_mem);
 314         if (ret)
 315                 return ret;
 316
 317         rte_free(qp);
 318
 319         return 0;
 320 }
 321
 322 static int
 323 sym_xform_verify(struct rte_crypto_sym_xform *xform)
 324 {
 325         if (xform->next) {
 326                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 327                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 328                     xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
 329                     (xform->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC ||
 330                      xform->next->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC))
 331                         return -ENOTSUP;
 332
 333                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 334                     xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
 335                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 336                     (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_CBC ||
 337                      xform->next->auth.algo != RTE_CRYPTO_AUTH_SHA1_HMAC))
 338                         return -ENOTSUP;
 339
 340                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 341                     xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
 342                     xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 343                     xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
 344                         return -ENOTSUP;
 345
 346                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 347                     xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
 348                     xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 349                     xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
 350                         return -ENOTSUP;
 351
 352         } else {
 353                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 354                     xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
 355                     xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
 356                         return -ENOTSUP;
 357         }
 358         return 0;
 359 }
 360
 361 static int
 362 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 363                       struct rte_cryptodev_sym_session *sess,
 364                       struct rte_mempool *pool)
 365 {
 366         struct rte_crypto_sym_xform *temp_xform = xform;
 367         struct cpt_sess_misc *misc;
 368         vq_cmd_word3_t vq_cmd_w3;
 369         void *priv;
 370         int ret;
 371
 372         ret = sym_xform_verify(xform);
 373         if (unlikely(ret))
 374                 return ret;
 375
 376         if (unlikely(rte_mempool_get(pool, &priv))) {
 377                 CPT_LOG_ERR("Could not allocate session private data");
 378                 return -ENOMEM;
 379         }
 380
 381         memset(priv, 0, sizeof(struct cpt_sess_misc) +
 382                         offsetof(struct cpt_ctx, mc_ctx));
 383
 384         misc = priv;
 385
 386         for ( ; xform != NULL; xform = xform->next) {
 387                 switch (xform->type) {
 388                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 389                         ret = fill_sess_aead(xform, misc);
 390                         break;
 391                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 392                         ret = fill_sess_cipher(xform, misc);
 393                         break;
 394                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 395                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 396                                 ret = fill_sess_gmac(xform, misc);
 397                         else
 398                                 ret = fill_sess_auth(xform, misc);
 399                         break;
 400                 default:
 401                         ret = -1;
 402                 }
 403
 404                 if (ret)
 405                         goto priv_put;
 406         }
 407
 408         if ((GET_SESS_FC_TYPE(misc) == HASH_HMAC) &&
 409                         cpt_mac_len_verify(&temp_xform->auth)) {
 410                 CPT_LOG_ERR("MAC length is not supported");
 411                 ret = -ENOTSUP;
 412                 goto priv_put;
 413         }
 414
 415         set_sym_session_private_data(sess, driver_id, misc);
 416
 417         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 418                              sizeof(struct cpt_sess_misc);
 419
 420         vq_cmd_w3.u64 = 0;
 421         vq_cmd_w3.s.cptr = misc->ctx_dma_addr + offsetof(struct cpt_ctx,
 422                                                          mc_ctx);
 423
 424         /*
 425          * IE engines support IPsec operations
 426          * SE engines support IPsec operations, Chacha-Poly and
 427          * Air-Crypto operations
 428          */
 429         if (misc->zsk_flag || misc->chacha_poly)
 430                 vq_cmd_w3.s.grp = OTX2_CPT_EGRP_SE;
 431         else
 432                 vq_cmd_w3.s.grp = OTX2_CPT_EGRP_SE_IE;
 433
 434         misc->cpt_inst_w7 = vq_cmd_w3.u64;
 435
 436         return 0;
 437
 438 priv_put:
 439         rte_mempool_put(pool, priv);
 440
 441         return -ENOTSUP;
 442 }
 443
 444 static __rte_always_inline int32_t __rte_hot
 445 otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
 446                     struct cpt_request_info *req,
 447                     void *lmtline,
 448                     struct rte_crypto_op *op,
 449                     uint64_t cpt_inst_w7)
 450 {
 451         union rte_event_crypto_metadata *m_data;
 452         union cpt_inst_s inst;
 453         uint64_t lmt_status;
 454
 455         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
 456                 m_data = rte_cryptodev_sym_session_get_user_data(
 457                                                 op->sym->session);
 458                 if (m_data == NULL) {
 459                         rte_pktmbuf_free(op->sym->m_src);
 460                         rte_crypto_op_free(op);
 461                         rte_errno = EINVAL;
 462                         return -EINVAL;
 463                 }
 464         } else if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS &&
 465                    op->private_data_offset) {
 466                 m_data = (union rte_event_crypto_metadata *)
 467                          ((uint8_t *)op +
 468                           op->private_data_offset);
 469         } else {
 470                 return -EINVAL;
 471         }
 472
 473         inst.u[0] = 0;
 474         inst.s9x.res_addr = req->comp_baddr;
 475         inst.u[2] = 0;
 476         inst.u[3] = 0;
 477
 478         inst.s9x.ei0 = req->ist.ei0;
 479         inst.s9x.ei1 = req->ist.ei1;
 480         inst.s9x.ei2 = req->ist.ei2;
 481         inst.s9x.ei3 = cpt_inst_w7;
 482
 483         inst.u[2] = (((RTE_EVENT_TYPE_CRYPTODEV << 28) |
 484                       m_data->response_info.flow_id) |
 485                      ((uint64_t)m_data->response_info.sched_type << 32) |
 486                      ((uint64_t)m_data->response_info.queue_id << 34));
 487         inst.u[3] = 1 | (((uint64_t)req >> 3) << 3);
 488         req->qp = qp;
 489
 490         do {
 491                 /* Copy CPT command to LMTLINE */
 492                 memcpy(lmtline, &inst, sizeof(inst));
 493
 494                 /*
 495                  * Make sure compiler does not reorder memcpy and ldeor.
 496                  * LMTST transactions are always flushed from the write
 497                  * buffer immediately, a DMB is not required to push out
 498                  * LMTSTs.
 499                  */
 500                 rte_io_wmb();
 501                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 502         } while (lmt_status == 0);
 503
 504         return 0;
 505 }
 506
 507 static __rte_always_inline int32_t __rte_hot
 508 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 509                      struct pending_queue *pend_q,
 510                      struct cpt_request_info *req,
 511                      struct rte_crypto_op *op,
 512                      uint64_t cpt_inst_w7)
 513 {
 514         void *lmtline = qp->lmtline;
 515         union cpt_inst_s inst;
 516         uint64_t lmt_status;
 517
 518         if (qp->ca_enable)
 519                 return otx2_ca_enqueue_req(qp, req, lmtline, op, cpt_inst_w7);
 520
 521         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 522                 return -EAGAIN;
 523
 524         inst.u[0] = 0;
 525         inst.s9x.res_addr = req->comp_baddr;
 526         inst.u[2] = 0;
 527         inst.u[3] = 0;
 528
 529         inst.s9x.ei0 = req->ist.ei0;
 530         inst.s9x.ei1 = req->ist.ei1;
 531         inst.s9x.ei2 = req->ist.ei2;
 532         inst.s9x.ei3 = cpt_inst_w7;
 533
 534         req->time_out = rte_get_timer_cycles() +
 535                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 536
 537         do {
 538                 /* Copy CPT command to LMTLINE */
 539                 memcpy(lmtline, &inst, sizeof(inst));
 540
 541                 /*
 542                  * Make sure compiler does not reorder memcpy and ldeor.
 543                  * LMTST transactions are always flushed from the write
 544                  * buffer immediately, a DMB is not required to push out
 545                  * LMTSTs.
 546                  */
 547                 rte_io_wmb();
 548                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 549         } while (lmt_status == 0);
 550
 551         pend_q->req_queue[pend_q->enq_tail] = (uintptr_t)req;
 552
 553         /* We will use soft queue length here to limit requests */
 554         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 555         pend_q->pending_count += 1;
 556
 557         return 0;
 558 }
 559
 560 static __rte_always_inline int32_t __rte_hot
 561 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 562                       struct rte_crypto_op *op,
 563                       struct pending_queue *pend_q)
 564 {
 565         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 566         struct rte_crypto_asym_op *asym_op = op->asym;
 567         struct asym_op_params params = {0};
 568         struct cpt_asym_sess_misc *sess;
 569         uintptr_t *cop;
 570         void *mdata;
 571         int ret;
 572
 573         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 574                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 575                 return -ENOMEM;
 576         }
 577
 578         sess = get_asym_session_private_data(asym_op->session,
 579                                              otx2_cryptodev_driver_id);
 580
 581         /* Store IO address of the mdata to meta_buf */
 582         params.meta_buf = rte_mempool_virt2iova(mdata);
 583
 584         cop = mdata;
 585         cop[0] = (uintptr_t)mdata;
 586         cop[1] = (uintptr_t)op;
 587         cop[2] = cop[3] = 0ULL;
 588
 589         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 590         params.req->op = cop;
 591
 592         /* Adjust meta_buf to point to end of cpt_request_info structure */
 593         params.meta_buf += (4 * sizeof(uintptr_t)) +
 594                             sizeof(struct cpt_request_info);
 595         switch (sess->xfrm_type) {
 596         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 597                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 598                 if (unlikely(ret))
 599                         goto req_fail;
 600                 break;
 601         case RTE_CRYPTO_ASYM_XFORM_RSA:
 602                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 603                 if (unlikely(ret))
 604                         goto req_fail;
 605                 break;
 606         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 607                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 608                 if (unlikely(ret))
 609                         goto req_fail;
 610                 break;
 611         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 612                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 613                                     sess->ec_ctx.curveid);
 614                 if (unlikely(ret))
 615                         goto req_fail;
 616                 break;
 617         default:
 618                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 619                 ret = -EINVAL;
 620                 goto req_fail;
 621         }
 622
 623         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req, op,
 624                                    sess->cpt_inst_w7);
 625
 626         if (unlikely(ret)) {
 627                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 628                 goto req_fail;
 629         }
 630
 631         return 0;
 632
 633 req_fail:
 634         free_op_meta(mdata, minfo->pool);
 635
 636         return ret;
 637 }
 638
 639 static __rte_always_inline int __rte_hot
 640 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 641                      struct pending_queue *pend_q)
 642 {
 643         struct rte_crypto_sym_op *sym_op = op->sym;
 644         struct cpt_request_info *req;
 645         struct cpt_sess_misc *sess;
 646         uint64_t cpt_op;
 647         void *mdata;
 648         int ret;
 649
 650         sess = get_sym_session_private_data(sym_op->session,
 651                                             otx2_cryptodev_driver_id);
 652
 653         cpt_op = sess->cpt_op;
 654
 655         if (cpt_op & CPT_OP_CIPHER_MASK)
 656                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 657                                      (void **)&req);
 658         else
 659                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 660                                          (void **)&req);
 661
 662         if (unlikely(ret)) {
 663                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 664                                 op, (unsigned int)cpt_op, ret);
 665                 return ret;
 666         }
 667
 668         ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7);
 669
 670         if (unlikely(ret)) {
 671                 /* Free buffer allocated by fill params routines */
 672                 free_op_meta(mdata, qp->meta_info.pool);
 673         }
 674
 675         return ret;
 676 }
 677
 678 static __rte_always_inline int __rte_hot
 679 otx2_cpt_enqueue_sec(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 680                      struct pending_queue *pend_q)
 681 {
 682         uint32_t winsz, esn_low = 0, esn_hi = 0, seql = 0, seqh = 0;
 683         struct rte_mbuf *m_src = op->sym->m_src;
 684         struct otx2_sec_session_ipsec_lp *sess;
 685         struct otx2_ipsec_po_sa_ctl *ctl_wrd;
 686         struct otx2_ipsec_po_in_sa *sa;
 687         struct otx2_sec_session *priv;
 688         struct cpt_request_info *req;
 689         uint64_t seq_in_sa, seq = 0;
 690         uint8_t esn;
 691         int ret;
 692
 693         priv = get_sec_session_private_data(op->sym->sec_session);
 694         sess = &priv->ipsec.lp;
 695         sa = &sess->in_sa;
 696
 697         ctl_wrd = &sa->ctl;
 698         esn = ctl_wrd->esn_en;
 699         winsz = sa->replay_win_sz;
 700
 701         if (ctl_wrd->direction == OTX2_IPSEC_PO_SA_DIRECTION_OUTBOUND)
 702                 ret = process_outb_sa(op, sess, &qp->meta_info, (void **)&req);
 703         else {
 704                 if (winsz) {
 705                         esn_low = rte_be_to_cpu_32(sa->esn_low);
 706                         esn_hi = rte_be_to_cpu_32(sa->esn_hi);
 707                         seql = *rte_pktmbuf_mtod_offset(m_src, uint32_t *,
 708                                 sizeof(struct rte_ipv4_hdr) + 4);
 709                         seql = rte_be_to_cpu_32(seql);
 710
 711                         if (!esn)
 712                                 seq = (uint64_t)seql;
 713                         else {
 714                                 seqh = anti_replay_get_seqh(winsz, seql, esn_hi,
 715                                                 esn_low);
 716                                 seq = ((uint64_t)seqh << 32) | seql;
 717                         }
 718
 719                         if (unlikely(seq == 0))
 720                                 return IPSEC_ANTI_REPLAY_FAILED;
 721
 722                         ret = anti_replay_check(sa->replay, seq, winsz);
 723                         if (unlikely(ret)) {
 724                                 otx2_err("Anti replay check failed");
 725                                 return IPSEC_ANTI_REPLAY_FAILED;
 726                         }
 727                 }
 728
 729                 ret = process_inb_sa(op, sess, &qp->meta_info, (void **)&req);
 730         }
 731
 732         if (unlikely(ret)) {
 733                 otx2_err("Crypto req : op %p, ret 0x%x", op, ret);
 734                 return ret;
 735         }
 736
 737         ret = otx2_cpt_enqueue_req(qp, pend_q, req, op, sess->cpt_inst_w7);
 738
 739         if (winsz && esn) {
 740                 seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low;
 741                 if (seq > seq_in_sa) {
 742                         sa->esn_low = rte_cpu_to_be_32(seql);
 743                         sa->esn_hi = rte_cpu_to_be_32(seqh);
 744                 }
 745         }
 746
 747         return ret;
 748 }
 749
 750 static __rte_always_inline int __rte_hot
 751 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 752                               struct pending_queue *pend_q)
 753 {
 754         const int driver_id = otx2_cryptodev_driver_id;
 755         struct rte_crypto_sym_op *sym_op = op->sym;
 756         struct rte_cryptodev_sym_session *sess;
 757         int ret;
 758
 759         /* Create temporary session */
 760         sess = rte_cryptodev_sym_session_create(qp->sess_mp);
 761         if (sess == NULL)
 762                 return -ENOMEM;
 763
 764         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 765                                     qp->sess_mp_priv);
 766         if (ret)
 767                 goto sess_put;
 768
 769         sym_op->session = sess;
 770
 771         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 772
 773         if (unlikely(ret))
 774                 goto priv_put;
 775
 776         return 0;
 777
 778 priv_put:
 779         sym_session_clear(driver_id, sess);
 780 sess_put:
 781         rte_mempool_put(qp->sess_mp, sess);
 782         return ret;
 783 }
 784
 785 static uint16_t
 786 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 787 {
 788         uint16_t nb_allowed, count = 0;
 789         struct otx2_cpt_qp *qp = qptr;
 790         struct pending_queue *pend_q;
 791         struct rte_crypto_op *op;
 792         int ret;
 793
 794         pend_q = &qp->pend_q;
 795
 796         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 797         if (nb_ops > nb_allowed)
 798                 nb_ops = nb_allowed;
 799
 800         for (count = 0; count < nb_ops; count++) {
 801                 op = ops[count];
 802                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 803                         if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)
 804                                 ret = otx2_cpt_enqueue_sec(qp, op, pend_q);
 805                         else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 806                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 807                         else
 808                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 809                                                                     pend_q);
 810                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 811                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 812                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 813                         else
 814                                 break;
 815                 } else
 816                         break;
 817
 818                 if (unlikely(ret))
 819                         break;
 820         }
 821
 822         return count;
 823 }
 824
 825 static __rte_always_inline void
 826 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 827                      struct rte_crypto_rsa_xform *rsa_ctx)
 828 {
 829         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 830
 831         switch (rsa->op_type) {
 832         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 833                 rsa->cipher.length = rsa_ctx->n.length;
 834                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 835                 break;
 836         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 837                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 838                         rsa->message.length = rsa_ctx->n.length;
 839                         memcpy(rsa->message.data, req->rptr,
 840                                rsa->message.length);
 841                 } else {
 842                         /* Get length of decrypted output */
 843                         rsa->message.length = rte_cpu_to_be_16
 844                                              (*((uint16_t *)req->rptr));
 845                         /*
 846                          * Offset output data pointer by length field
 847                          * (2 bytes) and copy decrypted data.
 848                          */
 849                         memcpy(rsa->message.data, req->rptr + 2,
 850                                rsa->message.length);
 851                 }
 852                 break;
 853         case RTE_CRYPTO_ASYM_OP_SIGN:
 854                 rsa->sign.length = rsa_ctx->n.length;
 855                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 856                 break;
 857         case RTE_CRYPTO_ASYM_OP_VERIFY:
 858                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 859                         rsa->sign.length = rsa_ctx->n.length;
 860                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 861                 } else {
 862                         /* Get length of signed output */
 863                         rsa->sign.length = rte_cpu_to_be_16
 864                                           (*((uint16_t *)req->rptr));
 865                         /*
 866                          * Offset output data pointer by length field
 867                          * (2 bytes) and copy signed data.
 868                          */
 869                         memcpy(rsa->sign.data, req->rptr + 2,
 870                                rsa->sign.length);
 871                 }
 872                 if (memcmp(rsa->sign.data, rsa->message.data,
 873                            rsa->message.length)) {
 874                         CPT_LOG_DP_ERR("RSA verification failed");
 875                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 876                 }
 877                 break;
 878         default:
 879                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 880                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 881                 break;
 882         }
 883 }
 884
 885 static __rte_always_inline void
 886 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 887                                struct cpt_request_info *req,
 888                                struct cpt_asym_ec_ctx *ec)
 889 {
 890         int prime_len = ec_grp[ec->curveid].prime.length;
 891
 892         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 893                 return;
 894
 895         /* Separate out sign r and s components */
 896         memcpy(ecdsa->r.data, req->rptr, prime_len);
 897         memcpy(ecdsa->s.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8),
 898                prime_len);
 899         ecdsa->r.length = prime_len;
 900         ecdsa->s.length = prime_len;
 901 }
 902
 903 static __rte_always_inline void
 904 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 905                              struct cpt_request_info *req,
 906                              struct cpt_asym_ec_ctx *ec)
 907 {
 908         int prime_len = ec_grp[ec->curveid].prime.length;
 909
 910         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 911         memcpy(ecpm->r.y.data, req->rptr + RTE_ALIGN_CEIL(prime_len, 8),
 912                prime_len);
 913         ecpm->r.x.length = prime_len;
 914         ecpm->r.y.length = prime_len;
 915 }
 916
 917 static void
 918 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 919                            struct cpt_request_info *req)
 920 {
 921         struct rte_crypto_asym_op *op = cop->asym;
 922         struct cpt_asym_sess_misc *sess;
 923
 924         sess = get_asym_session_private_data(op->session,
 925                                              otx2_cryptodev_driver_id);
 926
 927         switch (sess->xfrm_type) {
 928         case RTE_CRYPTO_ASYM_XFORM_RSA:
 929                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 930                 break;
 931         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 932                 op->modex.result.length = sess->mod_ctx.modulus.length;
 933                 memcpy(op->modex.result.data, req->rptr,
 934                        op->modex.result.length);
 935                 break;
 936         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 937                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 938                 break;
 939         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 940                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 941                 break;
 942         default:
 943                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 944                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 945                 break;
 946         }
 947 }
 948
 949 static void
 950 otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 951 {
 952         struct cpt_request_info *req = (struct cpt_request_info *)rsp[2];
 953         vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0;
 954         struct rte_crypto_sym_op *sym_op = cop->sym;
 955         struct rte_mbuf *m = sym_op->m_src;
 956         struct rte_ipv6_hdr *ip6;
 957         struct rte_ipv4_hdr *ip;
 958         uint16_t m_len = 0;
 959         int mdata_len;
 960         char *data;
 961
 962         mdata_len = (int)rsp[3];
 963         rte_pktmbuf_trim(m, mdata_len);
 964
 965         if (word0->s.opcode.major == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 966                 data = rte_pktmbuf_mtod(m, char *);
 967
 968                 if (rsp[4] == OTX2_IPSEC_PO_TRANSPORT ||
 969                     rsp[4] == OTX2_IPSEC_PO_TUNNEL_IPV4) {
 970                         ip = (struct rte_ipv4_hdr *)(data +
 971                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 972                         m_len = rte_be_to_cpu_16(ip->total_length);
 973                 } else if (rsp[4] == OTX2_IPSEC_PO_TUNNEL_IPV6) {
 974                         ip6 = (struct rte_ipv6_hdr *)(data +
 975                                 OTX2_IPSEC_PO_INB_RPTR_HDR);
 976                         m_len = rte_be_to_cpu_16(ip6->payload_len) +
 977                                 sizeof(struct rte_ipv6_hdr);
 978                 }
 979
 980                 m->data_len = m_len;
 981                 m->pkt_len = m_len;
 982                 m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR;
 983         }
 984 }
 985
 986 static inline void
 987 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 988                               uintptr_t *rsp, uint8_t cc)
 989 {
 990         unsigned int sz;
 991
 992         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 993                 if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
 994                         if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) {
 995                                 otx2_cpt_sec_post_process(cop, rsp);
 996                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 997                         } else
 998                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 999
1000                         return;
1001                 }
1002
1003                 if (likely(cc == NO_ERR)) {
1004                         /* Verify authentication data if required */
1005                         if (unlikely(rsp[2]))
1006                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
1007                                                  rsp[3]);
1008                         else
1009                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1010                 } else {
1011                         if (cc == ERR_GC_ICV_MISCOMPARE)
1012                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
1013                         else
1014                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1015                 }
1016
1017                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
1018                         sym_session_clear(otx2_cryptodev_driver_id,
1019                                           cop->sym->session);
1020                         sz = rte_cryptodev_sym_get_existing_header_session_size(
1021                                         cop->sym->session);
1022                         memset(cop->sym->session, 0, sz);
1023                         rte_mempool_put(qp->sess_mp, cop->sym->session);
1024                         cop->sym->session = NULL;
1025                 }
1026         }
1027
1028         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
1029                 if (likely(cc == NO_ERR)) {
1030                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
1031                         /*
1032                          * Pass cpt_req_info stored in metabuf during
1033                          * enqueue.
1034                          */
1035                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
1036                         otx2_cpt_asym_post_process(cop,
1037                                         (struct cpt_request_info *)rsp);
1038                 } else
1039                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
1040         }
1041 }
1042
1043 static uint16_t
1044 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
1045 {
1046         int i, nb_pending, nb_completed;
1047         struct otx2_cpt_qp *qp = qptr;
1048         struct pending_queue *pend_q;
1049         struct cpt_request_info *req;
1050         struct rte_crypto_op *cop;
1051         uint8_t cc[nb_ops];
1052         uintptr_t *rsp;
1053         void *metabuf;
1054
1055         pend_q = &qp->pend_q;
1056
1057         nb_pending = pend_q->pending_count;
1058
1059         if (nb_ops > nb_pending)
1060                 nb_ops = nb_pending;
1061
1062         for (i = 0; i < nb_ops; i++) {
1063                 req = (struct cpt_request_info *)
1064                                 pend_q->req_queue[pend_q->deq_head];
1065
1066                 cc[i] = otx2_cpt_compcode_get(req);
1067
1068                 if (unlikely(cc[i] == ERR_REQ_PENDING))
1069                         break;
1070
1071                 ops[i] = req->op;
1072
1073                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
1074                 pend_q->pending_count -= 1;
1075         }
1076
1077         nb_completed = i;
1078
1079         for (i = 0; i < nb_completed; i++) {
1080                 rsp = (void *)ops[i];
1081
1082                 metabuf = (void *)rsp[0];
1083                 cop = (void *)rsp[1];
1084
1085                 ops[i] = cop;
1086
1087                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
1088
1089                 free_op_meta(metabuf, qp->meta_info.pool);
1090         }
1091
1092         return nb_completed;
1093 }
1094
1095 void
1096 otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)
1097 {
1098         dev->enqueue_burst = otx2_cpt_enqueue_burst;
1099         dev->dequeue_burst = otx2_cpt_dequeue_burst;
1100
1101         rte_mb();
1102 }
1103
1104 /* PMD ops */
1105
1106 static int
1107 otx2_cpt_dev_config(struct rte_cryptodev *dev,
1108                     struct rte_cryptodev_config *conf)
1109 {
1110         struct otx2_cpt_vf *vf = dev->data->dev_private;
1111         int ret;
1112
1113         if (conf->nb_queue_pairs > vf->max_queues) {
1114                 CPT_LOG_ERR("Invalid number of queue pairs requested");
1115                 return -EINVAL;
1116         }
1117
1118         dev->feature_flags &= ~conf->ff_disable;
1119
1120         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
1121                 /* Initialize shared FPM table */
1122                 ret = cpt_fpm_init(otx2_fpm_iova);
1123                 if (ret)
1124                         return ret;
1125         }
1126
1127         /* Unregister error interrupts */
1128         if (vf->err_intr_registered)
1129                 otx2_cpt_err_intr_unregister(dev);
1130
1131         /* Detach queues */
1132         if (vf->nb_queues) {
1133                 ret = otx2_cpt_queues_detach(dev);
1134                 if (ret) {
1135                         CPT_LOG_ERR("Could not detach CPT queues");
1136                         return ret;
1137                 }
1138         }
1139
1140         /* Attach queues */
1141         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
1142         if (ret) {
1143                 CPT_LOG_ERR("Could not attach CPT queues");
1144                 return -ENODEV;
1145         }
1146
1147         ret = otx2_cpt_msix_offsets_get(dev);
1148         if (ret) {
1149                 CPT_LOG_ERR("Could not get MSI-X offsets");
1150                 goto queues_detach;
1151         }
1152
1153         /* Register error interrupts */
1154         ret = otx2_cpt_err_intr_register(dev);
1155         if (ret) {
1156                 CPT_LOG_ERR("Could not register error interrupts");
1157                 goto queues_detach;
1158         }
1159
1160         ret = otx2_cpt_inline_init(dev);
1161         if (ret) {
1162                 CPT_LOG_ERR("Could not enable inline IPsec");
1163                 goto intr_unregister;
1164         }
1165
1166         otx2_cpt_set_enqdeq_fns(dev);
1167
1168         return 0;
1169
1170 intr_unregister:
1171         otx2_cpt_err_intr_unregister(dev);
1172 queues_detach:
1173         otx2_cpt_queues_detach(dev);
1174         return ret;
1175 }
1176
1177 static int
1178 otx2_cpt_dev_start(struct rte_cryptodev *dev)
1179 {
1180         RTE_SET_USED(dev);
1181
1182         CPT_PMD_INIT_FUNC_TRACE();
1183
1184         return 0;
1185 }
1186
1187 static void
1188 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
1189 {
1190         CPT_PMD_INIT_FUNC_TRACE();
1191
1192         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
1193                 cpt_fpm_clear();
1194 }
1195
1196 static int
1197 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1198 {
1199         struct otx2_cpt_vf *vf = dev->data->dev_private;
1200         int i, ret = 0;
1201
1202         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1203                 ret = otx2_cpt_queue_pair_release(dev, i);
1204                 if (ret)
1205                         return ret;
1206         }
1207
1208         /* Unregister error interrupts */
1209         if (vf->err_intr_registered)
1210                 otx2_cpt_err_intr_unregister(dev);
1211
1212         /* Detach queues */
1213         if (vf->nb_queues) {
1214                 ret = otx2_cpt_queues_detach(dev);
1215                 if (ret)
1216                         CPT_LOG_ERR("Could not detach CPT queues");
1217         }
1218
1219         return ret;
1220 }
1221
1222 static void
1223 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1224                       struct rte_cryptodev_info *info)
1225 {
1226         struct otx2_cpt_vf *vf = dev->data->dev_private;
1227
1228         if (info != NULL) {
1229                 info->max_nb_queue_pairs = vf->max_queues;
1230                 info->feature_flags = dev->feature_flags;
1231                 info->capabilities = otx2_cpt_capabilities_get();
1232                 info->sym.max_nb_sessions = 0;
1233                 info->driver_id = otx2_cryptodev_driver_id;
1234                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1235                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1236         }
1237 }
1238
1239 static int
1240 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1241                           const struct rte_cryptodev_qp_conf *conf,
1242                           int socket_id __rte_unused)
1243 {
1244         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1245         struct rte_pci_device *pci_dev;
1246         struct otx2_cpt_qp *qp;
1247
1248         CPT_PMD_INIT_FUNC_TRACE();
1249
1250         if (dev->data->queue_pairs[qp_id] != NULL)
1251                 otx2_cpt_queue_pair_release(dev, qp_id);
1252
1253         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1254                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1255                             conf->nb_descriptors);
1256                 return -EINVAL;
1257         }
1258
1259         pci_dev = RTE_DEV_TO_PCI(dev->device);
1260
1261         if (pci_dev->mem_resource[2].addr == NULL) {
1262                 CPT_LOG_ERR("Invalid PCI mem address");
1263                 return -EIO;
1264         }
1265
1266         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1267         if (qp == NULL) {
1268                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1269                 return -ENOMEM;
1270         }
1271
1272         qp->sess_mp = conf->mp_session;
1273         qp->sess_mp_priv = conf->mp_session_private;
1274         dev->data->queue_pairs[qp_id] = qp;
1275
1276         return 0;
1277 }
1278
1279 static int
1280 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1281 {
1282         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1283         int ret;
1284
1285         CPT_PMD_INIT_FUNC_TRACE();
1286
1287         if (qp == NULL)
1288                 return -EINVAL;
1289
1290         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1291
1292         ret = otx2_cpt_qp_destroy(dev, qp);
1293         if (ret) {
1294                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1295                 return ret;
1296         }
1297
1298         dev->data->queue_pairs[qp_id] = NULL;
1299
1300         return 0;
1301 }
1302
1303 static unsigned int
1304 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1305 {
1306         return cpt_get_session_size();
1307 }
1308
1309 static int
1310 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1311                                struct rte_crypto_sym_xform *xform,
1312                                struct rte_cryptodev_sym_session *sess,
1313                                struct rte_mempool *pool)
1314 {
1315         CPT_PMD_INIT_FUNC_TRACE();
1316
1317         return sym_session_configure(dev->driver_id, xform, sess, pool);
1318 }
1319
1320 static void
1321 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1322                            struct rte_cryptodev_sym_session *sess)
1323 {
1324         CPT_PMD_INIT_FUNC_TRACE();
1325
1326         return sym_session_clear(dev->driver_id, sess);
1327 }
1328
1329 static unsigned int
1330 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1331 {
1332         return sizeof(struct cpt_asym_sess_misc);
1333 }
1334
1335 static int
1336 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1337                           struct rte_crypto_asym_xform *xform,
1338                           struct rte_cryptodev_asym_session *sess,
1339                           struct rte_mempool *pool)
1340 {
1341         struct cpt_asym_sess_misc *priv;
1342         vq_cmd_word3_t vq_cmd_w3;
1343         int ret;
1344
1345         CPT_PMD_INIT_FUNC_TRACE();
1346
1347         if (rte_mempool_get(pool, (void **)&priv)) {
1348                 CPT_LOG_ERR("Could not allocate session_private_data");
1349                 return -ENOMEM;
1350         }
1351
1352         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1353
1354         ret = cpt_fill_asym_session_parameters(priv, xform);
1355         if (ret) {
1356                 CPT_LOG_ERR("Could not configure session parameters");
1357
1358                 /* Return session to mempool */
1359                 rte_mempool_put(pool, priv);
1360                 return ret;
1361         }
1362
1363         vq_cmd_w3.u64 = 0;
1364         vq_cmd_w3.s.grp = OTX2_CPT_EGRP_AE;
1365         priv->cpt_inst_w7 = vq_cmd_w3.u64;
1366
1367         set_asym_session_private_data(sess, dev->driver_id, priv);
1368
1369         return 0;
1370 }
1371
1372 static void
1373 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1374                             struct rte_cryptodev_asym_session *sess)
1375 {
1376         struct cpt_asym_sess_misc *priv;
1377         struct rte_mempool *sess_mp;
1378
1379         CPT_PMD_INIT_FUNC_TRACE();
1380
1381         priv = get_asym_session_private_data(sess, dev->driver_id);
1382         if (priv == NULL)
1383                 return;
1384
1385         /* Free resources allocated in session_cfg */
1386         cpt_free_asym_session_parameters(priv);
1387
1388         /* Reset and free object back to pool */
1389         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1390         sess_mp = rte_mempool_from_obj(priv);
1391         set_asym_session_private_data(sess, dev->driver_id, NULL);
1392         rte_mempool_put(sess_mp, priv);
1393 }
1394
1395 struct rte_cryptodev_ops otx2_cpt_ops = {
1396         /* Device control ops */
1397         .dev_configure = otx2_cpt_dev_config,
1398         .dev_start = otx2_cpt_dev_start,
1399         .dev_stop = otx2_cpt_dev_stop,
1400         .dev_close = otx2_cpt_dev_close,
1401         .dev_infos_get = otx2_cpt_dev_info_get,
1402
1403         .stats_get = NULL,
1404         .stats_reset = NULL,
1405         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1406         .queue_pair_release = otx2_cpt_queue_pair_release,
1407
1408         /* Symmetric crypto ops */
1409         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1410         .sym_session_configure = otx2_cpt_sym_session_configure,
1411         .sym_session_clear = otx2_cpt_sym_session_clear,
1412
1413         /* Asymmetric crypto ops */
1414         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1415         .asym_session_configure = otx2_cpt_asym_session_cfg,
1416         .asym_session_clear = otx2_cpt_asym_session_clear,
1417
1418 };