drivers/crypto/octeontx2/otx2_cryptodev_ops.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (C) 2019 Marvell International Ltd.
   3  */
   4
   5 #include <unistd.h>
   6
   7 #include <rte_cryptodev_pmd.h>
   8 #include <rte_errno.h>
   9 #include <rte_ethdev.h>
  10
  11 #include "otx2_cryptodev.h"
  12 #include "otx2_cryptodev_capabilities.h"
  13 #include "otx2_cryptodev_hw_access.h"
  14 #include "otx2_cryptodev_mbox.h"
  15 #include "otx2_cryptodev_ops.h"
  16 #include "otx2_mbox.h"
  17 #include "otx2_sec_idev.h"
  18
  19 #include "cpt_hw_types.h"
  20 #include "cpt_pmd_logs.h"
  21 #include "cpt_pmd_ops_helper.h"
  22 #include "cpt_ucode.h"
  23 #include "cpt_ucode_asym.h"
  24
  25 #define METABUF_POOL_CACHE_SIZE 512
  26
  27 static uint64_t otx2_fpm_iova[CPT_EC_ID_PMAX];
  28
  29 /* Forward declarations */
  30
  31 static int
  32 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
  33
  34 static void
  35 qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)
  36 {
  37         snprintf(name, size, "otx2_cpt_lf_mem_%u:%u", dev_id, qp_id);
  38 }
  39
  40 static int
  41 otx2_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
  42                                 struct otx2_cpt_qp *qp, uint8_t qp_id,
  43                                 int nb_elements)
  44 {
  45         char mempool_name[RTE_MEMPOOL_NAMESIZE];
  46         struct cpt_qp_meta_info *meta_info;
  47         struct rte_mempool *pool;
  48         int ret, max_mlen;
  49         int asym_mlen = 0;
  50         int lb_mlen = 0;
  51         int sg_mlen = 0;
  52
  53         if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
  54
  55                 /* Get meta len for scatter gather mode */
  56                 sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
  57
  58                 /* Extra 32B saved for future considerations */
  59                 sg_mlen += 4 * sizeof(uint64_t);
  60
  61                 /* Get meta len for linear buffer (direct) mode */
  62                 lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
  63
  64                 /* Extra 32B saved for future considerations */
  65                 lb_mlen += 4 * sizeof(uint64_t);
  66         }
  67
  68         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
  69
  70                 /* Get meta len required for asymmetric operations */
  71                 asym_mlen = cpt_pmd_ops_helper_asym_get_mlen();
  72         }
  73
  74         /*
  75          * Check max requirement for meta buffer to
  76          * support crypto op of any type (sym/asym).
  77          */
  78         max_mlen = RTE_MAX(RTE_MAX(lb_mlen, sg_mlen), asym_mlen);
  79
  80         /* Allocate mempool */
  81
  82         snprintf(mempool_name, RTE_MEMPOOL_NAMESIZE, "otx2_cpt_mb_%u:%u",
  83                  dev->data->dev_id, qp_id);
  84
  85         pool = rte_mempool_create_empty(mempool_name, nb_elements, max_mlen,
  86                                         METABUF_POOL_CACHE_SIZE, 0,
  87                                         rte_socket_id(), 0);
  88
  89         if (pool == NULL) {
  90                 CPT_LOG_ERR("Could not create mempool for metabuf");
  91                 return rte_errno;
  92         }
  93
  94         ret = rte_mempool_set_ops_byname(pool, RTE_MBUF_DEFAULT_MEMPOOL_OPS,
  95                                          NULL);
  96         if (ret) {
  97                 CPT_LOG_ERR("Could not set mempool ops");
  98                 goto mempool_free;
  99         }
 100
 101         ret = rte_mempool_populate_default(pool);
 102         if (ret <= 0) {
 103                 CPT_LOG_ERR("Could not populate metabuf pool");
 104                 goto mempool_free;
 105         }
 106
 107         meta_info = &qp->meta_info;
 108
 109         meta_info->pool = pool;
 110         meta_info->lb_mlen = lb_mlen;
 111         meta_info->sg_mlen = sg_mlen;
 112
 113         return 0;
 114
 115 mempool_free:
 116         rte_mempool_free(pool);
 117         return ret;
 118 }
 119
 120 static void
 121 otx2_cpt_metabuf_mempool_destroy(struct otx2_cpt_qp *qp)
 122 {
 123         struct cpt_qp_meta_info *meta_info = &qp->meta_info;
 124
 125         rte_mempool_free(meta_info->pool);
 126
 127         meta_info->pool = NULL;
 128         meta_info->lb_mlen = 0;
 129         meta_info->sg_mlen = 0;
 130 }
 131
 132 static int
 133 otx2_cpt_qp_inline_cfg(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 134 {
 135         static rte_atomic16_t port_offset = RTE_ATOMIC16_INIT(-1);
 136         uint16_t port_id, nb_ethport = rte_eth_dev_count_avail();
 137         int i, ret;
 138
 139         for (i = 0; i < nb_ethport; i++) {
 140                 port_id = rte_atomic16_add_return(&port_offset, 1) % nb_ethport;
 141                 if (otx2_eth_dev_is_sec_capable(&rte_eth_devices[port_id]))
 142                         break;
 143         }
 144
 145         if (i >= nb_ethport)
 146                 return 0;
 147
 148         ret = otx2_cpt_qp_ethdev_bind(dev, qp, port_id);
 149         if (ret)
 150                 return ret;
 151
 152         /* Publish inline Tx QP to eth dev security */
 153         ret = otx2_sec_idev_tx_cpt_qp_add(port_id, qp);
 154         if (ret)
 155                 return ret;
 156
 157         return 0;
 158 }
 159
 160 static struct otx2_cpt_qp *
 161 otx2_cpt_qp_create(const struct rte_cryptodev *dev, uint16_t qp_id,
 162                    uint8_t group)
 163 {
 164         struct otx2_cpt_vf *vf = dev->data->dev_private;
 165         uint64_t pg_sz = sysconf(_SC_PAGESIZE);
 166         const struct rte_memzone *lf_mem;
 167         uint32_t len, iq_len, size_div40;
 168         char name[RTE_MEMZONE_NAMESIZE];
 169         uint64_t used_len, iova;
 170         struct otx2_cpt_qp *qp;
 171         uint64_t lmtline;
 172         uint8_t *va;
 173         int ret;
 174
 175         /* Allocate queue pair */
 176         qp = rte_zmalloc_socket("OCTEON TX2 Crypto PMD Queue Pair", sizeof(*qp),
 177                                 OTX2_ALIGN, 0);
 178         if (qp == NULL) {
 179                 CPT_LOG_ERR("Could not allocate queue pair");
 180                 return NULL;
 181         }
 182
 183         iq_len = OTX2_CPT_IQ_LEN;
 184
 185         /*
 186          * Queue size must be a multiple of 40 and effective queue size to
 187          * software is (size_div40 - 1) * 40
 188          */
 189         size_div40 = (iq_len + 40 - 1) / 40 + 1;
 190
 191         /* For pending queue */
 192         len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 193
 194         /* Space for instruction group memory */
 195         len += size_div40 * 16;
 196
 197         /* So that instruction queues start as pg size aligned */
 198         len = RTE_ALIGN(len, pg_sz);
 199
 200         /* For instruction queues */
 201         len += OTX2_CPT_IQ_LEN * sizeof(union cpt_inst_s);
 202
 203         /* Wastage after instruction queues */
 204         len = RTE_ALIGN(len, pg_sz);
 205
 206         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 207                             qp_id);
 208
 209         lf_mem = rte_memzone_reserve_aligned(name, len, vf->otx2_dev.node,
 210                         RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB,
 211                         RTE_CACHE_LINE_SIZE);
 212         if (lf_mem == NULL) {
 213                 CPT_LOG_ERR("Could not allocate reserved memzone");
 214                 goto qp_free;
 215         }
 216
 217         va = lf_mem->addr;
 218         iova = lf_mem->iova;
 219
 220         memset(va, 0, len);
 221
 222         ret = otx2_cpt_metabuf_mempool_create(dev, qp, qp_id, iq_len);
 223         if (ret) {
 224                 CPT_LOG_ERR("Could not create mempool for metabuf");
 225                 goto lf_mem_free;
 226         }
 227
 228         /* Initialize pending queue */
 229         qp->pend_q.rid_queue = (struct rid *)va;
 230         qp->pend_q.enq_tail = 0;
 231         qp->pend_q.deq_head = 0;
 232         qp->pend_q.pending_count = 0;
 233
 234         used_len = iq_len * RTE_ALIGN(sizeof(struct rid), 8);
 235         used_len += size_div40 * 16;
 236         used_len = RTE_ALIGN(used_len, pg_sz);
 237         iova += used_len;
 238
 239         qp->iq_dma_addr = iova;
 240         qp->id = qp_id;
 241         qp->base = OTX2_CPT_LF_BAR2(vf, qp_id);
 242
 243         lmtline = vf->otx2_dev.bar2 +
 244                   (RVU_BLOCK_ADDR_LMT << 20 | qp_id << 12) +
 245                   OTX2_LMT_LF_LMTLINE(0);
 246
 247         qp->lmtline = (void *)lmtline;
 248
 249         qp->lf_nq_reg = qp->base + OTX2_CPT_LF_NQ(0);
 250
 251         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 252         if (ret && (ret != -ENOENT)) {
 253                 CPT_LOG_ERR("Could not delete inline configuration");
 254                 goto mempool_destroy;
 255         }
 256
 257         otx2_cpt_iq_disable(qp);
 258
 259         ret = otx2_cpt_qp_inline_cfg(dev, qp);
 260         if (ret) {
 261                 CPT_LOG_ERR("Could not configure queue for inline IPsec");
 262                 goto mempool_destroy;
 263         }
 264
 265         ret = otx2_cpt_iq_enable(dev, qp, group, OTX2_CPT_QUEUE_HI_PRIO,
 266                                  size_div40);
 267         if (ret) {
 268                 CPT_LOG_ERR("Could not enable instruction queue");
 269                 goto mempool_destroy;
 270         }
 271
 272         return qp;
 273
 274 mempool_destroy:
 275         otx2_cpt_metabuf_mempool_destroy(qp);
 276 lf_mem_free:
 277         rte_memzone_free(lf_mem);
 278 qp_free:
 279         rte_free(qp);
 280         return NULL;
 281 }
 282
 283 static int
 284 otx2_cpt_qp_destroy(const struct rte_cryptodev *dev, struct otx2_cpt_qp *qp)
 285 {
 286         const struct rte_memzone *lf_mem;
 287         char name[RTE_MEMZONE_NAMESIZE];
 288         int ret;
 289
 290         ret = otx2_sec_idev_tx_cpt_qp_remove(qp);
 291         if (ret && (ret != -ENOENT)) {
 292                 CPT_LOG_ERR("Could not delete inline configuration");
 293                 return ret;
 294         }
 295
 296         otx2_cpt_iq_disable(qp);
 297
 298         otx2_cpt_metabuf_mempool_destroy(qp);
 299
 300         qp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id,
 301                             qp->id);
 302
 303         lf_mem = rte_memzone_lookup(name);
 304
 305         ret = rte_memzone_free(lf_mem);
 306         if (ret)
 307                 return ret;
 308
 309         rte_free(qp);
 310
 311         return 0;
 312 }
 313
 314 static int
 315 sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 316                       struct rte_cryptodev_sym_session *sess,
 317                       struct rte_mempool *pool)
 318 {
 319         struct cpt_sess_misc *misc;
 320         void *priv;
 321         int ret;
 322
 323         if (unlikely(cpt_is_algo_supported(xform))) {
 324                 CPT_LOG_ERR("Crypto xform not supported");
 325                 return -ENOTSUP;
 326         }
 327
 328         if (unlikely(rte_mempool_get(pool, &priv))) {
 329                 CPT_LOG_ERR("Could not allocate session private data");
 330                 return -ENOMEM;
 331         }
 332
 333         misc = priv;
 334
 335         for ( ; xform != NULL; xform = xform->next) {
 336                 switch (xform->type) {
 337                 case RTE_CRYPTO_SYM_XFORM_AEAD:
 338                         ret = fill_sess_aead(xform, misc);
 339                         break;
 340                 case RTE_CRYPTO_SYM_XFORM_CIPHER:
 341                         ret = fill_sess_cipher(xform, misc);
 342                         break;
 343                 case RTE_CRYPTO_SYM_XFORM_AUTH:
 344                         if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
 345                                 ret = fill_sess_gmac(xform, misc);
 346                         else
 347                                 ret = fill_sess_auth(xform, misc);
 348                         break;
 349                 default:
 350                         ret = -1;
 351                 }
 352
 353                 if (ret)
 354                         goto priv_put;
 355         }
 356
 357         set_sym_session_private_data(sess, driver_id, misc);
 358
 359         misc->ctx_dma_addr = rte_mempool_virt2iova(misc) +
 360                              sizeof(struct cpt_sess_misc);
 361
 362         /*
 363          * IE engines support IPsec operations
 364          * SE engines support IPsec operations and Air-Crypto operations
 365          */
 366         if (misc->zsk_flag)
 367                 misc->egrp = OTX2_CPT_EGRP_SE;
 368         else
 369                 misc->egrp = OTX2_CPT_EGRP_SE_IE;
 370
 371         return 0;
 372
 373 priv_put:
 374         rte_mempool_put(pool, priv);
 375
 376         CPT_LOG_ERR("Crypto xform not supported");
 377         return -ENOTSUP;
 378 }
 379
 380 static void
 381 sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
 382 {
 383         void *priv = get_sym_session_private_data(sess, driver_id);
 384         struct rte_mempool *pool;
 385
 386         if (priv == NULL)
 387                 return;
 388
 389         memset(priv, 0, cpt_get_session_size());
 390
 391         pool = rte_mempool_from_obj(priv);
 392
 393         set_sym_session_private_data(sess, driver_id, NULL);
 394
 395         rte_mempool_put(pool, priv);
 396 }
 397
 398 static __rte_always_inline int32_t __rte_hot
 399 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 400                      struct pending_queue *pend_q,
 401                      struct cpt_request_info *req)
 402 {
 403         void *lmtline = qp->lmtline;
 404         union cpt_inst_s inst;
 405         uint64_t lmt_status;
 406
 407         if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 408                 return -EAGAIN;
 409
 410         inst.u[0] = 0;
 411         inst.s9x.res_addr = req->comp_baddr;
 412         inst.u[2] = 0;
 413         inst.u[3] = 0;
 414
 415         inst.s9x.ei0 = req->ist.ei0;
 416         inst.s9x.ei1 = req->ist.ei1;
 417         inst.s9x.ei2 = req->ist.ei2;
 418         inst.s9x.ei3 = req->ist.ei3;
 419
 420         req->time_out = rte_get_timer_cycles() +
 421                         DEFAULT_COMMAND_TIMEOUT * rte_get_timer_hz();
 422
 423         do {
 424                 /* Copy CPT command to LMTLINE */
 425                 memcpy(lmtline, &inst, sizeof(inst));
 426
 427                 /*
 428                  * Make sure compiler does not reorder memcpy and ldeor.
 429                  * LMTST transactions are always flushed from the write
 430                  * buffer immediately, a DMB is not required to push out
 431                  * LMTSTs.
 432                  */
 433                 rte_cio_wmb();
 434                 lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
 435         } while (lmt_status == 0);
 436
 437         pend_q->rid_queue[pend_q->enq_tail].rid = (uintptr_t)req;
 438
 439         /* We will use soft queue length here to limit requests */
 440         MOD_INC(pend_q->enq_tail, OTX2_CPT_DEFAULT_CMD_QLEN);
 441         pend_q->pending_count += 1;
 442
 443         return 0;
 444 }
 445
 446 static __rte_always_inline int32_t __rte_hot
 447 otx2_cpt_enqueue_asym(struct otx2_cpt_qp *qp,
 448                       struct rte_crypto_op *op,
 449                       struct pending_queue *pend_q)
 450 {
 451         struct cpt_qp_meta_info *minfo = &qp->meta_info;
 452         struct rte_crypto_asym_op *asym_op = op->asym;
 453         struct asym_op_params params = {0};
 454         struct cpt_asym_sess_misc *sess;
 455         vq_cmd_word3_t *w3;
 456         uintptr_t *cop;
 457         void *mdata;
 458         int ret;
 459
 460         if (unlikely(rte_mempool_get(minfo->pool, &mdata) < 0)) {
 461                 CPT_LOG_ERR("Could not allocate meta buffer for request");
 462                 return -ENOMEM;
 463         }
 464
 465         sess = get_asym_session_private_data(asym_op->session,
 466                                              otx2_cryptodev_driver_id);
 467
 468         /* Store IO address of the mdata to meta_buf */
 469         params.meta_buf = rte_mempool_virt2iova(mdata);
 470
 471         cop = mdata;
 472         cop[0] = (uintptr_t)mdata;
 473         cop[1] = (uintptr_t)op;
 474         cop[2] = cop[3] = 0ULL;
 475
 476         params.req = RTE_PTR_ADD(cop, 4 * sizeof(uintptr_t));
 477         params.req->op = cop;
 478
 479         /* Adjust meta_buf to point to end of cpt_request_info structure */
 480         params.meta_buf += (4 * sizeof(uintptr_t)) +
 481                             sizeof(struct cpt_request_info);
 482         switch (sess->xfrm_type) {
 483         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 484                 ret = cpt_modex_prep(&params, &sess->mod_ctx);
 485                 if (unlikely(ret))
 486                         goto req_fail;
 487                 break;
 488         case RTE_CRYPTO_ASYM_XFORM_RSA:
 489                 ret = cpt_enqueue_rsa_op(op, &params, sess);
 490                 if (unlikely(ret))
 491                         goto req_fail;
 492                 break;
 493         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 494                 ret = cpt_enqueue_ecdsa_op(op, &params, sess, otx2_fpm_iova);
 495                 if (unlikely(ret))
 496                         goto req_fail;
 497                 break;
 498         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 499                 ret = cpt_ecpm_prep(&asym_op->ecpm, &params,
 500                                     sess->ec_ctx.curveid);
 501                 if (unlikely(ret))
 502                         goto req_fail;
 503                 break;
 504         default:
 505                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 506                 ret = -EINVAL;
 507                 goto req_fail;
 508         }
 509
 510         /* Set engine group of AE */
 511         w3 = (vq_cmd_word3_t *)&params.req->ist.ei3;
 512         w3->s.grp = OTX2_CPT_EGRP_AE;
 513
 514         ret = otx2_cpt_enqueue_req(qp, pend_q, params.req);
 515
 516         if (unlikely(ret)) {
 517                 CPT_LOG_DP_ERR("Could not enqueue crypto req");
 518                 goto req_fail;
 519         }
 520
 521         return 0;
 522
 523 req_fail:
 524         free_op_meta(mdata, minfo->pool);
 525
 526         return ret;
 527 }
 528
 529 static __rte_always_inline int __rte_hot
 530 otx2_cpt_enqueue_sym(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 531                      struct pending_queue *pend_q)
 532 {
 533         struct rte_crypto_sym_op *sym_op = op->sym;
 534         struct cpt_request_info *req;
 535         struct cpt_sess_misc *sess;
 536         vq_cmd_word3_t *w3;
 537         uint64_t cpt_op;
 538         void *mdata;
 539         int ret;
 540
 541         sess = get_sym_session_private_data(sym_op->session,
 542                                             otx2_cryptodev_driver_id);
 543
 544         cpt_op = sess->cpt_op;
 545
 546         if (cpt_op & CPT_OP_CIPHER_MASK)
 547                 ret = fill_fc_params(op, sess, &qp->meta_info, &mdata,
 548                                      (void **)&req);
 549         else
 550                 ret = fill_digest_params(op, sess, &qp->meta_info, &mdata,
 551                                          (void **)&req);
 552
 553         if (unlikely(ret)) {
 554                 CPT_LOG_DP_ERR("Crypto req : op %p, cpt_op 0x%x ret 0x%x",
 555                                 op, (unsigned int)cpt_op, ret);
 556                 return ret;
 557         }
 558
 559         w3 = ((vq_cmd_word3_t *)(&req->ist.ei3));
 560         w3->s.grp = sess->egrp;
 561
 562         ret = otx2_cpt_enqueue_req(qp, pend_q, req);
 563
 564         if (unlikely(ret)) {
 565                 /* Free buffer allocated by fill params routines */
 566                 free_op_meta(mdata, qp->meta_info.pool);
 567         }
 568
 569         return ret;
 570 }
 571
 572 static __rte_always_inline int __rte_hot
 573 otx2_cpt_enqueue_sym_sessless(struct otx2_cpt_qp *qp, struct rte_crypto_op *op,
 574                               struct pending_queue *pend_q)
 575 {
 576         const int driver_id = otx2_cryptodev_driver_id;
 577         struct rte_crypto_sym_op *sym_op = op->sym;
 578         struct rte_cryptodev_sym_session *sess;
 579         int ret;
 580
 581         /* Create temporary session */
 582
 583         if (rte_mempool_get(qp->sess_mp, (void **)&sess))
 584                 return -ENOMEM;
 585
 586         ret = sym_session_configure(driver_id, sym_op->xform, sess,
 587                                     qp->sess_mp_priv);
 588         if (ret)
 589                 goto sess_put;
 590
 591         sym_op->session = sess;
 592
 593         ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 594
 595         if (unlikely(ret))
 596                 goto priv_put;
 597
 598         return 0;
 599
 600 priv_put:
 601         sym_session_clear(driver_id, sess);
 602 sess_put:
 603         rte_mempool_put(qp->sess_mp, sess);
 604         return ret;
 605 }
 606
 607 static uint16_t
 608 otx2_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 609 {
 610         uint16_t nb_allowed, count = 0;
 611         struct otx2_cpt_qp *qp = qptr;
 612         struct pending_queue *pend_q;
 613         struct rte_crypto_op *op;
 614         int ret;
 615
 616         pend_q = &qp->pend_q;
 617
 618         nb_allowed = OTX2_CPT_DEFAULT_CMD_QLEN - pend_q->pending_count;
 619         if (nb_ops > nb_allowed)
 620                 nb_ops = nb_allowed;
 621
 622         for (count = 0; count < nb_ops; count++) {
 623                 op = ops[count];
 624                 if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 625                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 626                                 ret = otx2_cpt_enqueue_sym(qp, op, pend_q);
 627                         else
 628                                 ret = otx2_cpt_enqueue_sym_sessless(qp, op,
 629                                                                     pend_q);
 630                 } else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 631                         if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)
 632                                 ret = otx2_cpt_enqueue_asym(qp, op, pend_q);
 633                         else
 634                                 break;
 635                 } else
 636                         break;
 637
 638                 if (unlikely(ret))
 639                         break;
 640         }
 641
 642         return count;
 643 }
 644
 645 static __rte_always_inline void
 646 otx2_cpt_asym_rsa_op(struct rte_crypto_op *cop, struct cpt_request_info *req,
 647                      struct rte_crypto_rsa_xform *rsa_ctx)
 648 {
 649         struct rte_crypto_rsa_op_param *rsa = &cop->asym->rsa;
 650
 651         switch (rsa->op_type) {
 652         case RTE_CRYPTO_ASYM_OP_ENCRYPT:
 653                 rsa->cipher.length = rsa_ctx->n.length;
 654                 memcpy(rsa->cipher.data, req->rptr, rsa->cipher.length);
 655                 break;
 656         case RTE_CRYPTO_ASYM_OP_DECRYPT:
 657                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 658                         rsa->message.length = rsa_ctx->n.length;
 659                         memcpy(rsa->message.data, req->rptr,
 660                                rsa->message.length);
 661                 } else {
 662                         /* Get length of decrypted output */
 663                         rsa->message.length = rte_cpu_to_be_16
 664                                              (*((uint16_t *)req->rptr));
 665                         /*
 666                          * Offset output data pointer by length field
 667                          * (2 bytes) and copy decrypted data.
 668                          */
 669                         memcpy(rsa->message.data, req->rptr + 2,
 670                                rsa->message.length);
 671                 }
 672                 break;
 673         case RTE_CRYPTO_ASYM_OP_SIGN:
 674                 rsa->sign.length = rsa_ctx->n.length;
 675                 memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 676                 break;
 677         case RTE_CRYPTO_ASYM_OP_VERIFY:
 678                 if (rsa->pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 679                         rsa->sign.length = rsa_ctx->n.length;
 680                         memcpy(rsa->sign.data, req->rptr, rsa->sign.length);
 681                 } else {
 682                         /* Get length of signed output */
 683                         rsa->sign.length = rte_cpu_to_be_16
 684                                           (*((uint16_t *)req->rptr));
 685                         /*
 686                          * Offset output data pointer by length field
 687                          * (2 bytes) and copy signed data.
 688                          */
 689                         memcpy(rsa->sign.data, req->rptr + 2,
 690                                rsa->sign.length);
 691                 }
 692                 if (memcmp(rsa->sign.data, rsa->message.data,
 693                            rsa->message.length)) {
 694                         CPT_LOG_DP_ERR("RSA verification failed");
 695                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 696                 }
 697                 break;
 698         default:
 699                 CPT_LOG_DP_DEBUG("Invalid RSA operation type");
 700                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 701                 break;
 702         }
 703 }
 704
 705 static __rte_always_inline void
 706 otx2_cpt_asym_dequeue_ecdsa_op(struct rte_crypto_ecdsa_op_param *ecdsa,
 707                                struct cpt_request_info *req,
 708                                struct cpt_asym_ec_ctx *ec)
 709 {
 710         int prime_len = ec_grp[ec->curveid].prime.length;
 711
 712         if (ecdsa->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)
 713                 return;
 714
 715         /* Separate out sign r and s components */
 716         memcpy(ecdsa->r.data, req->rptr, prime_len);
 717         memcpy(ecdsa->s.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 718         ecdsa->r.length = prime_len;
 719         ecdsa->s.length = prime_len;
 720 }
 721
 722 static __rte_always_inline void
 723 otx2_cpt_asym_dequeue_ecpm_op(struct rte_crypto_ecpm_op_param *ecpm,
 724                              struct cpt_request_info *req,
 725                              struct cpt_asym_ec_ctx *ec)
 726 {
 727         int prime_len = ec_grp[ec->curveid].prime.length;
 728
 729         memcpy(ecpm->r.x.data, req->rptr, prime_len);
 730         memcpy(ecpm->r.y.data, req->rptr + ROUNDUP8(prime_len), prime_len);
 731         ecpm->r.x.length = prime_len;
 732         ecpm->r.y.length = prime_len;
 733 }
 734
 735 static void
 736 otx2_cpt_asym_post_process(struct rte_crypto_op *cop,
 737                            struct cpt_request_info *req)
 738 {
 739         struct rte_crypto_asym_op *op = cop->asym;
 740         struct cpt_asym_sess_misc *sess;
 741
 742         sess = get_asym_session_private_data(op->session,
 743                                              otx2_cryptodev_driver_id);
 744
 745         switch (sess->xfrm_type) {
 746         case RTE_CRYPTO_ASYM_XFORM_RSA:
 747                 otx2_cpt_asym_rsa_op(cop, req, &sess->rsa_ctx);
 748                 break;
 749         case RTE_CRYPTO_ASYM_XFORM_MODEX:
 750                 op->modex.result.length = sess->mod_ctx.modulus.length;
 751                 memcpy(op->modex.result.data, req->rptr,
 752                        op->modex.result.length);
 753                 break;
 754         case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 755                 otx2_cpt_asym_dequeue_ecdsa_op(&op->ecdsa, req, &sess->ec_ctx);
 756                 break;
 757         case RTE_CRYPTO_ASYM_XFORM_ECPM:
 758                 otx2_cpt_asym_dequeue_ecpm_op(&op->ecpm, req, &sess->ec_ctx);
 759                 break;
 760         default:
 761                 CPT_LOG_DP_DEBUG("Invalid crypto xform type");
 762                 cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 763                 break;
 764         }
 765 }
 766
 767 static inline void
 768 otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 769                               uintptr_t *rsp, uint8_t cc)
 770 {
 771         if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
 772                 if (likely(cc == NO_ERR)) {
 773                         /* Verify authentication data if required */
 774                         if (unlikely(rsp[2]))
 775                                 compl_auth_verify(cop, (uint8_t *)rsp[2],
 776                                                  rsp[3]);
 777                         else
 778                                 cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 779                 } else {
 780                         if (cc == ERR_GC_ICV_MISCOMPARE)
 781                                 cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 782                         else
 783                                 cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 784                 }
 785
 786                 if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 787                         sym_session_clear(otx2_cryptodev_driver_id,
 788                                           cop->sym->session);
 789                         rte_mempool_put(qp->sess_mp, cop->sym->session);
 790                         cop->sym->session = NULL;
 791                 }
 792         }
 793
 794         if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
 795                 if (likely(cc == NO_ERR)) {
 796                         cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 797                         /*
 798                          * Pass cpt_req_info stored in metabuf during
 799                          * enqueue.
 800                          */
 801                         rsp = RTE_PTR_ADD(rsp, 4 * sizeof(uintptr_t));
 802                         otx2_cpt_asym_post_process(cop,
 803                                         (struct cpt_request_info *)rsp);
 804                 } else
 805                         cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
 806         }
 807 }
 808
 809 static __rte_always_inline uint8_t
 810 otx2_cpt_compcode_get(struct cpt_request_info *req)
 811 {
 812         volatile struct cpt_res_s_9s *res;
 813         uint8_t ret;
 814
 815         res = (volatile struct cpt_res_s_9s *)req->completion_addr;
 816
 817         if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
 818                 if (rte_get_timer_cycles() < req->time_out)
 819                         return ERR_REQ_PENDING;
 820
 821                 CPT_LOG_DP_ERR("Request timed out");
 822                 return ERR_REQ_TIMEOUT;
 823         }
 824
 825         if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
 826                 ret = NO_ERR;
 827                 if (unlikely(res->uc_compcode)) {
 828                         ret = res->uc_compcode;
 829                         CPT_LOG_DP_DEBUG("Request failed with microcode error");
 830                         CPT_LOG_DP_DEBUG("MC completion code 0x%x",
 831                                          res->uc_compcode);
 832                 }
 833         } else {
 834                 CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
 835
 836                 ret = res->compcode;
 837                 switch (res->compcode) {
 838                 case CPT_9X_COMP_E_INSTERR:
 839                         CPT_LOG_DP_ERR("Request failed with instruction error");
 840                         break;
 841                 case CPT_9X_COMP_E_FAULT:
 842                         CPT_LOG_DP_ERR("Request failed with DMA fault");
 843                         break;
 844                 case CPT_9X_COMP_E_HWERR:
 845                         CPT_LOG_DP_ERR("Request failed with hardware error");
 846                         break;
 847                 default:
 848                         CPT_LOG_DP_ERR("Request failed with unknown completion code");
 849                 }
 850         }
 851
 852         return ret;
 853 }
 854
 855 static uint16_t
 856 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 857 {
 858         int i, nb_pending, nb_completed;
 859         struct otx2_cpt_qp *qp = qptr;
 860         struct pending_queue *pend_q;
 861         struct cpt_request_info *req;
 862         struct rte_crypto_op *cop;
 863         uint8_t cc[nb_ops];
 864         struct rid *rid;
 865         uintptr_t *rsp;
 866         void *metabuf;
 867
 868         pend_q = &qp->pend_q;
 869
 870         nb_pending = pend_q->pending_count;
 871
 872         if (nb_ops > nb_pending)
 873                 nb_ops = nb_pending;
 874
 875         for (i = 0; i < nb_ops; i++) {
 876                 rid = &pend_q->rid_queue[pend_q->deq_head];
 877                 req = (struct cpt_request_info *)(rid->rid);
 878
 879                 cc[i] = otx2_cpt_compcode_get(req);
 880
 881                 if (unlikely(cc[i] == ERR_REQ_PENDING))
 882                         break;
 883
 884                 ops[i] = req->op;
 885
 886                 MOD_INC(pend_q->deq_head, OTX2_CPT_DEFAULT_CMD_QLEN);
 887                 pend_q->pending_count -= 1;
 888         }
 889
 890         nb_completed = i;
 891
 892         for (i = 0; i < nb_completed; i++) {
 893                 rsp = (void *)ops[i];
 894
 895                 metabuf = (void *)rsp[0];
 896                 cop = (void *)rsp[1];
 897
 898                 ops[i] = cop;
 899
 900                 otx2_cpt_dequeue_post_process(qp, cop, rsp, cc[i]);
 901
 902                 free_op_meta(metabuf, qp->meta_info.pool);
 903         }
 904
 905         return nb_completed;
 906 }
 907
 908 /* PMD ops */
 909
 910 static int
 911 otx2_cpt_dev_config(struct rte_cryptodev *dev,
 912                     struct rte_cryptodev_config *conf)
 913 {
 914         struct otx2_cpt_vf *vf = dev->data->dev_private;
 915         int ret;
 916
 917         if (conf->nb_queue_pairs > vf->max_queues) {
 918                 CPT_LOG_ERR("Invalid number of queue pairs requested");
 919                 return -EINVAL;
 920         }
 921
 922         dev->feature_flags &= ~conf->ff_disable;
 923
 924         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
 925                 /* Initialize shared FPM table */
 926                 ret = cpt_fpm_init(otx2_fpm_iova);
 927                 if (ret)
 928                         return ret;
 929         }
 930
 931         /* Unregister error interrupts */
 932         if (vf->err_intr_registered)
 933                 otx2_cpt_err_intr_unregister(dev);
 934
 935         /* Detach queues */
 936         if (vf->nb_queues) {
 937                 ret = otx2_cpt_queues_detach(dev);
 938                 if (ret) {
 939                         CPT_LOG_ERR("Could not detach CPT queues");
 940                         return ret;
 941                 }
 942         }
 943
 944         /* Attach queues */
 945         ret = otx2_cpt_queues_attach(dev, conf->nb_queue_pairs);
 946         if (ret) {
 947                 CPT_LOG_ERR("Could not attach CPT queues");
 948                 return -ENODEV;
 949         }
 950
 951         ret = otx2_cpt_msix_offsets_get(dev);
 952         if (ret) {
 953                 CPT_LOG_ERR("Could not get MSI-X offsets");
 954                 goto queues_detach;
 955         }
 956
 957         /* Register error interrupts */
 958         ret = otx2_cpt_err_intr_register(dev);
 959         if (ret) {
 960                 CPT_LOG_ERR("Could not register error interrupts");
 961                 goto queues_detach;
 962         }
 963
 964         ret = otx2_cpt_inline_init(dev);
 965         if (ret) {
 966                 CPT_LOG_ERR("Could not enable inline IPsec");
 967                 goto intr_unregister;
 968         }
 969
 970         dev->enqueue_burst = otx2_cpt_enqueue_burst;
 971         dev->dequeue_burst = otx2_cpt_dequeue_burst;
 972
 973         rte_mb();
 974         return 0;
 975
 976 intr_unregister:
 977         otx2_cpt_err_intr_unregister(dev);
 978 queues_detach:
 979         otx2_cpt_queues_detach(dev);
 980         return ret;
 981 }
 982
 983 static int
 984 otx2_cpt_dev_start(struct rte_cryptodev *dev)
 985 {
 986         RTE_SET_USED(dev);
 987
 988         CPT_PMD_INIT_FUNC_TRACE();
 989
 990         return 0;
 991 }
 992
 993 static void
 994 otx2_cpt_dev_stop(struct rte_cryptodev *dev)
 995 {
 996         CPT_PMD_INIT_FUNC_TRACE();
 997
 998         if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)
 999                 cpt_fpm_clear();
1000 }
1001
1002 static int
1003 otx2_cpt_dev_close(struct rte_cryptodev *dev)
1004 {
1005         struct otx2_cpt_vf *vf = dev->data->dev_private;
1006         int i, ret = 0;
1007
1008         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1009                 ret = otx2_cpt_queue_pair_release(dev, i);
1010                 if (ret)
1011                         return ret;
1012         }
1013
1014         /* Unregister error interrupts */
1015         if (vf->err_intr_registered)
1016                 otx2_cpt_err_intr_unregister(dev);
1017
1018         /* Detach queues */
1019         if (vf->nb_queues) {
1020                 ret = otx2_cpt_queues_detach(dev);
1021                 if (ret)
1022                         CPT_LOG_ERR("Could not detach CPT queues");
1023         }
1024
1025         return ret;
1026 }
1027
1028 static void
1029 otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
1030                       struct rte_cryptodev_info *info)
1031 {
1032         struct otx2_cpt_vf *vf = dev->data->dev_private;
1033
1034         if (info != NULL) {
1035                 info->max_nb_queue_pairs = vf->max_queues;
1036                 info->feature_flags = dev->feature_flags;
1037                 info->capabilities = otx2_cpt_capabilities_get();
1038                 info->sym.max_nb_sessions = 0;
1039                 info->driver_id = otx2_cryptodev_driver_id;
1040                 info->min_mbuf_headroom_req = OTX2_CPT_MIN_HEADROOM_REQ;
1041                 info->min_mbuf_tailroom_req = OTX2_CPT_MIN_TAILROOM_REQ;
1042         }
1043 }
1044
1045 static int
1046 otx2_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
1047                           const struct rte_cryptodev_qp_conf *conf,
1048                           int socket_id __rte_unused)
1049 {
1050         uint8_t grp_mask = OTX2_CPT_ENG_GRPS_MASK;
1051         struct rte_pci_device *pci_dev;
1052         struct otx2_cpt_qp *qp;
1053
1054         CPT_PMD_INIT_FUNC_TRACE();
1055
1056         if (dev->data->queue_pairs[qp_id] != NULL)
1057                 otx2_cpt_queue_pair_release(dev, qp_id);
1058
1059         if (conf->nb_descriptors > OTX2_CPT_DEFAULT_CMD_QLEN) {
1060                 CPT_LOG_ERR("Could not setup queue pair for %u descriptors",
1061                             conf->nb_descriptors);
1062                 return -EINVAL;
1063         }
1064
1065         pci_dev = RTE_DEV_TO_PCI(dev->device);
1066
1067         if (pci_dev->mem_resource[2].addr == NULL) {
1068                 CPT_LOG_ERR("Invalid PCI mem address");
1069                 return -EIO;
1070         }
1071
1072         qp = otx2_cpt_qp_create(dev, qp_id, grp_mask);
1073         if (qp == NULL) {
1074                 CPT_LOG_ERR("Could not create queue pair %d", qp_id);
1075                 return -ENOMEM;
1076         }
1077
1078         qp->sess_mp = conf->mp_session;
1079         qp->sess_mp_priv = conf->mp_session_private;
1080         dev->data->queue_pairs[qp_id] = qp;
1081
1082         return 0;
1083 }
1084
1085 static int
1086 otx2_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
1087 {
1088         struct otx2_cpt_qp *qp = dev->data->queue_pairs[qp_id];
1089         int ret;
1090
1091         CPT_PMD_INIT_FUNC_TRACE();
1092
1093         if (qp == NULL)
1094                 return -EINVAL;
1095
1096         CPT_LOG_INFO("Releasing queue pair %d", qp_id);
1097
1098         ret = otx2_cpt_qp_destroy(dev, qp);
1099         if (ret) {
1100                 CPT_LOG_ERR("Could not destroy queue pair %d", qp_id);
1101                 return ret;
1102         }
1103
1104         dev->data->queue_pairs[qp_id] = NULL;
1105
1106         return 0;
1107 }
1108
1109 static unsigned int
1110 otx2_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
1111 {
1112         return cpt_get_session_size();
1113 }
1114
1115 static int
1116 otx2_cpt_sym_session_configure(struct rte_cryptodev *dev,
1117                                struct rte_crypto_sym_xform *xform,
1118                                struct rte_cryptodev_sym_session *sess,
1119                                struct rte_mempool *pool)
1120 {
1121         CPT_PMD_INIT_FUNC_TRACE();
1122
1123         return sym_session_configure(dev->driver_id, xform, sess, pool);
1124 }
1125
1126 static void
1127 otx2_cpt_sym_session_clear(struct rte_cryptodev *dev,
1128                            struct rte_cryptodev_sym_session *sess)
1129 {
1130         CPT_PMD_INIT_FUNC_TRACE();
1131
1132         return sym_session_clear(dev->driver_id, sess);
1133 }
1134
1135 static unsigned int
1136 otx2_cpt_asym_session_size_get(struct rte_cryptodev *dev __rte_unused)
1137 {
1138         return sizeof(struct cpt_asym_sess_misc);
1139 }
1140
1141 static int
1142 otx2_cpt_asym_session_cfg(struct rte_cryptodev *dev,
1143                           struct rte_crypto_asym_xform *xform,
1144                           struct rte_cryptodev_asym_session *sess,
1145                           struct rte_mempool *pool)
1146 {
1147         struct cpt_asym_sess_misc *priv;
1148         int ret;
1149
1150         CPT_PMD_INIT_FUNC_TRACE();
1151
1152         if (rte_mempool_get(pool, (void **)&priv)) {
1153                 CPT_LOG_ERR("Could not allocate session_private_data");
1154                 return -ENOMEM;
1155         }
1156
1157         memset(priv, 0, sizeof(struct cpt_asym_sess_misc));
1158
1159         ret = cpt_fill_asym_session_parameters(priv, xform);
1160         if (ret) {
1161                 CPT_LOG_ERR("Could not configure session parameters");
1162
1163                 /* Return session to mempool */
1164                 rte_mempool_put(pool, priv);
1165                 return ret;
1166         }
1167
1168         set_asym_session_private_data(sess, dev->driver_id, priv);
1169         return 0;
1170 }
1171
1172 static void
1173 otx2_cpt_asym_session_clear(struct rte_cryptodev *dev,
1174                             struct rte_cryptodev_asym_session *sess)
1175 {
1176         struct cpt_asym_sess_misc *priv;
1177         struct rte_mempool *sess_mp;
1178
1179         CPT_PMD_INIT_FUNC_TRACE();
1180
1181         priv = get_asym_session_private_data(sess, dev->driver_id);
1182         if (priv == NULL)
1183                 return;
1184
1185         /* Free resources allocated in session_cfg */
1186         cpt_free_asym_session_parameters(priv);
1187
1188         /* Reset and free object back to pool */
1189         memset(priv, 0, otx2_cpt_asym_session_size_get(dev));
1190         sess_mp = rte_mempool_from_obj(priv);
1191         set_asym_session_private_data(sess, dev->driver_id, NULL);
1192         rte_mempool_put(sess_mp, priv);
1193 }
1194
1195 struct rte_cryptodev_ops otx2_cpt_ops = {
1196         /* Device control ops */
1197         .dev_configure = otx2_cpt_dev_config,
1198         .dev_start = otx2_cpt_dev_start,
1199         .dev_stop = otx2_cpt_dev_stop,
1200         .dev_close = otx2_cpt_dev_close,
1201         .dev_infos_get = otx2_cpt_dev_info_get,
1202
1203         .stats_get = NULL,
1204         .stats_reset = NULL,
1205         .queue_pair_setup = otx2_cpt_queue_pair_setup,
1206         .queue_pair_release = otx2_cpt_queue_pair_release,
1207
1208         /* Symmetric crypto ops */
1209         .sym_session_get_size = otx2_cpt_sym_session_get_size,
1210         .sym_session_configure = otx2_cpt_sym_session_configure,
1211         .sym_session_clear = otx2_cpt_sym_session_clear,
1212
1213         /* Asymmetric crypto ops */
1214         .asym_session_get_size = otx2_cpt_asym_session_size_get,
1215         .asym_session_configure = otx2_cpt_asym_session_cfg,
1216         .asym_session_clear = otx2_cpt_asym_session_clear,
1217
1218 };