1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
11 /**< Intel(R) QAT device name for PCI registration */
12 #define QAT_PCI_NAME qat
14 * Maximum number of SGL entries
16 #define QAT_SGL_MAX_NUMBER 16
18 /* Intel(R) QuickAssist Technology device generation is enumerated
19 * from one according to the generation of the device
26 enum qat_service_type {
27 QAT_SERVICE_ASYMMETRIC = 0,
28 QAT_SERVICE_SYMMETRIC,
29 QAT_SERVICE_COMPRESSION,
32 #define QAT_MAX_SERVICES (QAT_SERVICE_INVALID)
34 /**< Common struct for scatter-gather list operations */
44 uint32_t num_mapped_bufs;
45 struct qat_flat_buf buffers[QAT_SGL_MAX_NUMBER];
46 } __rte_packed __rte_cache_aligned;
48 /** Common, i.e. not service-specific, statistics */
49 struct qat_common_stats {
50 uint64_t enqueued_count;
51 /**< Count of all operations enqueued */
52 uint64_t dequeued_count;
53 /**< Count of all operations dequeued */
55 uint64_t enqueue_err_count;
56 /**< Total error count on operations enqueued */
57 uint64_t dequeue_err_count;
58 /**< Total error count on operations dequeued */
61 struct qat_pci_device;
64 qat_sgl_fill_array(struct rte_mbuf *buf, uint64_t buf_start,
65 struct qat_sgl *list, uint32_t data_len);
67 qat_stats_get(struct qat_pci_device *dev,
68 struct qat_common_stats *stats,
69 enum qat_service_type service);
71 qat_stats_reset(struct qat_pci_device *dev,
72 enum qat_service_type service);
74 #endif /* _QAT_COMMON_H_ */