drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_mempool.h>
  58 #include <rte_mbuf.h>
  59 #include <rte_string_fns.h>
  60 #include <rte_spinlock.h>
  61 #include <rte_hexdump.h>
  62
  63 #include "qat_logs.h"
  64 #include "qat_algs.h"
  65 #include "qat_crypto.h"
  66 #include "adf_transport_access_macros.h"
  67
  68 #define BYTE_LENGTH    8
  69
  70 static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
  71         {       /* SHA1 HMAC */
  72                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  73                 {.sym = {
  74                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  75                         {.auth = {
  76                                 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
  77                                 .block_size = 64,
  78                                 .key_size = {
  79                                         .min = 64,
  80                                         .max = 64,
  81                                         .increment = 0
  82                                 },
  83                                 .digest_size = {
  84                                         .min = 20,
  85                                         .max = 20,
  86                                         .increment = 0
  87                                 },
  88                                 .aad_size = { 0 }
  89                         }, }
  90                 }, }
  91         },
  92         {       /* SHA224 HMAC */
  93                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
  94                 {.sym = {
  95                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
  96                         {.auth = {
  97                                 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
  98                                 .block_size = 64,
  99                                         .key_size = {
 100                                         .min = 64,
 101                                         .max = 64,
 102                                         .increment = 0
 103                                 },
 104                                 .digest_size = {
 105                                         .min = 28,
 106                                         .max = 28,
 107                                         .increment = 0
 108                                 },
 109                                 .aad_size = { 0 }
 110                         }, }
 111                 }, }
 112         },
 113         {       /* SHA256 HMAC */
 114                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 115                 {.sym = {
 116                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 117                         {.auth = {
 118                                 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
 119                                 .block_size = 64,
 120                                 .key_size = {
 121                                         .min = 64,
 122                                         .max = 64,
 123                                         .increment = 0
 124                                 },
 125                                 .digest_size = {
 126                                         .min = 32,
 127                                         .max = 32,
 128                                         .increment = 0
 129                                 },
 130                                 .aad_size = { 0 }
 131                         }, }
 132                 }, }
 133         },
 134         {       /* SHA384 HMAC */
 135                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 136                 {.sym = {
 137                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 138                         {.auth = {
 139                                 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
 140                                 .block_size = 64,
 141                                 .key_size = {
 142                                         .min = 128,
 143                                         .max = 128,
 144                                         .increment = 0
 145                                 },
 146                                 .digest_size = {
 147                                         .min = 48,
 148                                         .max = 48,
 149                                         .increment = 0
 150                                         },
 151                                 .aad_size = { 0 }
 152                         }, }
 153                 }, }
 154         },
 155         {       /* SHA512 HMAC */
 156                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 157                 {.sym = {
 158                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 159                         {.auth = {
 160                                 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
 161                                 .block_size = 128,
 162                                 .key_size = {
 163                                         .min = 128,
 164                                         .max = 128,
 165                                         .increment = 0
 166                                 },
 167                                 .digest_size = {
 168                                         .min = 64,
 169                                         .max = 64,
 170                                         .increment = 0
 171                                 },
 172                                 .aad_size = { 0 }
 173                         }, }
 174                 }, }
 175         },
 176         {       /* MD5 HMAC */
 177                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 178                 {.sym = {
 179                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 180                         {.auth = {
 181                                 .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
 182                                 .block_size = 64,
 183                                 .key_size = {
 184                                         .min = 8,
 185                                         .max = 64,
 186                                         .increment = 8
 187                                 },
 188                                 .digest_size = {
 189                                         .min = 16,
 190                                         .max = 16,
 191                                         .increment = 0
 192                                 },
 193                                 .aad_size = { 0 }
 194                         }, }
 195                 }, }
 196         },
 197         {       /* AES XCBC MAC */
 198                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 199                 {.sym = {
 200                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 201                         {.auth = {
 202                                 .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
 203                                 .block_size = 16,
 204                                 .key_size = {
 205                                         .min = 16,
 206                                         .max = 16,
 207                                         .increment = 0
 208                                 },
 209                                 .digest_size = {
 210                                         .min = 16,
 211                                         .max = 16,
 212                                         .increment = 0
 213                                 },
 214                                 .aad_size = { 0 }
 215                         }, }
 216                 }, }
 217         },
 218         {       /* AES GCM (AUTH) */
 219                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 220                 {.sym = {
 221                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 222                         {.auth = {
 223                                 .algo = RTE_CRYPTO_AUTH_AES_GCM,
 224                                 .block_size = 16,
 225                                 .key_size = {
 226                                         .min = 16,
 227                                         .max = 32,
 228                                         .increment = 8
 229                                 },
 230                                 .digest_size = {
 231                                         .min = 8,
 232                                         .max = 16,
 233                                         .increment = 4
 234                                 },
 235                                 .aad_size = {
 236                                         .min = 8,
 237                                         .max = 12,
 238                                         .increment = 4
 239                                 }
 240                         }, }
 241                 }, }
 242         },
 243         {       /* AES GMAC (AUTH) */
 244                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 245                 {.sym = {
 246                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 247                         {.auth = {
 248                                 .algo = RTE_CRYPTO_AUTH_AES_GMAC,
 249                                 .block_size = 16,
 250                                 .key_size = {
 251                                         .min = 16,
 252                                         .max = 32,
 253                                         .increment = 8
 254                                 },
 255                                 .digest_size = {
 256                                         .min = 8,
 257                                         .max = 16,
 258                                         .increment = 4
 259                                 },
 260                                 .aad_size = {
 261                                         .min = 1,
 262                                         .max = 65535,
 263                                         .increment = 1
 264                                 }
 265                         }, }
 266                 }, }
 267         },
 268         {       /* SNOW 3G (UIA2) */
 269                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 270                 {.sym = {
 271                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 272                         {.auth = {
 273                                 .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
 274                                 .block_size = 16,
 275                                 .key_size = {
 276                                         .min = 16,
 277                                         .max = 16,
 278                                         .increment = 0
 279                                 },
 280                                 .digest_size = {
 281                                         .min = 4,
 282                                         .max = 4,
 283                                         .increment = 0
 284                                 },
 285                                 .aad_size = {
 286                                         .min = 16,
 287                                         .max = 16,
 288                                         .increment = 0
 289                                 }
 290                         }, }
 291                 }, }
 292         },
 293         {       /* AES GCM (CIPHER) */
 294                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 295                 {.sym = {
 296                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 297                         {.cipher = {
 298                                 .algo = RTE_CRYPTO_CIPHER_AES_GCM,
 299                                 .block_size = 16,
 300                                 .key_size = {
 301                                         .min = 16,
 302                                         .max = 32,
 303                                         .increment = 8
 304                                 },
 305                                 .iv_size = {
 306                                         .min = 16,
 307                                         .max = 16,
 308                                         .increment = 0
 309                                 }
 310                         }, }
 311                 }, }
 312         },
 313         {       /* AES CBC */
 314                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 315                 {.sym = {
 316                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 317                         {.cipher = {
 318                                 .algo = RTE_CRYPTO_CIPHER_AES_CBC,
 319                                 .block_size = 16,
 320                                 .key_size = {
 321                                         .min = 16,
 322                                         .max = 32,
 323                                         .increment = 8
 324                                 },
 325                                 .iv_size = {
 326                                         .min = 16,
 327                                         .max = 16,
 328                                         .increment = 0
 329                                 }
 330                         }, }
 331                 }, }
 332         },
 333         {       /* SNOW 3G (UEA2) */
 334                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 335                 {.sym = {
 336                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 337                         {.cipher = {
 338                                 .algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
 339                                 .block_size = 16,
 340                                 .key_size = {
 341                                         .min = 16,
 342                                         .max = 16,
 343                                         .increment = 0
 344                                 },
 345                                 .iv_size = {
 346                                         .min = 16,
 347                                         .max = 16,
 348                                         .increment = 0
 349                                 }
 350                         }, }
 351                 }, }
 352         },
 353         {       /* AES CTR */
 354                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 355                 {.sym = {
 356                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 357                         {.cipher = {
 358                                 .algo = RTE_CRYPTO_CIPHER_AES_CTR,
 359                                 .block_size = 16,
 360                                 .key_size = {
 361                                         .min = 16,
 362                                         .max = 32,
 363                                         .increment = 8
 364                                 },
 365                                 .iv_size = {
 366                                         .min = 16,
 367                                         .max = 16,
 368                                         .increment = 0
 369                                 }
 370                         }, }
 371                 }, }
 372         },
 373         {       /* NULL (AUTH) */
 374                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 375                 {.sym = {
 376                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 377                         {.auth = {
 378                                 .algo = RTE_CRYPTO_AUTH_NULL,
 379                                 .block_size = 1,
 380                                 .key_size = {
 381                                         .min = 0,
 382                                         .max = 0,
 383                                         .increment = 0
 384                                 },
 385                                 .digest_size = {
 386                                         .min = 0,
 387                                         .max = 0,
 388                                         .increment = 0
 389                                 },
 390                                 .aad_size = { 0 }
 391                         }, },
 392                 }, },
 393         },
 394         {       /* NULL (CIPHER) */
 395                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 396                 {.sym = {
 397                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 398                         {.cipher = {
 399                                 .algo = RTE_CRYPTO_CIPHER_NULL,
 400                                 .block_size = 1,
 401                                 .key_size = {
 402                                         .min = 0,
 403                                         .max = 0,
 404                                         .increment = 0
 405                                 },
 406                                 .iv_size = {
 407                                         .min = 0,
 408                                         .max = 0,
 409                                         .increment = 0
 410                                 }
 411                         }, },
 412                 }, }
 413         },
 414         {       /* KASUMI (F8) */
 415                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 416                 {.sym = {
 417                         .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
 418                         {.cipher = {
 419                                 .algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
 420                                 .block_size = 8,
 421                                 .key_size = {
 422                                         .min = 16,
 423                                         .max = 16,
 424                                         .increment = 0
 425                                 },
 426                                 .iv_size = {
 427                                         .min = 8,
 428                                         .max = 8,
 429                                         .increment = 0
 430                                 }
 431                         }, }
 432                 }, }
 433         },
 434         {       /* KASUMI (F9) */
 435                 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 436                 {.sym = {
 437                         .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
 438                         {.auth = {
 439                                 .algo = RTE_CRYPTO_AUTH_KASUMI_F9,
 440                                 .block_size = 8,
 441                                 .key_size = {
 442                                         .min = 16,
 443                                         .max = 16,
 444                                         .increment = 0
 445                                 },
 446                                 .digest_size = {
 447                                         .min = 4,
 448                                         .max = 4,
 449                                         .increment = 0
 450                                 },
 451                                 .aad_size = {
 452                                         .min = 8,
 453                                         .max = 8,
 454                                         .increment = 0
 455                                 }
 456                         }, }
 457                 }, }
 458         },
 459         RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 460 };
 461
 462 static inline uint32_t
 463 adf_modulo(uint32_t data, uint32_t shift);
 464
 465 static inline int
 466 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
 467
 468 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
 469                 void *session)
 470 {
 471         struct qat_session *sess = session;
 472         phys_addr_t cd_paddr;
 473
 474         PMD_INIT_FUNC_TRACE();
 475         if (session) {
 476                 cd_paddr = sess->cd_paddr;
 477                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
 478                 sess->cd_paddr = cd_paddr;
 479         } else
 480                 PMD_DRV_LOG(ERR, "NULL session");
 481 }
 482
 483 static int
 484 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
 485 {
 486         /* Cipher Only */
 487         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
 488                 return ICP_QAT_FW_LA_CMD_CIPHER;
 489
 490         /* Authentication Only */
 491         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 492                 return ICP_QAT_FW_LA_CMD_AUTH;
 493
 494         if (xform->next == NULL)
 495                 return -1;
 496
 497         /* Cipher then Authenticate */
 498         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 499                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 500                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 501
 502         /* Authenticate then Cipher */
 503         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 504                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 505                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 506
 507         return -1;
 508 }
 509
 510 static struct rte_crypto_auth_xform *
 511 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 512 {
 513         do {
 514                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 515                         return &xform->auth;
 516
 517                 xform = xform->next;
 518         } while (xform);
 519
 520         return NULL;
 521 }
 522
 523 static struct rte_crypto_cipher_xform *
 524 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 525 {
 526         do {
 527                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 528                         return &xform->cipher;
 529
 530                 xform = xform->next;
 531         } while (xform);
 532
 533         return NULL;
 534 }
 535 void *
 536 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 537                 struct rte_crypto_sym_xform *xform, void *session_private)
 538 {
 539         struct qat_pmd_private *internals = dev->data->dev_private;
 540
 541         struct qat_session *session = session_private;
 542
 543         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 544
 545         /* Get cipher xform from crypto xform chain */
 546         cipher_xform = qat_get_cipher_xform(xform);
 547
 548         switch (cipher_xform->algo) {
 549         case RTE_CRYPTO_CIPHER_AES_CBC:
 550                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 551                                 &session->qat_cipher_alg) != 0) {
 552                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 553                         goto error_out;
 554                 }
 555                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 556                 break;
 557         case RTE_CRYPTO_CIPHER_AES_GCM:
 558                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 559                                 &session->qat_cipher_alg) != 0) {
 560                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 561                         goto error_out;
 562                 }
 563                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 564                 break;
 565         case RTE_CRYPTO_CIPHER_AES_CTR:
 566                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 567                                 &session->qat_cipher_alg) != 0) {
 568                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 569                         goto error_out;
 570                 }
 571                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 572                 break;
 573         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 574                 if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
 575                                         &session->qat_cipher_alg) != 0) {
 576                         PMD_DRV_LOG(ERR, "Invalid SNOW 3G cipher key size");
 577                         goto error_out;
 578                 }
 579                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 580                 break;
 581         case RTE_CRYPTO_CIPHER_NULL:
 582                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 583                 break;
 584         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 585                 if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
 586                                         &session->qat_cipher_alg) != 0) {
 587                         PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
 588                         goto error_out;
 589                 }
 590                 session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
 591                 break;
 592         case RTE_CRYPTO_CIPHER_3DES_ECB:
 593         case RTE_CRYPTO_CIPHER_3DES_CBC:
 594         case RTE_CRYPTO_CIPHER_AES_ECB:
 595         case RTE_CRYPTO_CIPHER_AES_CCM:
 596         case RTE_CRYPTO_CIPHER_AES_F8:
 597         case RTE_CRYPTO_CIPHER_AES_XTS:
 598         case RTE_CRYPTO_CIPHER_ARC4:
 599         case RTE_CRYPTO_CIPHER_ZUC_EEA3:
 600                 PMD_DRV_LOG(ERR, "Crypto QAT PMD: Unsupported Cipher alg %u",
 601                                 cipher_xform->algo);
 602                 goto error_out;
 603         default:
 604                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 605                                 cipher_xform->algo);
 606                 goto error_out;
 607         }
 608
 609         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 610                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 611         else
 612                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 613
 614         if (qat_alg_aead_session_create_content_desc_cipher(session,
 615                                                 cipher_xform->key.data,
 616                                                 cipher_xform->key.length))
 617                 goto error_out;
 618
 619         return session;
 620
 621 error_out:
 622         rte_mempool_put(internals->sess_mp, session);
 623         return NULL;
 624 }
 625
 626
 627 void *
 628 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 629                 struct rte_crypto_sym_xform *xform, void *session_private)
 630 {
 631         struct qat_pmd_private *internals = dev->data->dev_private;
 632
 633         struct qat_session *session = session_private;
 634
 635         int qat_cmd_id;
 636
 637         PMD_INIT_FUNC_TRACE();
 638
 639         /* Get requested QAT command id */
 640         qat_cmd_id = qat_get_cmd_id(xform);
 641         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 642                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 643                 goto error_out;
 644         }
 645         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 646         switch (session->qat_cmd) {
 647         case ICP_QAT_FW_LA_CMD_CIPHER:
 648         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 649                 break;
 650         case ICP_QAT_FW_LA_CMD_AUTH:
 651         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 652                 break;
 653         case ICP_QAT_FW_LA_CMD_CIPHER_HASH:
 654         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 655         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 656                 break;
 657         case ICP_QAT_FW_LA_CMD_HASH_CIPHER:
 658         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 659         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 660                 break;
 661         case ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM:
 662         case ICP_QAT_FW_LA_CMD_TRNG_TEST:
 663         case ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE:
 664         case ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE:
 665         case ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE:
 666         case ICP_QAT_FW_LA_CMD_MGF1:
 667         case ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP:
 668         case ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP:
 669         case ICP_QAT_FW_LA_CMD_DELIMITER:
 670         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 671                 session->qat_cmd);
 672                 goto error_out;
 673         default:
 674         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 675                 session->qat_cmd);
 676                 goto error_out;
 677         }
 678         return session;
 679
 680 error_out:
 681         rte_mempool_put(internals->sess_mp, session);
 682         return NULL;
 683 }
 684
 685 struct qat_session *
 686 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 687                                 struct rte_crypto_sym_xform *xform,
 688                                 struct qat_session *session_private)
 689 {
 690
 691         struct qat_pmd_private *internals = dev->data->dev_private;
 692         struct qat_session *session = session_private;
 693         struct rte_crypto_auth_xform *auth_xform = NULL;
 694         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 695         auth_xform = qat_get_auth_xform(xform);
 696
 697         switch (auth_xform->algo) {
 698         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 699                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 700                 break;
 701         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 702                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
 703                 break;
 704         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 705                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 706                 break;
 707         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 708                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA384;
 709                 break;
 710         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 711                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 712                 break;
 713         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 714                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 715                 break;
 716         case RTE_CRYPTO_AUTH_AES_GCM:
 717                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 718                 break;
 719         case RTE_CRYPTO_AUTH_AES_GMAC:
 720                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 721                 break;
 722         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 723                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 724                 break;
 725         case RTE_CRYPTO_AUTH_MD5_HMAC:
 726                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
 727                 break;
 728         case RTE_CRYPTO_AUTH_NULL:
 729                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 730                 break;
 731         case RTE_CRYPTO_AUTH_KASUMI_F9:
 732                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
 733                 break;
 734         case RTE_CRYPTO_AUTH_SHA1:
 735         case RTE_CRYPTO_AUTH_SHA256:
 736         case RTE_CRYPTO_AUTH_SHA512:
 737         case RTE_CRYPTO_AUTH_SHA224:
 738         case RTE_CRYPTO_AUTH_SHA384:
 739         case RTE_CRYPTO_AUTH_MD5:
 740         case RTE_CRYPTO_AUTH_AES_CCM:
 741         case RTE_CRYPTO_AUTH_AES_CMAC:
 742         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 743         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 744                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 745                                 auth_xform->algo);
 746                 goto error_out;
 747         default:
 748                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 749                                 auth_xform->algo);
 750                 goto error_out;
 751         }
 752         cipher_xform = qat_get_cipher_xform(xform);
 753
 754         if ((session->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128) ||
 755                         (session->qat_hash_alg ==
 756                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_64))  {
 757                 if (qat_alg_aead_session_create_content_desc_auth(session,
 758                                 cipher_xform->key.data,
 759                                 cipher_xform->key.length,
 760                                 auth_xform->add_auth_data_length,
 761                                 auth_xform->digest_length,
 762                                 auth_xform->op))
 763                         goto error_out;
 764         } else {
 765                 if (qat_alg_aead_session_create_content_desc_auth(session,
 766                                 auth_xform->key.data,
 767                                 auth_xform->key.length,
 768                                 auth_xform->add_auth_data_length,
 769                                 auth_xform->digest_length,
 770                                 auth_xform->op))
 771                         goto error_out;
 772         }
 773         return session;
 774
 775 error_out:
 776         if (internals->sess_mp != NULL)
 777                 rte_mempool_put(internals->sess_mp, session);
 778         return NULL;
 779 }
 780
 781 unsigned qat_crypto_sym_get_session_private_size(
 782                 struct rte_cryptodev *dev __rte_unused)
 783 {
 784         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 785 }
 786
 787
 788 uint16_t
 789 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 790                 uint16_t nb_ops)
 791 {
 792         register struct qat_queue *queue;
 793         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 794         register uint32_t nb_ops_sent = 0;
 795         register struct rte_crypto_op **cur_op = ops;
 796         register int ret;
 797         uint16_t nb_ops_possible = nb_ops;
 798         register uint8_t *base_addr;
 799         register uint32_t tail;
 800         int overflow;
 801
 802         if (unlikely(nb_ops == 0))
 803                 return 0;
 804
 805         /* read params used a lot in main loop into registers */
 806         queue = &(tmp_qp->tx_q);
 807         base_addr = (uint8_t *)queue->base_addr;
 808         tail = queue->tail;
 809
 810         /* Find how many can actually fit on the ring */
 811         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 812                                 - queue->max_inflights;
 813         if (overflow > 0) {
 814                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 815                 nb_ops_possible = nb_ops - overflow;
 816                 if (nb_ops_possible == 0)
 817                         return 0;
 818         }
 819
 820         while (nb_ops_sent != nb_ops_possible) {
 821                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 822                 if (ret != 0) {
 823                         tmp_qp->stats.enqueue_err_count++;
 824                         if (nb_ops_sent == 0)
 825                                 return 0;
 826                         goto kick_tail;
 827                 }
 828
 829                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 830                 nb_ops_sent++;
 831                 cur_op++;
 832         }
 833 kick_tail:
 834         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 835                         queue->hw_queue_number, tail);
 836         queue->tail = tail;
 837         tmp_qp->stats.enqueued_count += nb_ops_sent;
 838         return nb_ops_sent;
 839 }
 840
 841 uint16_t
 842 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 843                 uint16_t nb_ops)
 844 {
 845         struct qat_queue *queue;
 846         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 847         uint32_t msg_counter = 0;
 848         struct rte_crypto_op *rx_op;
 849         struct icp_qat_fw_comn_resp *resp_msg;
 850
 851         queue = &(tmp_qp->rx_q);
 852         resp_msg = (struct icp_qat_fw_comn_resp *)
 853                         ((uint8_t *)queue->base_addr + queue->head);
 854
 855         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 856                         msg_counter != nb_ops) {
 857                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 858                                 (resp_msg->opaque_data);
 859
 860 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 861                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 862                                 sizeof(struct icp_qat_fw_comn_resp));
 863 #endif
 864                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 865                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 866                                         resp_msg->comn_hdr.comn_status)) {
 867                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 868                 } else {
 869                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 870                 }
 871                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 872                 queue->head = adf_modulo(queue->head +
 873                                 queue->msg_size,
 874                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 875                 resp_msg = (struct icp_qat_fw_comn_resp *)
 876                                         ((uint8_t *)queue->base_addr +
 877                                                         queue->head);
 878                 *ops = rx_op;
 879                 ops++;
 880                 msg_counter++;
 881         }
 882         if (msg_counter > 0) {
 883                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 884                                         queue->hw_bundle_number,
 885                                         queue->hw_queue_number, queue->head);
 886                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 887                 tmp_qp->stats.dequeued_count += msg_counter;
 888         }
 889         return msg_counter;
 890 }
 891
 892 static inline int
 893 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 894 {
 895         struct qat_session *ctx;
 896         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 897         struct icp_qat_fw_la_auth_req_params *auth_param;
 898         register struct icp_qat_fw_la_bulk_req *qat_req;
 899
 900 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 901         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 902                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 903                                 "operation requests, op (%p) is not a "
 904                                 "symmetric operation.", op);
 905                 return -EINVAL;
 906         }
 907 #endif
 908         if (unlikely(op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 909                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 910                                 " requests, op (%p) is sessionless.", op);
 911                 return -EINVAL;
 912         }
 913
 914         if (unlikely(op->sym->session->dev_type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
 915                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 916                 return -EINVAL;
 917         }
 918
 919         ctx = (struct qat_session *)op->sym->session->_private;
 920         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 921         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 922         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 923
 924         qat_req->comn_mid.dst_length =
 925                 qat_req->comn_mid.src_length =
 926                                 rte_pktmbuf_data_len(op->sym->m_src);
 927
 928         qat_req->comn_mid.dest_data_addr =
 929                 qat_req->comn_mid.src_data_addr =
 930                             rte_pktmbuf_mtophys(op->sym->m_src);
 931
 932         if (unlikely(op->sym->m_dst != NULL)) {
 933                 qat_req->comn_mid.dest_data_addr =
 934                                 rte_pktmbuf_mtophys(op->sym->m_dst);
 935                 qat_req->comn_mid.dst_length =
 936                                 rte_pktmbuf_data_len(op->sym->m_dst);
 937         }
 938
 939         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 940         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 941
 942         cipher_param->cipher_length = op->sym->cipher.data.length;
 943         cipher_param->cipher_offset = op->sym->cipher.data.offset;
 944         if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 945                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
 946                 if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 947                                 (cipher_param->cipher_offset
 948                                         % BYTE_LENGTH != 0))) {
 949                         PMD_DRV_LOG(ERR, " For SNOW 3G/KASUMI, QAT PMD only "
 950                                 "supports byte aligned values");
 951                         op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 952                         return -EINVAL;
 953                 }
 954                 cipher_param->cipher_length >>= 3;
 955                 cipher_param->cipher_offset >>= 3;
 956         }
 957
 958         if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
 959                         sizeof(cipher_param->u.cipher_IV_array))) {
 960                 rte_memcpy(cipher_param->u.cipher_IV_array,
 961                                 op->sym->cipher.iv.data,
 962                                 op->sym->cipher.iv.length);
 963         } else {
 964                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 965                                 qat_req->comn_hdr.serv_specif_flags,
 966                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 967                 cipher_param->u.s.cipher_IV_ptr = op->sym->cipher.iv.phys_addr;
 968         }
 969         if (op->sym->auth.digest.phys_addr) {
 970                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 971                                 qat_req->comn_hdr.serv_specif_flags,
 972                                 ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 973                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
 974         }
 975         auth_param->auth_off = op->sym->auth.data.offset;
 976         auth_param->auth_len = op->sym->auth.data.length;
 977         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2) {
 978                 if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0) ||
 979                                 (auth_param->auth_len % BYTE_LENGTH != 0))) {
 980                         PMD_DRV_LOG(ERR, " For SNOW 3G, QAT PMD only "
 981                                 "supports byte aligned values");
 982                         op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 983                         return -EINVAL;
 984                 }
 985                 auth_param->auth_off >>= 3;
 986                 auth_param->auth_len >>= 3;
 987         }
 988         if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 989                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
 990                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
 991                 auth_param->auth_len = (auth_param->auth_len >> 3)
 992                                 + (auth_param->auth_off >> 3)
 993                                 + (BYTE_LENGTH >> 3)
 994                                 - 8;
 995                 auth_param->auth_off = 8;
 996         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH
 997                         && ctx->qat_hash_alg ==
 998                                         ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
 999                 auth_param->auth_len = (auth_param->auth_len >> 3)
1000                                 + (auth_param->auth_off >> 3)
1001                                 + (BYTE_LENGTH >> 3);
1002                 auth_param->auth_off = 0;
1003         }
1004         auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
1005
1006         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
1007                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
1008                 if (op->sym->cipher.iv.length == 12) {
1009                         /*
1010                          * For GCM a 12 bit IV is allowed,
1011                          * but we need to inform the f/w
1012                          */
1013                         ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
1014                                 qat_req->comn_hdr.serv_specif_flags,
1015                                 ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
1016                 }
1017                 if (op->sym->cipher.data.length == 0) {
1018                         /*
1019                          * GMAC
1020                          */
1021                         qat_req->comn_mid.dest_data_addr =
1022                                 qat_req->comn_mid.src_data_addr =
1023                                         op->sym->auth.aad.phys_addr;
1024                         auth_param->u1.aad_adr = 0;
1025                         auth_param->auth_len = op->sym->auth.aad.length;
1026                         auth_param->u2.aad_sz = 0;
1027
1028                 }
1029
1030         }
1031
1032 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
1033         rte_hexdump(stdout, "qat_req:", qat_req,
1034                         sizeof(struct icp_qat_fw_la_bulk_req));
1035         rte_hexdump(stdout, "src_data:",
1036                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
1037                         rte_pktmbuf_data_len(op->sym->m_src));
1038         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
1039                         op->sym->cipher.iv.length);
1040         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
1041                         op->sym->auth.digest.length);
1042         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
1043                         op->sym->auth.aad.length);
1044 #endif
1045         return 0;
1046 }
1047
1048 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
1049 {
1050         uint32_t div = data >> shift;
1051         uint32_t mult = div << shift;
1052
1053         return data - mult;
1054 }
1055
1056 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *sym_sess)
1057 {
1058         struct rte_cryptodev_sym_session *sess = sym_sess;
1059         struct qat_session *s = (void *)sess->_private;
1060
1061         PMD_INIT_FUNC_TRACE();
1062         s->cd_paddr = rte_mempool_virt2phy(mp, sess) +
1063                 offsetof(struct qat_session, cd) +
1064                 offsetof(struct rte_cryptodev_sym_session, _private);
1065 }
1066
1067 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
1068 {
1069         PMD_INIT_FUNC_TRACE();
1070         return -ENOTSUP;
1071 }
1072
1073 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
1074 {
1075         PMD_INIT_FUNC_TRACE();
1076         return 0;
1077 }
1078
1079 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
1080 {
1081         PMD_INIT_FUNC_TRACE();
1082 }
1083
1084 int qat_dev_close(struct rte_cryptodev *dev)
1085 {
1086         int i, ret;
1087
1088         PMD_INIT_FUNC_TRACE();
1089
1090         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1091                 ret = qat_crypto_sym_qp_release(dev, i);
1092                 if (ret < 0)
1093                         return ret;
1094         }
1095
1096         return 0;
1097 }
1098
1099 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
1100                                 struct rte_cryptodev_info *info)
1101 {
1102         struct qat_pmd_private *internals = dev->data->dev_private;
1103
1104         PMD_INIT_FUNC_TRACE();
1105         if (info != NULL) {
1106                 info->max_nb_queue_pairs =
1107                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
1108                                 ADF_NUM_BUNDLES_PER_DEV;
1109                 info->feature_flags = dev->feature_flags;
1110                 info->capabilities = qat_pmd_capabilities;
1111                 info->sym.max_nb_sessions = internals->max_nb_sessions;
1112                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
1113         }
1114 }
1115
1116 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
1117                 struct rte_cryptodev_stats *stats)
1118 {
1119         int i;
1120         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1121
1122         PMD_INIT_FUNC_TRACE();
1123         if (stats == NULL) {
1124                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
1125                 return;
1126         }
1127         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
1128                 if (qp[i] == NULL) {
1129                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
1130                         continue;
1131                 }
1132
1133                 stats->enqueued_count += qp[i]->stats.enqueued_count;
1134                 stats->dequeued_count += qp[i]->stats.enqueued_count;
1135                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
1136                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
1137         }
1138 }
1139
1140 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
1141 {
1142         int i;
1143         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
1144
1145         PMD_INIT_FUNC_TRACE();
1146         for (i = 0; i < dev->data->nb_queue_pairs; i++)
1147                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
1148         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
1149 }