drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_ring.h>
  58 #include <rte_mempool.h>
  59 #include <rte_mbuf.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_spinlock.h>
  62 #include <rte_hexdump.h>
  63
  64 #include "qat_logs.h"
  65 #include "qat_algs.h"
  66 #include "qat_crypto.h"
  67 #include "adf_transport_access_macros.h"
  68
  69
  70 static inline uint32_t
  71 adf_modulo(uint32_t data, uint32_t shift);
  72
  73 static inline int
  74 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
  75
  76 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
  77                 void *session)
  78 {
  79         struct qat_session *sess = session;
  80         phys_addr_t cd_paddr = sess->cd_paddr;
  81
  82         PMD_INIT_FUNC_TRACE();
  83         if (session) {
  84                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
  85
  86                 sess->cd_paddr = cd_paddr;
  87         }
  88 }
  89
  90 static int
  91 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
  92 {
  93         /* Cipher Only */
  94         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
  95                 return ICP_QAT_FW_LA_CMD_CIPHER;
  96
  97         /* Authentication Only */
  98         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
  99                 return ICP_QAT_FW_LA_CMD_AUTH;
 100
 101         if (xform->next == NULL)
 102                 return -1;
 103
 104         /* Cipher then Authenticate */
 105         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 106                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 107                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 108
 109         /* Authenticate then Cipher */
 110         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 111                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 112                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 113
 114         return -1;
 115 }
 116
 117 static struct rte_crypto_auth_xform *
 118 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 119 {
 120         do {
 121                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 122                         return &xform->auth;
 123
 124                 xform = xform->next;
 125         } while (xform);
 126
 127         return NULL;
 128 }
 129
 130 static struct rte_crypto_cipher_xform *
 131 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 132 {
 133         do {
 134                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 135                         return &xform->cipher;
 136
 137                 xform = xform->next;
 138         } while (xform);
 139
 140         return NULL;
 141 }
 142 void *
 143 qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 144                 struct rte_crypto_sym_xform *xform, void *session_private)
 145 {
 146         struct qat_pmd_private *internals = dev->data->dev_private;
 147
 148         struct qat_session *session = session_private;
 149
 150         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 151
 152         /* Get cipher xform from crypto xform chain */
 153         cipher_xform = qat_get_cipher_xform(xform);
 154
 155         switch (cipher_xform->algo) {
 156         case RTE_CRYPTO_CIPHER_AES_CBC:
 157                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 158                                 &session->qat_cipher_alg) != 0) {
 159                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 160                         goto error_out;
 161                 }
 162                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 163                 break;
 164         case RTE_CRYPTO_CIPHER_AES_GCM:
 165                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 166                                 &session->qat_cipher_alg) != 0) {
 167                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 168                         goto error_out;
 169                 }
 170                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 171                 break;
 172         case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
 173                 if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
 174                                         &session->qat_cipher_alg) != 0) {
 175                         PMD_DRV_LOG(ERR, "Invalid SNOW3G cipher key size");
 176                         goto error_out;
 177                 }
 178                 session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 179                 break;
 180         case RTE_CRYPTO_CIPHER_NULL:
 181         case RTE_CRYPTO_CIPHER_3DES_ECB:
 182         case RTE_CRYPTO_CIPHER_3DES_CBC:
 183         case RTE_CRYPTO_CIPHER_AES_ECB:
 184         case RTE_CRYPTO_CIPHER_AES_CTR:
 185         case RTE_CRYPTO_CIPHER_AES_CCM:
 186         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 187                 PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 188                                 cipher_xform->algo);
 189                 goto error_out;
 190         default:
 191                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 192                                 cipher_xform->algo);
 193                 goto error_out;
 194         }
 195
 196         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 197                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 198         else
 199                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 200
 201         if (qat_alg_aead_session_create_content_desc_cipher(session,
 202                                                 cipher_xform->key.data,
 203                                                 cipher_xform->key.length))
 204                 goto error_out;
 205
 206         return session;
 207
 208 error_out:
 209         rte_mempool_put(internals->sess_mp, session);
 210         return NULL;
 211 }
 212
 213
 214 void *
 215 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 216                 struct rte_crypto_sym_xform *xform, void *session_private)
 217 {
 218         struct qat_pmd_private *internals = dev->data->dev_private;
 219
 220         struct qat_session *session = session_private;
 221
 222         int qat_cmd_id;
 223
 224         PMD_INIT_FUNC_TRACE();
 225
 226         /* Get requested QAT command id */
 227         qat_cmd_id = qat_get_cmd_id(xform);
 228         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 229                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 230                 goto error_out;
 231         }
 232         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 233         switch (session->qat_cmd) {
 234         case ICP_QAT_FW_LA_CMD_CIPHER:
 235         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 236                 break;
 237         case ICP_QAT_FW_LA_CMD_AUTH:
 238         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 239                 break;
 240         case ICP_QAT_FW_LA_CMD_CIPHER_HASH:
 241         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 242         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 243                 break;
 244         case ICP_QAT_FW_LA_CMD_HASH_CIPHER:
 245         session = qat_crypto_sym_configure_session_auth(dev, xform, session);
 246         session = qat_crypto_sym_configure_session_cipher(dev, xform, session);
 247                 break;
 248         case ICP_QAT_FW_LA_CMD_TRNG_GET_RANDOM:
 249         case ICP_QAT_FW_LA_CMD_TRNG_TEST:
 250         case ICP_QAT_FW_LA_CMD_SSL3_KEY_DERIVE:
 251         case ICP_QAT_FW_LA_CMD_TLS_V1_1_KEY_DERIVE:
 252         case ICP_QAT_FW_LA_CMD_TLS_V1_2_KEY_DERIVE:
 253         case ICP_QAT_FW_LA_CMD_MGF1:
 254         case ICP_QAT_FW_LA_CMD_AUTH_PRE_COMP:
 255         case ICP_QAT_FW_LA_CMD_CIPHER_PRE_COMP:
 256         case ICP_QAT_FW_LA_CMD_DELIMITER:
 257         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 258                 session->qat_cmd);
 259                 goto error_out;
 260         default:
 261         PMD_DRV_LOG(ERR, "Unsupported Service %u",
 262                 session->qat_cmd);
 263                 goto error_out;
 264         }
 265         return session;
 266
 267 error_out:
 268         rte_mempool_put(internals->sess_mp, session);
 269         return NULL;
 270 }
 271
 272 struct qat_session *
 273 qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 274                                 struct rte_crypto_sym_xform *xform,
 275                                 struct qat_session *session_private)
 276 {
 277
 278         struct qat_pmd_private *internals = dev->data->dev_private;
 279         struct qat_session *session = session_private;
 280         struct rte_crypto_auth_xform *auth_xform = NULL;
 281         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 282         auth_xform = qat_get_auth_xform(xform);
 283
 284         switch (auth_xform->algo) {
 285         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 286                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 287                 break;
 288         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 289                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 290                 break;
 291         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 292                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 293                 break;
 294         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 295                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 296                 break;
 297         case RTE_CRYPTO_AUTH_AES_GCM:
 298         case RTE_CRYPTO_AUTH_AES_GMAC:
 299                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 300                 break;
 301         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 302                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 303                 break;
 304         case RTE_CRYPTO_AUTH_NULL:
 305         case RTE_CRYPTO_AUTH_SHA1:
 306         case RTE_CRYPTO_AUTH_SHA256:
 307         case RTE_CRYPTO_AUTH_SHA512:
 308         case RTE_CRYPTO_AUTH_SHA224:
 309         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 310         case RTE_CRYPTO_AUTH_SHA384:
 311         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 312         case RTE_CRYPTO_AUTH_MD5:
 313         case RTE_CRYPTO_AUTH_MD5_HMAC:
 314         case RTE_CRYPTO_AUTH_AES_CCM:
 315         case RTE_CRYPTO_AUTH_KASUMI_F9:
 316         case RTE_CRYPTO_AUTH_AES_CMAC:
 317         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 318         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 319                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 320                                 auth_xform->algo);
 321                 goto error_out;
 322         default:
 323                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 324                                 auth_xform->algo);
 325                 goto error_out;
 326         }
 327         cipher_xform = qat_get_cipher_xform(xform);
 328
 329         if ((session->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128) ||
 330                         (session->qat_hash_alg ==
 331                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_64))  {
 332                 if (qat_alg_aead_session_create_content_desc_auth(session,
 333                                 cipher_xform->key.data,
 334                                 cipher_xform->key.length,
 335                                 auth_xform->add_auth_data_length,
 336                                 auth_xform->digest_length))
 337                         goto error_out;
 338         } else {
 339                 if (qat_alg_aead_session_create_content_desc_auth(session,
 340                                 auth_xform->key.data,
 341                                 auth_xform->key.length,
 342                                 auth_xform->add_auth_data_length,
 343                                 auth_xform->digest_length))
 344                         goto error_out;
 345         }
 346         return session;
 347
 348 error_out:
 349         rte_mempool_put(internals->sess_mp, session);
 350         return NULL;
 351 }
 352
 353 unsigned qat_crypto_sym_get_session_private_size(
 354                 struct rte_cryptodev *dev __rte_unused)
 355 {
 356         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 357 }
 358
 359
 360 uint16_t
 361 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 362                 uint16_t nb_ops)
 363 {
 364         register struct qat_queue *queue;
 365         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 366         register uint32_t nb_ops_sent = 0;
 367         register struct rte_crypto_op **cur_op = ops;
 368         register int ret;
 369         uint16_t nb_ops_possible = nb_ops;
 370         register uint8_t *base_addr;
 371         register uint32_t tail;
 372         int overflow;
 373
 374         /* read params used a lot in main loop into registers */
 375         queue = &(tmp_qp->tx_q);
 376         base_addr = (uint8_t *)queue->base_addr;
 377         tail = queue->tail;
 378
 379         /* Find how many can actually fit on the ring */
 380         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 381                                 - queue->max_inflights;
 382         if (overflow > 0) {
 383                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 384                 nb_ops_possible = nb_ops - overflow;
 385                 if (nb_ops_possible == 0)
 386                         return 0;
 387         }
 388
 389         while (nb_ops_sent != nb_ops_possible) {
 390                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 391                 if (ret != 0) {
 392                         tmp_qp->stats.enqueue_err_count++;
 393                         if (nb_ops_sent == 0)
 394                                 return 0;
 395                         goto kick_tail;
 396                 }
 397
 398                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 399                 nb_ops_sent++;
 400                 cur_op++;
 401         }
 402 kick_tail:
 403         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 404                         queue->hw_queue_number, tail);
 405         queue->tail = tail;
 406         tmp_qp->stats.enqueued_count += nb_ops_sent;
 407         return nb_ops_sent;
 408 }
 409
 410 uint16_t
 411 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 412                 uint16_t nb_ops)
 413 {
 414         struct qat_queue *queue;
 415         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 416         uint32_t msg_counter = 0;
 417         struct rte_crypto_op *rx_op;
 418         struct icp_qat_fw_comn_resp *resp_msg;
 419
 420         queue = &(tmp_qp->rx_q);
 421         resp_msg = (struct icp_qat_fw_comn_resp *)
 422                         ((uint8_t *)queue->base_addr + queue->head);
 423
 424         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 425                         msg_counter != nb_ops) {
 426                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 427                                 (resp_msg->opaque_data);
 428
 429 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 430                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 431                                 sizeof(struct icp_qat_fw_comn_resp));
 432 #endif
 433                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 434                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 435                                         resp_msg->comn_hdr.comn_status)) {
 436                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 437                 } else {
 438                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 439                 }
 440                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 441                 queue->head = adf_modulo(queue->head +
 442                                 queue->msg_size,
 443                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 444                 resp_msg = (struct icp_qat_fw_comn_resp *)
 445                                         ((uint8_t *)queue->base_addr +
 446                                                         queue->head);
 447                 *ops = rx_op;
 448                 ops++;
 449                 msg_counter++;
 450         }
 451         if (msg_counter > 0) {
 452                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 453                                         queue->hw_bundle_number,
 454                                         queue->hw_queue_number, queue->head);
 455                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 456                 tmp_qp->stats.dequeued_count += msg_counter;
 457         }
 458         return msg_counter;
 459 }
 460
 461 static inline int
 462 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 463 {
 464         struct qat_session *ctx;
 465         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 466         struct icp_qat_fw_la_auth_req_params *auth_param;
 467         register struct icp_qat_fw_la_bulk_req *qat_req;
 468
 469 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 470         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 471                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 472                                 "operation requests, op (%p) is not a "
 473                                 "symmetric operation.", op);
 474                 return -EINVAL;
 475         }
 476 #endif
 477         if (unlikely(op->sym->type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 478                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 479                                 " requests, op (%p) is sessionless.", op);
 480                 return -EINVAL;
 481         }
 482
 483         if (unlikely(op->sym->session->type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
 484                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 485                 return -EINVAL;
 486         }
 487
 488         ctx = (struct qat_session *)op->sym->session->_private;
 489         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 490         *qat_req = ctx->fw_req;
 491         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 492
 493         /*
 494          * The following code assumes:
 495          * - single entry buffer.
 496          * - always in place.
 497          */
 498         qat_req->comn_mid.dst_length =
 499                         qat_req->comn_mid.src_length =
 500                                         rte_pktmbuf_data_len(op->sym->m_src);
 501         qat_req->comn_mid.dest_data_addr =
 502                         qat_req->comn_mid.src_data_addr =
 503                                         rte_pktmbuf_mtophys(op->sym->m_src);
 504         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 505         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 506
 507         cipher_param->cipher_length = op->sym->cipher.data.length;
 508         cipher_param->cipher_offset = op->sym->cipher.data.offset;
 509         if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
 510                         sizeof(cipher_param->u.cipher_IV_array))) {
 511                 rte_memcpy(cipher_param->u.cipher_IV_array,
 512                                 op->sym->cipher.iv.data,
 513                                 op->sym->cipher.iv.length);
 514         } else {
 515                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 516                                 qat_req->comn_hdr.serv_specif_flags,
 517                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 518                 cipher_param->u.s.cipher_IV_ptr = op->sym->cipher.iv.phys_addr;
 519         }
 520         if (op->sym->auth.digest.phys_addr) {
 521                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 522                                 qat_req->comn_hdr.serv_specif_flags,
 523                                 ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 524                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
 525         }
 526         auth_param->auth_off = op->sym->auth.data.offset;
 527         auth_param->auth_len = op->sym->auth.data.length;
 528
 529         auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 530         /* (GCM) aad length(240 max) will be at this location after precompute */
 531         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 532                 ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 533                 auth_param->u2.aad_sz =
 534                 ALIGN_POW2_ROUNDUP(ctx->cd.hash.sha.state1[
 535                                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
 536                                         ICP_QAT_HW_GALOIS_H_SZ + 3], 16);
 537         }
 538         auth_param->hash_state_sz = (auth_param->u2.aad_sz) >> 3;
 539
 540
 541 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 542         rte_hexdump(stdout, "qat_req:", qat_req,
 543                         sizeof(struct icp_qat_fw_la_bulk_req));
 544         rte_hexdump(stdout, "src_data:",
 545                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 546                         rte_pktmbuf_data_len(op->sym->m_src));
 547         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
 548                         op->sym->cipher.iv.length);
 549         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
 550                         op->sym->auth.digest.length);
 551         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
 552                         op->sym->auth.aad.length);
 553 #endif
 554         return 0;
 555 }
 556
 557 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
 558 {
 559         uint32_t div = data >> shift;
 560         uint32_t mult = div << shift;
 561
 562         return data - mult;
 563 }
 564
 565 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *priv_sess)
 566 {
 567         struct qat_session *s = priv_sess;
 568
 569         PMD_INIT_FUNC_TRACE();
 570         s->cd_paddr = rte_mempool_virt2phy(mp, &s->cd);
 571 }
 572
 573 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
 574 {
 575         PMD_INIT_FUNC_TRACE();
 576         return -ENOTSUP;
 577 }
 578
 579 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
 580 {
 581         PMD_INIT_FUNC_TRACE();
 582         return 0;
 583 }
 584
 585 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
 586 {
 587         PMD_INIT_FUNC_TRACE();
 588 }
 589
 590 int qat_dev_close(struct rte_cryptodev *dev)
 591 {
 592         int i, ret;
 593
 594         PMD_INIT_FUNC_TRACE();
 595
 596         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 597                 ret = qat_crypto_sym_qp_release(dev, i);
 598                 if (ret < 0)
 599                         return ret;
 600         }
 601
 602         return 0;
 603 }
 604
 605 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
 606                                 struct rte_cryptodev_info *info)
 607 {
 608         struct qat_pmd_private *internals = dev->data->dev_private;
 609
 610         PMD_INIT_FUNC_TRACE();
 611         if (info != NULL) {
 612                 info->max_nb_queue_pairs =
 613                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
 614                                 ADF_NUM_BUNDLES_PER_DEV;
 615
 616                 info->sym.max_nb_sessions = internals->max_nb_sessions;
 617                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
 618         }
 619 }
 620
 621 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
 622                 struct rte_cryptodev_stats *stats)
 623 {
 624         int i;
 625         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 626
 627         PMD_INIT_FUNC_TRACE();
 628         if (stats == NULL) {
 629                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
 630                 return;
 631         }
 632         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 633                 if (qp[i] == NULL) {
 634                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
 635                         continue;
 636                 }
 637
 638                 stats->enqueued_count += qp[i]->stats.enqueued_count;
 639                 stats->dequeued_count += qp[i]->stats.enqueued_count;
 640                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
 641                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
 642         }
 643 }
 644
 645 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
 646 {
 647         int i;
 648         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 649
 650         PMD_INIT_FUNC_TRACE();
 651         for (i = 0; i < dev->data->nb_queue_pairs; i++)
 652                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
 653         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
 654 }