drivers/crypto/qat/qat_sym.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2015-2018 Intel Corporation
   3  */
   4
   5 #include <openssl/evp.h>
   6
   7 #include <rte_mempool.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_hexdump.h>
  10 #include <rte_crypto_sym.h>
  11 #include <rte_bus_pci.h>
  12 #include <rte_byteorder.h>
  13
  14 #include "qat_logs.h"
  15 #include "qat_sym_session.h"
  16 #include "qat_sym.h"
  17 #include "qat_sym_pmd.h"
  18
  19 #define BYTE_LENGTH    8
  20 /* bpi is only used for partial blocks of DES and AES
  21  * so AES block len can be assumed as max len for iv, src and dst
  22  */
  23 #define BPI_MAX_ENCR_IV_LEN ICP_QAT_HW_AES_BLK_SZ
  24
  25 /** Encrypt a single partial block
  26  *  Depends on openssl libcrypto
  27  *  Uses ECB+XOR to do CFB encryption, same result, more performant
  28  */
  29 static inline int
  30 bpi_cipher_encrypt(uint8_t *src, uint8_t *dst,
  31                 uint8_t *iv, int ivlen, int srclen,
  32                 void *bpi_ctx)
  33 {
  34         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
  35         int encrypted_ivlen;
  36         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
  37         uint8_t *encr = encrypted_iv;
  38
  39         /* ECB method: encrypt the IV, then XOR this with plaintext */
  40         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
  41                                                                 <= 0)
  42                 goto cipher_encrypt_err;
  43
  44         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
  45                 *dst = *src ^ *encr;
  46
  47         return 0;
  48
  49 cipher_encrypt_err:
  50         PMD_DRV_LOG(ERR, "libcrypto ECB cipher encrypt failed");
  51         return -EINVAL;
  52 }
  53
  54 /** Decrypt a single partial block
  55  *  Depends on openssl libcrypto
  56  *  Uses ECB+XOR to do CFB encryption, same result, more performant
  57  */
  58 static inline int
  59 bpi_cipher_decrypt(uint8_t *src, uint8_t *dst,
  60                 uint8_t *iv, int ivlen, int srclen,
  61                 void *bpi_ctx)
  62 {
  63         EVP_CIPHER_CTX *ctx = (EVP_CIPHER_CTX *)bpi_ctx;
  64         int encrypted_ivlen;
  65         uint8_t encrypted_iv[BPI_MAX_ENCR_IV_LEN];
  66         uint8_t *encr = encrypted_iv;
  67
  68         /* ECB method: encrypt (not decrypt!) the IV, then XOR with plaintext */
  69         if (EVP_EncryptUpdate(ctx, encrypted_iv, &encrypted_ivlen, iv, ivlen)
  70                                                                 <= 0)
  71                 goto cipher_decrypt_err;
  72
  73         for (; srclen != 0; --srclen, ++dst, ++src, ++encr)
  74                 *dst = *src ^ *encr;
  75
  76         return 0;
  77
  78 cipher_decrypt_err:
  79         PMD_DRV_LOG(ERR, "libcrypto ECB cipher decrypt for BPI IV failed");
  80         return -EINVAL;
  81 }
  82
  83
  84 static inline uint32_t
  85 qat_bpicipher_preprocess(struct qat_sym_session *ctx,
  86                                 struct rte_crypto_op *op)
  87 {
  88         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
  89         struct rte_crypto_sym_op *sym_op = op->sym;
  90         uint8_t last_block_len = block_len > 0 ?
  91                         sym_op->cipher.data.length % block_len : 0;
  92
  93         if (last_block_len &&
  94                         ctx->qat_dir == ICP_QAT_HW_CIPHER_DECRYPT) {
  95
  96                 /* Decrypt last block */
  97                 uint8_t *last_block, *dst, *iv;
  98                 uint32_t last_block_offset = sym_op->cipher.data.offset +
  99                                 sym_op->cipher.data.length - last_block_len;
 100                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
 101                                 uint8_t *, last_block_offset);
 102
 103                 if (unlikely(sym_op->m_dst != NULL))
 104                         /* out-of-place operation (OOP) */
 105                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
 106                                                 uint8_t *, last_block_offset);
 107                 else
 108                         dst = last_block;
 109
 110                 if (last_block_len < sym_op->cipher.data.length)
 111                         /* use previous block ciphertext as IV */
 112                         iv = last_block - block_len;
 113                 else
 114                         /* runt block, i.e. less than one full block */
 115                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
 116                                         ctx->cipher_iv.offset);
 117
 118 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 119                 rte_hexdump(stdout, "BPI: src before pre-process:", last_block,
 120                         last_block_len);
 121                 if (sym_op->m_dst != NULL)
 122                         rte_hexdump(stdout, "BPI: dst before pre-process:", dst,
 123                                 last_block_len);
 124 #endif
 125                 bpi_cipher_decrypt(last_block, dst, iv, block_len,
 126                                 last_block_len, ctx->bpi_ctx);
 127 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 128                 rte_hexdump(stdout, "BPI: src after pre-process:", last_block,
 129                         last_block_len);
 130                 if (sym_op->m_dst != NULL)
 131                         rte_hexdump(stdout, "BPI: dst after pre-process:", dst,
 132                                 last_block_len);
 133 #endif
 134         }
 135
 136         return sym_op->cipher.data.length - last_block_len;
 137 }
 138
 139 static inline uint32_t
 140 qat_bpicipher_postprocess(struct qat_sym_session *ctx,
 141                                 struct rte_crypto_op *op)
 142 {
 143         int block_len = qat_cipher_get_block_size(ctx->qat_cipher_alg);
 144         struct rte_crypto_sym_op *sym_op = op->sym;
 145         uint8_t last_block_len = block_len > 0 ?
 146                         sym_op->cipher.data.length % block_len : 0;
 147
 148         if (last_block_len > 0 &&
 149                         ctx->qat_dir == ICP_QAT_HW_CIPHER_ENCRYPT) {
 150
 151                 /* Encrypt last block */
 152                 uint8_t *last_block, *dst, *iv;
 153                 uint32_t last_block_offset;
 154
 155                 last_block_offset = sym_op->cipher.data.offset +
 156                                 sym_op->cipher.data.length - last_block_len;
 157                 last_block = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_src,
 158                                 uint8_t *, last_block_offset);
 159
 160                 if (unlikely(sym_op->m_dst != NULL))
 161                         /* out-of-place operation (OOP) */
 162                         dst = (uint8_t *) rte_pktmbuf_mtod_offset(sym_op->m_dst,
 163                                                 uint8_t *, last_block_offset);
 164                 else
 165                         dst = last_block;
 166
 167                 if (last_block_len < sym_op->cipher.data.length)
 168                         /* use previous block ciphertext as IV */
 169                         iv = dst - block_len;
 170                 else
 171                         /* runt block, i.e. less than one full block */
 172                         iv = rte_crypto_op_ctod_offset(op, uint8_t *,
 173                                         ctx->cipher_iv.offset);
 174
 175 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 176                 rte_hexdump(stdout, "BPI: src before post-process:", last_block,
 177                         last_block_len);
 178                 if (sym_op->m_dst != NULL)
 179                         rte_hexdump(stdout, "BPI: dst before post-process:",
 180                                         dst, last_block_len);
 181 #endif
 182                 bpi_cipher_encrypt(last_block, dst, iv, block_len,
 183                                 last_block_len, ctx->bpi_ctx);
 184 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 185                 rte_hexdump(stdout, "BPI: src after post-process:", last_block,
 186                         last_block_len);
 187                 if (sym_op->m_dst != NULL)
 188                         rte_hexdump(stdout, "BPI: dst after post-process:", dst,
 189                                 last_block_len);
 190 #endif
 191         }
 192         return sym_op->cipher.data.length - last_block_len;
 193 }
 194
 195 static inline void
 196 set_cipher_iv(uint16_t iv_length, uint16_t iv_offset,
 197                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 198                 struct rte_crypto_op *op,
 199                 struct icp_qat_fw_la_bulk_req *qat_req)
 200 {
 201         /* copy IV into request if it fits */
 202         if (iv_length <= sizeof(cipher_param->u.cipher_IV_array)) {
 203                 rte_memcpy(cipher_param->u.cipher_IV_array,
 204                                 rte_crypto_op_ctod_offset(op, uint8_t *,
 205                                         iv_offset),
 206                                 iv_length);
 207         } else {
 208                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 209                                 qat_req->comn_hdr.serv_specif_flags,
 210                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 211                 cipher_param->u.s.cipher_IV_ptr =
 212                                 rte_crypto_op_ctophys_offset(op,
 213                                         iv_offset);
 214         }
 215 }
 216
 217 /** Set IV for CCM is special case, 0th byte is set to q-1
 218  *  where q is padding of nonce in 16 byte block
 219  */
 220 static inline void
 221 set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
 222                 struct icp_qat_fw_la_cipher_req_params *cipher_param,
 223                 struct rte_crypto_op *op, uint8_t q, uint8_t aad_len_field_sz)
 224 {
 225         rte_memcpy(((uint8_t *)cipher_param->u.cipher_IV_array) +
 226                         ICP_QAT_HW_CCM_NONCE_OFFSET,
 227                         rte_crypto_op_ctod_offset(op, uint8_t *,
 228                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 229                         iv_length);
 230         *(uint8_t *)&cipher_param->u.cipher_IV_array[0] =
 231                         q - ICP_QAT_HW_CCM_NONCE_OFFSET;
 232
 233         if (aad_len_field_sz)
 234                 rte_memcpy(&op->sym->aead.aad.data[ICP_QAT_HW_CCM_NONCE_OFFSET],
 235                         rte_crypto_op_ctod_offset(op, uint8_t *,
 236                                 iv_offset) + ICP_QAT_HW_CCM_NONCE_OFFSET,
 237                         iv_length);
 238 }
 239
 240 int
 241 qat_sym_build_request(void *in_op, uint8_t *out_msg,
 242                 void *op_cookie, enum qat_device_gen qat_dev_gen)
 243 {
 244         int ret = 0;
 245         struct qat_sym_session *ctx;
 246         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 247         struct icp_qat_fw_la_auth_req_params *auth_param;
 248         register struct icp_qat_fw_la_bulk_req *qat_req;
 249         uint8_t do_auth = 0, do_cipher = 0, do_aead = 0;
 250         uint32_t cipher_len = 0, cipher_ofs = 0;
 251         uint32_t auth_len = 0, auth_ofs = 0;
 252         uint32_t min_ofs = 0;
 253         uint64_t src_buf_start = 0, dst_buf_start = 0;
 254         uint8_t do_sgl = 0;
 255         struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 256         struct qat_sym_op_cookie *cookie =
 257                                 (struct qat_sym_op_cookie *)op_cookie;
 258
 259 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 260         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 261                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 262                                 "operation requests, op (%p) is not a "
 263                                 "symmetric operation.", op);
 264                 return -EINVAL;
 265         }
 266 #endif
 267         if (unlikely(op->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
 268                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 269                                 " requests, op (%p) is sessionless.", op);
 270                 return -EINVAL;
 271         }
 272
 273         ctx = (struct qat_sym_session *)get_session_private_data(
 274                         op->sym->session, cryptodev_qat_driver_id);
 275
 276         if (unlikely(ctx == NULL)) {
 277                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 278                 return -EINVAL;
 279         }
 280
 281         if (unlikely(ctx->min_qat_dev_gen > qat_dev_gen)) {
 282                 PMD_DRV_LOG(ERR, "Session alg not supported on this device gen");
 283                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;
 284                 return -EINVAL;
 285         }
 286
 287         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 288         rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
 289         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 290         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 291         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 292
 293         if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
 294                         ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) {
 295                 /* AES-GCM or AES-CCM */
 296                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 297                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64 ||
 298                         (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_AES128
 299                         && ctx->qat_mode == ICP_QAT_HW_CIPHER_CTR_MODE
 300                         && ctx->qat_hash_alg ==
 301                                         ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC)) {
 302                         do_aead = 1;
 303                 } else {
 304                         do_auth = 1;
 305                         do_cipher = 1;
 306                 }
 307         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH) {
 308                 do_auth = 1;
 309                 do_cipher = 0;
 310         } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
 311                 do_auth = 0;
 312                 do_cipher = 1;
 313         }
 314
 315         if (do_cipher) {
 316
 317                 if (ctx->qat_cipher_alg ==
 318                                          ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
 319                         ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI ||
 320                         ctx->qat_cipher_alg ==
 321                                 ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
 322
 323                         if (unlikely(
 324                                 (cipher_param->cipher_length % BYTE_LENGTH != 0)
 325                                  || (cipher_param->cipher_offset
 326                                                         % BYTE_LENGTH != 0))) {
 327                                 PMD_DRV_LOG(ERR,
 328                   "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
 329                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 330                                 return -EINVAL;
 331                         }
 332                         cipher_len = op->sym->cipher.data.length >> 3;
 333                         cipher_ofs = op->sym->cipher.data.offset >> 3;
 334
 335                 } else if (ctx->bpi_ctx) {
 336                         /* DOCSIS - only send complete blocks to device
 337                          * Process any partial block using CFB mode.
 338                          * Even if 0 complete blocks, still send this to device
 339                          * to get into rx queue for post-process and dequeuing
 340                          */
 341                         cipher_len = qat_bpicipher_preprocess(ctx, op);
 342                         cipher_ofs = op->sym->cipher.data.offset;
 343                 } else {
 344                         cipher_len = op->sym->cipher.data.length;
 345                         cipher_ofs = op->sym->cipher.data.offset;
 346                 }
 347
 348                 set_cipher_iv(ctx->cipher_iv.length, ctx->cipher_iv.offset,
 349                                 cipher_param, op, qat_req);
 350                 min_ofs = cipher_ofs;
 351         }
 352
 353         if (do_auth) {
 354
 355                 if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 ||
 356                         ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
 357                         ctx->qat_hash_alg ==
 358                                 ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
 359                         if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0)
 360                                 || (auth_param->auth_len % BYTE_LENGTH != 0))) {
 361                                 PMD_DRV_LOG(ERR,
 362                 "For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
 363                                 op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 364                                 return -EINVAL;
 365                         }
 366                         auth_ofs = op->sym->auth.data.offset >> 3;
 367                         auth_len = op->sym->auth.data.length >> 3;
 368
 369                         auth_param->u1.aad_adr =
 370                                         rte_crypto_op_ctophys_offset(op,
 371                                                         ctx->auth_iv.offset);
 372
 373                 } else if (ctx->qat_hash_alg ==
 374                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 375                                 ctx->qat_hash_alg ==
 376                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 377                         /* AES-GMAC */
 378                         set_cipher_iv(ctx->auth_iv.length,
 379                                 ctx->auth_iv.offset,
 380                                 cipher_param, op, qat_req);
 381                         auth_ofs = op->sym->auth.data.offset;
 382                         auth_len = op->sym->auth.data.length;
 383
 384                         auth_param->u1.aad_adr = 0;
 385                         auth_param->u2.aad_sz = 0;
 386
 387                         /*
 388                          * If len(iv)==12B fw computes J0
 389                          */
 390                         if (ctx->auth_iv.length == 12) {
 391                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 392                                         qat_req->comn_hdr.serv_specif_flags,
 393                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 394
 395                         }
 396                 } else {
 397                         auth_ofs = op->sym->auth.data.offset;
 398                         auth_len = op->sym->auth.data.length;
 399
 400                 }
 401                 min_ofs = auth_ofs;
 402
 403                 if (likely(ctx->qat_hash_alg != ICP_QAT_HW_AUTH_ALGO_NULL))
 404                         auth_param->auth_res_addr =
 405                                         op->sym->auth.digest.phys_addr;
 406
 407         }
 408
 409         if (do_aead) {
 410                 /*
 411                  * This address may used for setting AAD physical pointer
 412                  * into IV offset from op
 413                  */
 414                 rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr;
 415                 if (ctx->qat_hash_alg ==
 416                                 ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 417                                 ctx->qat_hash_alg ==
 418                                         ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 419                         /*
 420                          * If len(iv)==12B fw computes J0
 421                          */
 422                         if (ctx->cipher_iv.length == 12) {
 423                                 ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
 424                                         qat_req->comn_hdr.serv_specif_flags,
 425                                         ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
 426                         }
 427                         set_cipher_iv(ctx->cipher_iv.length,
 428                                         ctx->cipher_iv.offset,
 429                                         cipher_param, op, qat_req);
 430
 431                 } else if (ctx->qat_hash_alg ==
 432                                 ICP_QAT_HW_AUTH_ALGO_AES_CBC_MAC) {
 433
 434                         /* In case of AES-CCM this may point to user selected
 435                          * memory or iv offset in cypto_op
 436                          */
 437                         uint8_t *aad_data = op->sym->aead.aad.data;
 438                         /* This is true AAD length, it not includes 18 bytes of
 439                          * preceding data
 440                          */
 441                         uint8_t aad_ccm_real_len = 0;
 442                         uint8_t aad_len_field_sz = 0;
 443                         uint32_t msg_len_be =
 444                                         rte_bswap32(op->sym->aead.data.length);
 445
 446                         if (ctx->aad_len > ICP_QAT_HW_CCM_AAD_DATA_OFFSET) {
 447                                 aad_len_field_sz = ICP_QAT_HW_CCM_AAD_LEN_INFO;
 448                                 aad_ccm_real_len = ctx->aad_len -
 449                                         ICP_QAT_HW_CCM_AAD_B0_LEN -
 450                                         ICP_QAT_HW_CCM_AAD_LEN_INFO;
 451                         } else {
 452                                 /*
 453                                  * aad_len not greater than 18, so no actual aad
 454                                  *  data, then use IV after op for B0 block
 455                                  */
 456                                 aad_data = rte_crypto_op_ctod_offset(op,
 457                                                 uint8_t *,
 458                                                 ctx->cipher_iv.offset);
 459                                 aad_phys_addr_aead =
 460                                                 rte_crypto_op_ctophys_offset(op,
 461                                                         ctx->cipher_iv.offset);
 462                         }
 463
 464                         uint8_t q = ICP_QAT_HW_CCM_NQ_CONST -
 465                                                         ctx->cipher_iv.length;
 466
 467                         aad_data[0] = ICP_QAT_HW_CCM_BUILD_B0_FLAGS(
 468                                                         aad_len_field_sz,
 469                                                         ctx->digest_length, q);
 470
 471                         if (q > ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE) {
 472                                 memcpy(aad_data + ctx->cipher_iv.length +
 473                                     ICP_QAT_HW_CCM_NONCE_OFFSET +
 474                                     (q - ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE),
 475                                     (uint8_t *)&msg_len_be,
 476                                     ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE);
 477                         } else {
 478                                 memcpy(aad_data + ctx->cipher_iv.length +
 479                                     ICP_QAT_HW_CCM_NONCE_OFFSET,
 480                                     (uint8_t *)&msg_len_be
 481                                     + (ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE
 482                                     - q), q);
 483                         }
 484
 485                         if (aad_len_field_sz > 0) {
 486                                 *(uint16_t *)&aad_data[ICP_QAT_HW_CCM_AAD_B0_LEN]
 487                                                 = rte_bswap16(aad_ccm_real_len);
 488
 489                                 if ((aad_ccm_real_len + aad_len_field_sz)
 490                                                 % ICP_QAT_HW_CCM_AAD_B0_LEN) {
 491                                         uint8_t pad_len = 0;
 492                                         uint8_t pad_idx = 0;
 493
 494                                         pad_len = ICP_QAT_HW_CCM_AAD_B0_LEN -
 495                                         ((aad_ccm_real_len + aad_len_field_sz) %
 496                                                 ICP_QAT_HW_CCM_AAD_B0_LEN);
 497                                         pad_idx = ICP_QAT_HW_CCM_AAD_B0_LEN +
 498                                             aad_ccm_real_len + aad_len_field_sz;
 499                                         memset(&aad_data[pad_idx],
 500                                                         0, pad_len);
 501                                 }
 502
 503                         }
 504
 505                         set_cipher_iv_ccm(ctx->cipher_iv.length,
 506                                         ctx->cipher_iv.offset,
 507                                         cipher_param, op, q,
 508                                         aad_len_field_sz);
 509
 510                 }
 511
 512                 cipher_len = op->sym->aead.data.length;
 513                 cipher_ofs = op->sym->aead.data.offset;
 514                 auth_len = op->sym->aead.data.length;
 515                 auth_ofs = op->sym->aead.data.offset;
 516
 517                 auth_param->u1.aad_adr = aad_phys_addr_aead;
 518                 auth_param->auth_res_addr = op->sym->aead.digest.phys_addr;
 519                 min_ofs = op->sym->aead.data.offset;
 520         }
 521
 522         if (op->sym->m_src->next || (op->sym->m_dst && op->sym->m_dst->next))
 523                 do_sgl = 1;
 524
 525         /* adjust for chain case */
 526         if (do_cipher && do_auth)
 527                 min_ofs = cipher_ofs < auth_ofs ? cipher_ofs : auth_ofs;
 528
 529         if (unlikely(min_ofs >= rte_pktmbuf_data_len(op->sym->m_src) && do_sgl))
 530                 min_ofs = 0;
 531
 532         if (unlikely(op->sym->m_dst != NULL)) {
 533                 /* Out-of-place operation (OOP)
 534                  * Don't align DMA start. DMA the minimum data-set
 535                  * so as not to overwrite data in dest buffer
 536                  */
 537                 src_buf_start =
 538                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
 539                 dst_buf_start =
 540                         rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
 541
 542         } else {
 543                 /* In-place operation
 544                  * Start DMA at nearest aligned address below min_ofs
 545                  */
 546                 src_buf_start =
 547                         rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs)
 548                                                 & QAT_64_BTYE_ALIGN_MASK;
 549
 550                 if (unlikely((rte_pktmbuf_iova(op->sym->m_src) -
 551                                         rte_pktmbuf_headroom(op->sym->m_src))
 552                                                         > src_buf_start)) {
 553                         /* alignment has pushed addr ahead of start of mbuf
 554                          * so revert and take the performance hit
 555                          */
 556                         src_buf_start =
 557                                 rte_pktmbuf_iova_offset(op->sym->m_src,
 558                                                                 min_ofs);
 559                 }
 560                 dst_buf_start = src_buf_start;
 561         }
 562
 563         if (do_cipher || do_aead) {
 564                 cipher_param->cipher_offset =
 565                                 (uint32_t)rte_pktmbuf_iova_offset(
 566                                 op->sym->m_src, cipher_ofs) - src_buf_start;
 567                 cipher_param->cipher_length = cipher_len;
 568         } else {
 569                 cipher_param->cipher_offset = 0;
 570                 cipher_param->cipher_length = 0;
 571         }
 572
 573         if (do_auth || do_aead) {
 574                 auth_param->auth_off = (uint32_t)rte_pktmbuf_iova_offset(
 575                                 op->sym->m_src, auth_ofs) - src_buf_start;
 576                 auth_param->auth_len = auth_len;
 577         } else {
 578                 auth_param->auth_off = 0;
 579                 auth_param->auth_len = 0;
 580         }
 581
 582         qat_req->comn_mid.dst_length =
 583                 qat_req->comn_mid.src_length =
 584                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 585                 > (auth_param->auth_off + auth_param->auth_len) ?
 586                 (cipher_param->cipher_offset + cipher_param->cipher_length)
 587                 : (auth_param->auth_off + auth_param->auth_len);
 588
 589         if (do_sgl) {
 590
 591                 ICP_QAT_FW_COMN_PTR_TYPE_SET(qat_req->comn_hdr.comn_req_flags,
 592                                 QAT_COMN_PTR_TYPE_SGL);
 593                 ret = qat_sgl_fill_array(op->sym->m_src, src_buf_start,
 594                                 &cookie->qat_sgl_src,
 595                                 qat_req->comn_mid.src_length);
 596                 if (ret) {
 597                         PMD_DRV_LOG(ERR, "QAT PMD Cannot fill sgl array");
 598                         return ret;
 599                 }
 600
 601                 if (likely(op->sym->m_dst == NULL))
 602                         qat_req->comn_mid.dest_data_addr =
 603                                 qat_req->comn_mid.src_data_addr =
 604                                 cookie->qat_sgl_src_phys_addr;
 605                 else {
 606                         ret = qat_sgl_fill_array(op->sym->m_dst,
 607                                         dst_buf_start,
 608                                         &cookie->qat_sgl_dst,
 609                                                 qat_req->comn_mid.dst_length);
 610
 611                         if (ret) {
 612                                 PMD_DRV_LOG(ERR, "QAT PMD Cannot "
 613                                                 "fill sgl array");
 614                                 return ret;
 615                         }
 616
 617                         qat_req->comn_mid.src_data_addr =
 618                                 cookie->qat_sgl_src_phys_addr;
 619                         qat_req->comn_mid.dest_data_addr =
 620                                         cookie->qat_sgl_dst_phys_addr;
 621                 }
 622         } else {
 623                 qat_req->comn_mid.src_data_addr = src_buf_start;
 624                 qat_req->comn_mid.dest_data_addr = dst_buf_start;
 625         }
 626
 627 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 628         rte_hexdump(stdout, "qat_req:", qat_req,
 629                         sizeof(struct icp_qat_fw_la_bulk_req));
 630         rte_hexdump(stdout, "src_data:",
 631                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 632                         rte_pktmbuf_data_len(op->sym->m_src));
 633         if (do_cipher) {
 634                 uint8_t *cipher_iv_ptr = rte_crypto_op_ctod_offset(op,
 635                                                 uint8_t *,
 636                                                 ctx->cipher_iv.offset);
 637                 rte_hexdump(stdout, "cipher iv:", cipher_iv_ptr,
 638                                 ctx->cipher_iv.length);
 639         }
 640
 641         if (do_auth) {
 642                 if (ctx->auth_iv.length) {
 643                         uint8_t *auth_iv_ptr = rte_crypto_op_ctod_offset(op,
 644                                                         uint8_t *,
 645                                                         ctx->auth_iv.offset);
 646                         rte_hexdump(stdout, "auth iv:", auth_iv_ptr,
 647                                                 ctx->auth_iv.length);
 648                 }
 649                 rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
 650                                 ctx->digest_length);
 651         }
 652
 653         if (do_aead) {
 654                 rte_hexdump(stdout, "digest:", op->sym->aead.digest.data,
 655                                 ctx->digest_length);
 656                 rte_hexdump(stdout, "aad:", op->sym->aead.aad.data,
 657                                 ctx->aad_len);
 658         }
 659 #endif
 660         return 0;
 661 }
 662
 663 int
 664 qat_sym_process_response(void **op, uint8_t *resp,
 665                 __rte_unused void *op_cookie,
 666                 __rte_unused enum qat_device_gen qat_dev_gen)
 667 {
 668
 669         struct icp_qat_fw_comn_resp *resp_msg =
 670                         (struct icp_qat_fw_comn_resp *)resp;
 671         struct rte_crypto_op *rx_op = (struct rte_crypto_op *)(uintptr_t)
 672                         (resp_msg->opaque_data);
 673
 674 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 675         rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 676                         sizeof(struct icp_qat_fw_comn_resp));
 677 #endif
 678
 679         if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 680                         ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 681                         resp_msg->comn_hdr.comn_status)) {
 682
 683                 rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 684         } else {
 685                 struct qat_sym_session *sess = (struct qat_sym_session *)
 686                                                 get_session_private_data(
 687                                                 rx_op->sym->session,
 688                                                 cryptodev_qat_driver_id);
 689
 690                 if (sess->bpi_ctx)
 691                         qat_bpicipher_postprocess(sess, rx_op);
 692                 rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 693         }
 694         *op = (void *)rx_op;
 695
 696         return 0;
 697 }