drivers/event/cnxk/cnxk_eventdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #ifndef __CNXK_EVENTDEV_H__
   6 #define __CNXK_EVENTDEV_H__
   7
   8 #include <rte_devargs.h>
   9 #include <rte_kvargs.h>
  10 #include <rte_mbuf_pool_ops.h>
  11 #include <rte_pci.h>
  12
  13 #include <eventdev_pmd_pci.h>
  14
  15 #include "roc_api.h"
  16
  17 #include "cnxk_tim_evdev.h"
  18
  19 #define CNXK_SSO_XAE_CNT   "xae_cnt"
  20 #define CNXK_SSO_GGRP_QOS  "qos"
  21 #define CN9K_SSO_SINGLE_WS "single_ws"
  22 #define CN10K_SSO_GW_MODE  "gw_mode"
  23
  24 #define NSEC2USEC(__ns)         ((__ns) / 1E3)
  25 #define USEC2NSEC(__us)         ((__us)*1E3)
  26 #define NSEC2TICK(__ns, __freq) (((__ns) * (__freq)) / 1E9)
  27
  28 #define CNXK_SSO_MAX_HWGRP     (RTE_EVENT_MAX_QUEUES_PER_DEV + 1)
  29 #define CNXK_SSO_FC_NAME       "cnxk_evdev_xaq_fc"
  30 #define CNXK_SSO_MZ_NAME       "cnxk_evdev_mz"
  31 #define CNXK_SSO_XAQ_CACHE_CNT (0x7)
  32 #define CNXK_SSO_XAQ_SLACK     (8)
  33
  34 #define CNXK_TT_FROM_TAG(x)         (((x) >> 32) & SSO_TT_EMPTY)
  35 #define CNXK_TT_FROM_EVENT(x)       (((x) >> 38) & SSO_TT_EMPTY)
  36 #define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
  37 #define CNXK_SUB_EVENT_FROM_TAG(x)  (((x) >> 20) & 0xff)
  38 #define CNXK_CLR_SUB_EVENT(x)       (~(0xffu << 20) & x)
  39 #define CNXK_GRP_FROM_TAG(x)        (((x) >> 36) & 0x3ff)
  40 #define CNXK_SWTAG_PEND(x)          (BIT_ULL(62) & x)
  41
  42 #define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
  43
  44 #define CN10K_GW_MODE_NONE     0
  45 #define CN10K_GW_MODE_PREF     1
  46 #define CN10K_GW_MODE_PREF_WFE 2
  47
  48 typedef void *(*cnxk_sso_init_hws_mem_t)(void *dev, uint8_t port_id);
  49 typedef void (*cnxk_sso_hws_setup_t)(void *dev, void *ws, uintptr_t *grp_base);
  50 typedef void (*cnxk_sso_hws_release_t)(void *dev, void *ws);
  51 typedef int (*cnxk_sso_link_t)(void *dev, void *ws, uint16_t *map,
  52                                uint16_t nb_link);
  53 typedef int (*cnxk_sso_unlink_t)(void *dev, void *ws, uint16_t *map,
  54                                  uint16_t nb_link);
  55 typedef void (*cnxk_handle_event_t)(void *arg, struct rte_event ev);
  56 typedef void (*cnxk_sso_hws_reset_t)(void *arg, void *ws);
  57 typedef void (*cnxk_sso_hws_flush_t)(void *ws, uint8_t queue_id, uintptr_t base,
  58                                      cnxk_handle_event_t fn, void *arg);
  59
  60 struct cnxk_sso_qos {
  61         uint16_t queue;
  62         uint8_t xaq_prcnt;
  63         uint8_t taq_prcnt;
  64         uint8_t iaq_prcnt;
  65 };
  66
  67 struct cnxk_sso_evdev {
  68         struct roc_sso sso;
  69         uint8_t max_event_queues;
  70         uint8_t max_event_ports;
  71         uint8_t is_timeout_deq;
  72         uint8_t nb_event_queues;
  73         uint8_t nb_event_ports;
  74         uint8_t configured;
  75         uint32_t deq_tmo_ns;
  76         uint32_t min_dequeue_timeout_ns;
  77         uint32_t max_dequeue_timeout_ns;
  78         int32_t max_num_events;
  79         uint64_t *fc_mem;
  80         uint64_t xaq_lmt;
  81         uint64_t nb_xaq_cfg;
  82         rte_iova_t fc_iova;
  83         struct rte_mempool *xaq_pool;
  84         uint64_t adptr_xae_cnt;
  85         uint16_t tim_adptr_ring_cnt;
  86         uint16_t *timer_adptr_rings;
  87         uint64_t *timer_adptr_sz;
  88         /* Dev args */
  89         uint32_t xae_cnt;
  90         uint8_t qos_queue_cnt;
  91         struct cnxk_sso_qos *qos_parse_data;
  92         /* CN9K */
  93         uint8_t dual_ws;
  94         /* CN10K */
  95         uint8_t gw_mode;
  96 } __rte_cache_aligned;
  97
  98 /* CN10K HWS ops */
  99 #define CN10K_SSO_HWS_OPS                                                      \
 100         uintptr_t swtag_desched_op;                                            \
 101         uintptr_t swtag_flush_op;                                              \
 102         uintptr_t swtag_untag_op;                                              \
 103         uintptr_t swtag_norm_op;                                               \
 104         uintptr_t updt_wqe_op;                                                 \
 105         uintptr_t tag_wqe_op;                                                  \
 106         uintptr_t getwrk_op
 107
 108 struct cn10k_sso_hws {
 109         /* Get Work Fastpath data */
 110         CN10K_SSO_HWS_OPS;
 111         uint32_t gw_wdata;
 112         uint8_t swtag_req;
 113         uint8_t hws_id;
 114         /* Add Work Fastpath data */
 115         uint64_t xaq_lmt __rte_cache_aligned;
 116         uint64_t *fc_mem;
 117         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 118         uint64_t base;
 119         uintptr_t lmt_base;
 120 } __rte_cache_aligned;
 121
 122 /* CN9K HWS ops */
 123 #define CN9K_SSO_HWS_OPS                                                       \
 124         uintptr_t swtag_desched_op;                                            \
 125         uintptr_t swtag_flush_op;                                              \
 126         uintptr_t swtag_norm_op;                                               \
 127         uintptr_t getwrk_op;                                                   \
 128         uintptr_t tag_op;                                                      \
 129         uintptr_t wqp_op
 130
 131 /* Event port a.k.a GWS */
 132 struct cn9k_sso_hws {
 133         /* Get Work Fastpath data */
 134         CN9K_SSO_HWS_OPS;
 135         uint8_t swtag_req;
 136         uint8_t hws_id;
 137         /* Add Work Fastpath data */
 138         uint64_t xaq_lmt __rte_cache_aligned;
 139         uint64_t *fc_mem;
 140         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 141         uint64_t base;
 142 } __rte_cache_aligned;
 143
 144 struct cn9k_sso_hws_state {
 145         CN9K_SSO_HWS_OPS;
 146 };
 147
 148 struct cn9k_sso_hws_dual {
 149         /* Get Work Fastpath data */
 150         struct cn9k_sso_hws_state ws_state[2]; /* Ping and Pong */
 151         uint8_t swtag_req;
 152         uint8_t vws; /* Ping pong bit */
 153         uint8_t hws_id;
 154         /* Add Work Fastpath data */
 155         uint64_t xaq_lmt __rte_cache_aligned;
 156         uint64_t *fc_mem;
 157         uintptr_t grps_base[CNXK_SSO_MAX_HWGRP];
 158         uint64_t base[2];
 159 } __rte_cache_aligned;
 160
 161 struct cnxk_sso_hws_cookie {
 162         const struct rte_eventdev *event_dev;
 163         bool configured;
 164 } __rte_cache_aligned;
 165
 166 static inline int
 167 parse_kvargs_flag(const char *key, const char *value, void *opaque)
 168 {
 169         RTE_SET_USED(key);
 170
 171         *(uint8_t *)opaque = !!atoi(value);
 172         return 0;
 173 }
 174
 175 static inline int
 176 parse_kvargs_value(const char *key, const char *value, void *opaque)
 177 {
 178         RTE_SET_USED(key);
 179
 180         *(uint32_t *)opaque = (uint32_t)atoi(value);
 181         return 0;
 182 }
 183
 184 static inline struct cnxk_sso_evdev *
 185 cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)
 186 {
 187         return event_dev->data->dev_private;
 188 }
 189
 190 static inline struct cnxk_sso_hws_cookie *
 191 cnxk_sso_hws_get_cookie(void *ws)
 192 {
 193         return RTE_PTR_SUB(ws, sizeof(struct cnxk_sso_hws_cookie));
 194 }
 195
 196 /* Configuration functions */
 197 int cnxk_sso_xae_reconfigure(struct rte_eventdev *event_dev);
 198 int cnxk_sso_xaq_allocate(struct cnxk_sso_evdev *dev);
 199 void cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
 200                            uint32_t event_type);
 201
 202 /* Common ops API. */
 203 int cnxk_sso_init(struct rte_eventdev *event_dev);
 204 int cnxk_sso_fini(struct rte_eventdev *event_dev);
 205 int cnxk_sso_remove(struct rte_pci_device *pci_dev);
 206 void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,
 207                        struct rte_event_dev_info *dev_info);
 208 int cnxk_sso_dev_validate(const struct rte_eventdev *event_dev);
 209 int cnxk_setup_event_ports(const struct rte_eventdev *event_dev,
 210                            cnxk_sso_init_hws_mem_t init_hws_mem,
 211                            cnxk_sso_hws_setup_t hws_setup);
 212 void cnxk_sso_restore_links(const struct rte_eventdev *event_dev,
 213                             cnxk_sso_link_t link_fn);
 214 void cnxk_sso_queue_def_conf(struct rte_eventdev *event_dev, uint8_t queue_id,
 215                              struct rte_event_queue_conf *queue_conf);
 216 int cnxk_sso_queue_setup(struct rte_eventdev *event_dev, uint8_t queue_id,
 217                          const struct rte_event_queue_conf *queue_conf);
 218 void cnxk_sso_queue_release(struct rte_eventdev *event_dev, uint8_t queue_id);
 219 void cnxk_sso_port_def_conf(struct rte_eventdev *event_dev, uint8_t port_id,
 220                             struct rte_event_port_conf *port_conf);
 221 int cnxk_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
 222                         cnxk_sso_hws_setup_t hws_setup_fn);
 223 int cnxk_sso_timeout_ticks(struct rte_eventdev *event_dev, uint64_t ns,
 224                            uint64_t *tmo_ticks);
 225 int cnxk_sso_start(struct rte_eventdev *event_dev,
 226                    cnxk_sso_hws_reset_t reset_fn,
 227                    cnxk_sso_hws_flush_t flush_fn);
 228 void cnxk_sso_stop(struct rte_eventdev *event_dev,
 229                    cnxk_sso_hws_reset_t reset_fn,
 230                    cnxk_sso_hws_flush_t flush_fn);
 231 int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn);
 232 int cnxk_sso_selftest(const char *dev_name);
 233 void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f);
 234
 235 /* Stats API. */
 236 int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev,
 237                               enum rte_event_dev_xstats_mode mode,
 238                               uint8_t queue_port_id,
 239                               struct rte_event_dev_xstats_name *xstats_names,
 240                               unsigned int *ids, unsigned int size);
 241 int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev,
 242                         enum rte_event_dev_xstats_mode mode,
 243                         uint8_t queue_port_id, const unsigned int ids[],
 244                         uint64_t values[], unsigned int n);
 245 int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev,
 246                           enum rte_event_dev_xstats_mode mode,
 247                           int16_t queue_port_id, const uint32_t ids[],
 248                           uint32_t n);
 249
 250 /* CN9K */
 251 void cn9k_sso_set_rsrc(void *arg);
 252
 253 #endif /* __CNXK_EVENTDEV_H__ */