502da272d8b96a52229981d47c74a68cdf67f092
[dpdk.git] / drivers / event / cnxk / cnxk_eventdev_adptr.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2021 Marvell.
3  */
4
5 #include "cnxk_ethdev.h"
6 #include "cnxk_eventdev.h"
7
8 void
9 cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,
10                       uint32_t event_type)
11 {
12         int i;
13
14         switch (event_type) {
15         case RTE_EVENT_TYPE_ETHDEV: {
16                 struct cnxk_eth_rxq_sp *rxq = data;
17                 uint64_t *old_ptr;
18
19                 for (i = 0; i < dev->rx_adptr_pool_cnt; i++) {
20                         if ((uint64_t)rxq->qconf.mp == dev->rx_adptr_pools[i])
21                                 return;
22                 }
23
24                 dev->rx_adptr_pool_cnt++;
25                 old_ptr = dev->rx_adptr_pools;
26                 dev->rx_adptr_pools = rte_realloc(
27                         dev->rx_adptr_pools,
28                         sizeof(uint64_t) * dev->rx_adptr_pool_cnt, 0);
29                 if (dev->rx_adptr_pools == NULL) {
30                         dev->adptr_xae_cnt += rxq->qconf.mp->size;
31                         dev->rx_adptr_pools = old_ptr;
32                         dev->rx_adptr_pool_cnt--;
33                         return;
34                 }
35                 dev->rx_adptr_pools[dev->rx_adptr_pool_cnt - 1] =
36                         (uint64_t)rxq->qconf.mp;
37
38                 dev->adptr_xae_cnt += rxq->qconf.mp->size;
39                 break;
40         }
41         case RTE_EVENT_TYPE_TIMER: {
42                 struct cnxk_tim_ring *timr = data;
43                 uint16_t *old_ring_ptr;
44                 uint64_t *old_sz_ptr;
45
46                 for (i = 0; i < dev->tim_adptr_ring_cnt; i++) {
47                         if (timr->ring_id != dev->timer_adptr_rings[i])
48                                 continue;
49                         if (timr->nb_timers == dev->timer_adptr_sz[i])
50                                 return;
51                         dev->adptr_xae_cnt -= dev->timer_adptr_sz[i];
52                         dev->adptr_xae_cnt += timr->nb_timers;
53                         dev->timer_adptr_sz[i] = timr->nb_timers;
54
55                         return;
56                 }
57
58                 dev->tim_adptr_ring_cnt++;
59                 old_ring_ptr = dev->timer_adptr_rings;
60                 old_sz_ptr = dev->timer_adptr_sz;
61
62                 dev->timer_adptr_rings = rte_realloc(
63                         dev->timer_adptr_rings,
64                         sizeof(uint16_t) * dev->tim_adptr_ring_cnt, 0);
65                 if (dev->timer_adptr_rings == NULL) {
66                         dev->adptr_xae_cnt += timr->nb_timers;
67                         dev->timer_adptr_rings = old_ring_ptr;
68                         dev->tim_adptr_ring_cnt--;
69                         return;
70                 }
71
72                 dev->timer_adptr_sz = rte_realloc(
73                         dev->timer_adptr_sz,
74                         sizeof(uint64_t) * dev->tim_adptr_ring_cnt, 0);
75
76                 if (dev->timer_adptr_sz == NULL) {
77                         dev->adptr_xae_cnt += timr->nb_timers;
78                         dev->timer_adptr_sz = old_sz_ptr;
79                         dev->tim_adptr_ring_cnt--;
80                         return;
81                 }
82
83                 dev->timer_adptr_rings[dev->tim_adptr_ring_cnt - 1] =
84                         timr->ring_id;
85                 dev->timer_adptr_sz[dev->tim_adptr_ring_cnt - 1] =
86                         timr->nb_timers;
87
88                 dev->adptr_xae_cnt += timr->nb_timers;
89                 break;
90         }
91         default:
92                 break;
93         }
94 }
95
96 static int
97 cnxk_sso_rxq_enable(struct cnxk_eth_dev *cnxk_eth_dev, uint16_t rq_id,
98                     uint16_t port_id, const struct rte_event *ev,
99                     uint8_t custom_flowid)
100 {
101         struct roc_nix_rq *rq;
102
103         rq = &cnxk_eth_dev->rqs[rq_id];
104         rq->sso_ena = 1;
105         rq->tt = ev->sched_type;
106         rq->hwgrp = ev->queue_id;
107         rq->flow_tag_width = 20;
108         rq->wqe_skip = 1;
109         rq->tag_mask = (port_id & 0xF) << 20;
110         rq->tag_mask |= (((port_id >> 4) & 0xF) | (RTE_EVENT_TYPE_ETHDEV << 4))
111                         << 24;
112
113         if (custom_flowid) {
114                 rq->flow_tag_width = 0;
115                 rq->tag_mask |= ev->flow_id;
116         }
117
118         return roc_nix_rq_modify(&cnxk_eth_dev->nix, rq, 0);
119 }
120
121 static int
122 cnxk_sso_rxq_disable(struct cnxk_eth_dev *cnxk_eth_dev, uint16_t rq_id)
123 {
124         struct roc_nix_rq *rq;
125
126         rq = &cnxk_eth_dev->rqs[rq_id];
127         rq->sso_ena = 0;
128         rq->flow_tag_width = 32;
129         rq->tag_mask = 0;
130
131         return roc_nix_rq_modify(&cnxk_eth_dev->nix, rq, 0);
132 }
133
134 int
135 cnxk_sso_rx_adapter_queue_add(
136         const struct rte_eventdev *event_dev, const struct rte_eth_dev *eth_dev,
137         int32_t rx_queue_id,
138         const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
139 {
140         struct cnxk_eth_dev *cnxk_eth_dev = eth_dev->data->dev_private;
141         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
142         uint16_t port = eth_dev->data->port_id;
143         struct cnxk_eth_rxq_sp *rxq_sp;
144         int i, rc = 0;
145
146         if (rx_queue_id < 0) {
147                 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
148                         rc |= cnxk_sso_rx_adapter_queue_add(event_dev, eth_dev,
149                                                             i, queue_conf);
150         } else {
151                 rxq_sp = cnxk_eth_rxq_to_sp(
152                         eth_dev->data->rx_queues[rx_queue_id]);
153                 cnxk_sso_updt_xae_cnt(dev, rxq_sp, RTE_EVENT_TYPE_ETHDEV);
154                 rc = cnxk_sso_xae_reconfigure(
155                         (struct rte_eventdev *)(uintptr_t)event_dev);
156                 rc |= cnxk_sso_rxq_enable(
157                         cnxk_eth_dev, (uint16_t)rx_queue_id, port,
158                         &queue_conf->ev,
159                         !!(queue_conf->rx_queue_flags &
160                            RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID));
161                 rox_nix_fc_npa_bp_cfg(&cnxk_eth_dev->nix,
162                                       rxq_sp->qconf.mp->pool_id, true,
163                                       dev->force_ena_bp);
164         }
165
166         if (rc < 0) {
167                 plt_err("Failed to configure Rx adapter port=%d, q=%d", port,
168                         queue_conf->ev.queue_id);
169                 return rc;
170         }
171
172         dev->rx_offloads |= cnxk_eth_dev->rx_offload_flags;
173
174         return 0;
175 }
176
177 int
178 cnxk_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
179                               const struct rte_eth_dev *eth_dev,
180                               int32_t rx_queue_id)
181 {
182         struct cnxk_eth_dev *cnxk_eth_dev = eth_dev->data->dev_private;
183         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
184         struct cnxk_eth_rxq_sp *rxq_sp;
185         int i, rc = 0;
186
187         RTE_SET_USED(event_dev);
188         if (rx_queue_id < 0) {
189                 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
190                         cnxk_sso_rx_adapter_queue_del(event_dev, eth_dev, i);
191         } else {
192                 rxq_sp = cnxk_eth_rxq_to_sp(
193                         eth_dev->data->rx_queues[rx_queue_id]);
194                 rc = cnxk_sso_rxq_disable(cnxk_eth_dev, (uint16_t)rx_queue_id);
195                 rox_nix_fc_npa_bp_cfg(&cnxk_eth_dev->nix,
196                                       rxq_sp->qconf.mp->pool_id, false,
197                                       dev->force_ena_bp);
198         }
199
200         if (rc < 0)
201                 plt_err("Failed to clear Rx adapter config port=%d, q=%d",
202                         eth_dev->data->port_id, rx_queue_id);
203
204         return rc;
205 }
206
207 int
208 cnxk_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
209                           const struct rte_eth_dev *eth_dev)
210 {
211         RTE_SET_USED(event_dev);
212         RTE_SET_USED(eth_dev);
213
214         return 0;
215 }
216
217 int
218 cnxk_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
219                          const struct rte_eth_dev *eth_dev)
220 {
221         RTE_SET_USED(event_dev);
222         RTE_SET_USED(eth_dev);
223
224         return 0;
225 }
226
227 static int
228 cnxk_sso_sqb_aura_limit_edit(struct roc_nix_sq *sq, uint16_t nb_sqb_bufs)
229 {
230         return roc_npa_aura_limit_modify(
231                 sq->aura_handle, RTE_MIN(nb_sqb_bufs, sq->aura_sqb_bufs));
232 }
233
234 static int
235 cnxk_sso_updt_tx_queue_data(const struct rte_eventdev *event_dev,
236                             uint16_t eth_port_id, uint16_t tx_queue_id,
237                             void *txq)
238 {
239         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
240         uint16_t max_port_id = dev->max_port_id;
241         uint64_t *txq_data = dev->tx_adptr_data;
242
243         if (txq_data == NULL || eth_port_id > max_port_id) {
244                 max_port_id = RTE_MAX(max_port_id, eth_port_id);
245                 txq_data = rte_realloc_socket(
246                         txq_data,
247                         (sizeof(uint64_t) * (max_port_id + 1) *
248                          RTE_MAX_QUEUES_PER_PORT),
249                         RTE_CACHE_LINE_SIZE, event_dev->data->socket_id);
250                 if (txq_data == NULL)
251                         return -ENOMEM;
252         }
253
254         ((uint64_t(*)[RTE_MAX_QUEUES_PER_PORT])
255                  txq_data)[eth_port_id][tx_queue_id] = (uint64_t)txq;
256         dev->max_port_id = max_port_id;
257         dev->tx_adptr_data = txq_data;
258         return 0;
259 }
260
261 int
262 cnxk_sso_tx_adapter_queue_add(const struct rte_eventdev *event_dev,
263                               const struct rte_eth_dev *eth_dev,
264                               int32_t tx_queue_id)
265 {
266         struct cnxk_eth_dev *cnxk_eth_dev = eth_dev->data->dev_private;
267         struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);
268         struct roc_nix_sq *sq;
269         int i, ret;
270         void *txq;
271
272         if (tx_queue_id < 0) {
273                 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
274                         cnxk_sso_tx_adapter_queue_add(event_dev, eth_dev, i);
275         } else {
276                 txq = eth_dev->data->tx_queues[tx_queue_id];
277                 sq = &cnxk_eth_dev->sqs[tx_queue_id];
278                 cnxk_sso_sqb_aura_limit_edit(sq, CNXK_SSO_SQB_LIMIT);
279                 ret = cnxk_sso_updt_tx_queue_data(
280                         event_dev, eth_dev->data->port_id, tx_queue_id, txq);
281                 if (ret < 0)
282                         return ret;
283
284                 dev->tx_offloads |= cnxk_eth_dev->tx_offload_flags;
285         }
286
287         return 0;
288 }
289
290 int
291 cnxk_sso_tx_adapter_queue_del(const struct rte_eventdev *event_dev,
292                               const struct rte_eth_dev *eth_dev,
293                               int32_t tx_queue_id)
294 {
295         struct cnxk_eth_dev *cnxk_eth_dev = eth_dev->data->dev_private;
296         struct roc_nix_sq *sq;
297         int i, ret;
298
299         RTE_SET_USED(event_dev);
300         if (tx_queue_id < 0) {
301                 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
302                         cnxk_sso_tx_adapter_queue_del(event_dev, eth_dev, i);
303         } else {
304                 sq = &cnxk_eth_dev->sqs[tx_queue_id];
305                 cnxk_sso_sqb_aura_limit_edit(sq, sq->nb_sqb_bufs);
306                 ret = cnxk_sso_updt_tx_queue_data(
307                         event_dev, eth_dev->data->port_id, tx_queue_id, NULL);
308                 if (ret < 0)
309                         return ret;
310         }
311
312         return 0;
313 }