drivers/event/cnxk/cnxk_tim_evdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2021 Marvell.
   3  */
   4
   5 #include "cnxk_eventdev.h"
   6 #include "cnxk_tim_evdev.h"
   7
   8 static struct rte_event_timer_adapter_ops cnxk_tim_ops;
   9
  10 static int
  11 cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring,
  12                           struct rte_event_timer_adapter_conf *rcfg)
  13 {
  14         unsigned int cache_sz = (tim_ring->nb_chunks / 1.5);
  15         unsigned int mp_flags = 0;
  16         char pool_name[25];
  17         int rc;
  18
  19         cache_sz /= rte_lcore_count();
  20         /* Create chunk pool. */
  21         if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_SP_PUT) {
  22                 mp_flags = MEMPOOL_F_SP_PUT | MEMPOOL_F_SC_GET;
  23                 plt_tim_dbg("Using single producer mode");
  24                 tim_ring->prod_type_sp = true;
  25         }
  26
  27         snprintf(pool_name, sizeof(pool_name), "cnxk_tim_chunk_pool%d",
  28                  tim_ring->ring_id);
  29
  30         if (cache_sz > RTE_MEMPOOL_CACHE_MAX_SIZE)
  31                 cache_sz = RTE_MEMPOOL_CACHE_MAX_SIZE;
  32         cache_sz = cache_sz != 0 ? cache_sz : 2;
  33         tim_ring->nb_chunks += (cache_sz * rte_lcore_count());
  34         if (!tim_ring->disable_npa) {
  35                 tim_ring->chunk_pool = rte_mempool_create_empty(
  36                         pool_name, tim_ring->nb_chunks, tim_ring->chunk_sz,
  37                         cache_sz, 0, rte_socket_id(), mp_flags);
  38
  39                 if (tim_ring->chunk_pool == NULL) {
  40                         plt_err("Unable to create chunkpool.");
  41                         return -ENOMEM;
  42                 }
  43
  44                 rc = rte_mempool_set_ops_byname(tim_ring->chunk_pool,
  45                                                 rte_mbuf_platform_mempool_ops(),
  46                                                 NULL);
  47                 if (rc < 0) {
  48                         plt_err("Unable to set chunkpool ops");
  49                         goto free;
  50                 }
  51
  52                 rc = rte_mempool_populate_default(tim_ring->chunk_pool);
  53                 if (rc < 0) {
  54                         plt_err("Unable to set populate chunkpool.");
  55                         goto free;
  56                 }
  57                 tim_ring->aura = roc_npa_aura_handle_to_aura(
  58                         tim_ring->chunk_pool->pool_id);
  59                 tim_ring->ena_dfb = 0;
  60         } else {
  61                 tim_ring->chunk_pool = rte_mempool_create(
  62                         pool_name, tim_ring->nb_chunks, tim_ring->chunk_sz,
  63                         cache_sz, 0, NULL, NULL, NULL, NULL, rte_socket_id(),
  64                         mp_flags);
  65                 if (tim_ring->chunk_pool == NULL) {
  66                         plt_err("Unable to create chunkpool.");
  67                         return -ENOMEM;
  68                 }
  69                 tim_ring->ena_dfb = 1;
  70         }
  71
  72         return 0;
  73
  74 free:
  75         rte_mempool_free(tim_ring->chunk_pool);
  76         return rc;
  77 }
  78
  79 static void
  80 cnxk_tim_ring_info_get(const struct rte_event_timer_adapter *adptr,
  81                        struct rte_event_timer_adapter_info *adptr_info)
  82 {
  83         struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;
  84
  85         adptr_info->max_tmo_ns = tim_ring->max_tout;
  86         adptr_info->min_resolution_ns = tim_ring->tck_nsec;
  87         rte_memcpy(&adptr_info->conf, &adptr->data->conf,
  88                    sizeof(struct rte_event_timer_adapter_conf));
  89 }
  90
  91 static int
  92 cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr)
  93 {
  94         struct rte_event_timer_adapter_conf *rcfg = &adptr->data->conf;
  95         struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
  96         struct cnxk_tim_ring *tim_ring;
  97         int rc;
  98
  99         if (dev == NULL)
 100                 return -ENODEV;
 101
 102         if (adptr->data->id >= dev->nb_rings)
 103                 return -ENODEV;
 104
 105         tim_ring = rte_zmalloc("cnxk_tim_prv", sizeof(struct cnxk_tim_ring), 0);
 106         if (tim_ring == NULL)
 107                 return -ENOMEM;
 108
 109         rc = roc_tim_lf_alloc(&dev->tim, adptr->data->id, NULL);
 110         if (rc < 0) {
 111                 plt_err("Failed to create timer ring");
 112                 goto tim_ring_free;
 113         }
 114
 115         if (NSEC2TICK(RTE_ALIGN_MUL_CEIL(
 116                               rcfg->timer_tick_ns,
 117                               cnxk_tim_min_resolution_ns(cnxk_tim_cntfrq())),
 118                       cnxk_tim_cntfrq()) <
 119             cnxk_tim_min_tmo_ticks(cnxk_tim_cntfrq())) {
 120                 if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES)
 121                         rcfg->timer_tick_ns = TICK2NSEC(
 122                                 cnxk_tim_min_tmo_ticks(cnxk_tim_cntfrq()),
 123                                 cnxk_tim_cntfrq());
 124                 else {
 125                         rc = -ERANGE;
 126                         goto tim_hw_free;
 127                 }
 128         }
 129         tim_ring->ring_id = adptr->data->id;
 130         tim_ring->clk_src = (int)rcfg->clk_src;
 131         tim_ring->tck_nsec = RTE_ALIGN_MUL_CEIL(
 132                 rcfg->timer_tick_ns,
 133                 cnxk_tim_min_resolution_ns(cnxk_tim_cntfrq()));
 134         tim_ring->max_tout = rcfg->max_tmo_ns;
 135         tim_ring->nb_bkts = (tim_ring->max_tout / tim_ring->tck_nsec);
 136         tim_ring->nb_timers = rcfg->nb_timers;
 137         tim_ring->chunk_sz = dev->chunk_sz;
 138         tim_ring->disable_npa = dev->disable_npa;
 139
 140         if (tim_ring->disable_npa) {
 141                 tim_ring->nb_chunks =
 142                         tim_ring->nb_timers /
 143                         CNXK_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
 144                 tim_ring->nb_chunks = tim_ring->nb_chunks * tim_ring->nb_bkts;
 145         } else {
 146                 tim_ring->nb_chunks = tim_ring->nb_timers;
 147         }
 148
 149         tim_ring->nb_chunk_slots = CNXK_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz);
 150         /* Create buckets. */
 151         tim_ring->bkt =
 152                 rte_zmalloc("cnxk_tim_bucket",
 153                             (tim_ring->nb_bkts) * sizeof(struct cnxk_tim_bkt),
 154                             RTE_CACHE_LINE_SIZE);
 155         if (tim_ring->bkt == NULL)
 156                 goto tim_hw_free;
 157
 158         rc = cnxk_tim_chnk_pool_create(tim_ring, rcfg);
 159         if (rc < 0)
 160                 goto tim_bkt_free;
 161
 162         rc = roc_tim_lf_config(
 163                 &dev->tim, tim_ring->ring_id,
 164                 cnxk_tim_convert_clk_src(tim_ring->clk_src), 0, 0,
 165                 tim_ring->nb_bkts, tim_ring->chunk_sz,
 166                 NSEC2TICK(tim_ring->tck_nsec, cnxk_tim_cntfrq()));
 167         if (rc < 0) {
 168                 plt_err("Failed to configure timer ring");
 169                 goto tim_chnk_free;
 170         }
 171
 172         tim_ring->base = roc_tim_lf_base_get(&dev->tim, tim_ring->ring_id);
 173         plt_write64((uint64_t)tim_ring->bkt, tim_ring->base + TIM_LF_RING_BASE);
 174         plt_write64(tim_ring->aura, tim_ring->base + TIM_LF_RING_AURA);
 175
 176         /* Update SSO xae count. */
 177         cnxk_sso_updt_xae_cnt(cnxk_sso_pmd_priv(dev->event_dev), tim_ring,
 178                               RTE_EVENT_TYPE_TIMER);
 179         cnxk_sso_xae_reconfigure(dev->event_dev);
 180
 181         plt_tim_dbg(
 182                 "Total memory used %" PRIu64 "MB\n",
 183                 (uint64_t)(((tim_ring->nb_chunks * tim_ring->chunk_sz) +
 184                             (tim_ring->nb_bkts * sizeof(struct cnxk_tim_bkt))) /
 185                            BIT_ULL(20)));
 186
 187         adptr->data->adapter_priv = tim_ring;
 188         return rc;
 189
 190 tim_chnk_free:
 191         rte_mempool_free(tim_ring->chunk_pool);
 192 tim_bkt_free:
 193         rte_free(tim_ring->bkt);
 194 tim_hw_free:
 195         roc_tim_lf_free(&dev->tim, tim_ring->ring_id);
 196 tim_ring_free:
 197         rte_free(tim_ring);
 198         return rc;
 199 }
 200
 201 static int
 202 cnxk_tim_ring_free(struct rte_event_timer_adapter *adptr)
 203 {
 204         struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;
 205         struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
 206
 207         if (dev == NULL)
 208                 return -ENODEV;
 209
 210         roc_tim_lf_free(&dev->tim, tim_ring->ring_id);
 211         rte_free(tim_ring->bkt);
 212         rte_mempool_free(tim_ring->chunk_pool);
 213         rte_free(tim_ring);
 214
 215         return 0;
 216 }
 217
 218 int
 219 cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,
 220                   uint32_t *caps,
 221                   const struct rte_event_timer_adapter_ops **ops)
 222 {
 223         struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
 224
 225         RTE_SET_USED(flags);
 226         RTE_SET_USED(ops);
 227
 228         if (dev == NULL)
 229                 return -ENODEV;
 230
 231         cnxk_tim_ops.init = cnxk_tim_ring_create;
 232         cnxk_tim_ops.uninit = cnxk_tim_ring_free;
 233         cnxk_tim_ops.get_info = cnxk_tim_ring_info_get;
 234
 235         /* Store evdev pointer for later use. */
 236         dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev;
 237         *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;
 238
 239         return 0;
 240 }
 241
 242 static void
 243 cnxk_tim_parse_devargs(struct rte_devargs *devargs, struct cnxk_tim_evdev *dev)
 244 {
 245         struct rte_kvargs *kvlist;
 246
 247         if (devargs == NULL)
 248                 return;
 249
 250         kvlist = rte_kvargs_parse(devargs->args, NULL);
 251         if (kvlist == NULL)
 252                 return;
 253
 254         rte_kvargs_process(kvlist, CNXK_TIM_DISABLE_NPA, &parse_kvargs_flag,
 255                            &dev->disable_npa);
 256
 257         rte_kvargs_free(kvlist);
 258 }
 259
 260 void
 261 cnxk_tim_init(struct roc_sso *sso)
 262 {
 263         const struct rte_memzone *mz;
 264         struct cnxk_tim_evdev *dev;
 265         int rc;
 266
 267         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 268                 return;
 269
 270         mz = rte_memzone_reserve(RTE_STR(CNXK_TIM_EVDEV_NAME),
 271                                  sizeof(struct cnxk_tim_evdev), 0, 0);
 272         if (mz == NULL) {
 273                 plt_tim_dbg("Unable to allocate memory for TIM Event device");
 274                 return;
 275         }
 276         dev = mz->addr;
 277
 278         cnxk_tim_parse_devargs(sso->pci_dev->device.devargs, dev);
 279
 280         dev->tim.roc_sso = sso;
 281         rc = roc_tim_init(&dev->tim);
 282         if (rc < 0) {
 283                 plt_err("Failed to initialize roc tim resources");
 284                 rte_memzone_free(mz);
 285                 return;
 286         }
 287         dev->nb_rings = rc;
 288         dev->chunk_sz = CNXK_TIM_RING_DEF_CHUNK_SZ;
 289 }
 290
 291 void
 292 cnxk_tim_fini(void)
 293 {
 294         struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
 295
 296         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 297                 return;
 298
 299         roc_tim_fini(&dev->tim);
 300         rte_memzone_free(rte_memzone_lookup(RTE_STR(CNXK_TIM_EVDEV_NAME)));
 301 }