1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2016-2020 Intel Corporation
15 #include <rte_debug.h>
18 #include <rte_devargs.h>
21 #include <rte_errno.h>
22 #include <rte_kvargs.h>
23 #include <rte_malloc.h>
24 #include <rte_cycles.h>
27 #include <rte_bus_pci.h>
28 #include <rte_eventdev.h>
29 #include <rte_eventdev_pmd.h>
30 #include <rte_eventdev_pmd_pci.h>
31 #include <rte_memory.h>
32 #include <rte_string_fns.h>
34 #include "../dlb2_priv.h"
35 #include "../dlb2_iface.h"
36 #include "../dlb2_inline_fns.h"
37 #include "dlb2_main.h"
38 #include "base/dlb2_hw_types.h"
39 #include "base/dlb2_osdep.h"
40 #include "base/dlb2_resource.h"
42 static const char *event_dlb2_pf_name = RTE_STR(EVDEV_DLB2_NAME_PMD);
45 dlb2_pf_low_level_io_init(void)
48 /* Addresses will be initialized at port create */
49 for (i = 0; i < DLB2_MAX_NUM_PORTS; i++) {
50 /* First directed ports */
51 dlb2_port[i][DLB2_DIR_PORT].pp_addr = NULL;
52 dlb2_port[i][DLB2_DIR_PORT].cq_base = NULL;
53 dlb2_port[i][DLB2_DIR_PORT].mmaped = true;
55 /* Now load balanced ports */
56 dlb2_port[i][DLB2_LDB_PORT].pp_addr = NULL;
57 dlb2_port[i][DLB2_LDB_PORT].cq_base = NULL;
58 dlb2_port[i][DLB2_LDB_PORT].mmaped = true;
63 dlb2_pf_open(struct dlb2_hw_dev *handle, const char *name)
72 dlb2_pf_get_device_version(struct dlb2_hw_dev *handle,
75 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
77 *revision = dlb2_dev->revision;
83 dlb2_pf_hardware_init(struct dlb2_hw_dev *handle)
85 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
87 dlb2_hw_enable_sparse_ldb_cq_mode(&dlb2_dev->hw);
88 dlb2_hw_enable_sparse_dir_cq_mode(&dlb2_dev->hw);
92 dlb2_pf_get_num_resources(struct dlb2_hw_dev *handle,
93 struct dlb2_get_num_resources_args *rsrcs)
95 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
97 return dlb2_hw_get_num_resources(&dlb2_dev->hw, rsrcs, false, 0);
101 dlb2_pf_get_cq_poll_mode(struct dlb2_hw_dev *handle,
102 enum dlb2_cq_poll_modes *mode)
104 RTE_SET_USED(handle);
106 *mode = DLB2_CQ_POLL_MODE_SPARSE;
112 dlb2_pf_sched_domain_create(struct dlb2_hw_dev *handle,
113 struct dlb2_create_sched_domain_args *arg)
115 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
116 struct dlb2_cmd_response response = {0};
119 DLB2_INFO(dev->dlb2_device, "Entering %s()\n", __func__);
121 if (dlb2_dev->domain_reset_failed) {
122 response.status = DLB2_ST_DOMAIN_RESET_FAILED;
127 ret = dlb2_pf_create_sched_domain(&dlb2_dev->hw, arg, &response);
133 arg->response = response;
135 DLB2_INFO(dev->dlb2_device, "Exiting %s() with ret=%d\n",
142 dlb2_pf_domain_reset(struct dlb2_eventdev *dlb2)
144 struct dlb2_dev *dlb2_dev;
147 dlb2_dev = (struct dlb2_dev *)dlb2->qm_instance.pf_dev;
148 ret = dlb2_pf_reset_domain(&dlb2_dev->hw, dlb2->qm_instance.domain_id);
150 DLB2_LOG_ERR("dlb2_pf_reset_domain err %d", ret);
154 dlb2_pf_ldb_queue_create(struct dlb2_hw_dev *handle,
155 struct dlb2_create_ldb_queue_args *cfg)
157 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
158 struct dlb2_cmd_response response = {0};
161 DLB2_INFO(dev->dlb2_device, "Entering %s()\n", __func__);
163 ret = dlb2_pf_create_ldb_queue(&dlb2_dev->hw,
168 cfg->response = response;
170 DLB2_INFO(dev->dlb2_device, "Exiting %s() with ret=%d\n",
177 dlb2_pf_get_sn_occupancy(struct dlb2_hw_dev *handle,
178 struct dlb2_get_sn_occupancy_args *args)
180 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
181 struct dlb2_cmd_response response = {0};
184 ret = dlb2_get_group_sequence_number_occupancy(&dlb2_dev->hw,
190 args->response = response;
196 dlb2_pf_get_sn_allocation(struct dlb2_hw_dev *handle,
197 struct dlb2_get_sn_allocation_args *args)
199 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
200 struct dlb2_cmd_response response = {0};
203 ret = dlb2_get_group_sequence_numbers(&dlb2_dev->hw, args->group);
208 args->response = response;
214 dlb2_pf_set_sn_allocation(struct dlb2_hw_dev *handle,
215 struct dlb2_set_sn_allocation_args *args)
217 struct dlb2_dev *dlb2_dev = (struct dlb2_dev *)handle->pf_dev;
218 struct dlb2_cmd_response response = {0};
221 ret = dlb2_set_group_sequence_numbers(&dlb2_dev->hw, args->group,
226 args->response = response;
232 dlb2_pf_iface_fn_ptrs_init(void)
234 dlb2_iface_low_level_io_init = dlb2_pf_low_level_io_init;
235 dlb2_iface_open = dlb2_pf_open;
236 dlb2_iface_domain_reset = dlb2_pf_domain_reset;
237 dlb2_iface_get_device_version = dlb2_pf_get_device_version;
238 dlb2_iface_hardware_init = dlb2_pf_hardware_init;
239 dlb2_iface_get_num_resources = dlb2_pf_get_num_resources;
240 dlb2_iface_get_cq_poll_mode = dlb2_pf_get_cq_poll_mode;
241 dlb2_iface_sched_domain_create = dlb2_pf_sched_domain_create;
242 dlb2_iface_ldb_queue_create = dlb2_pf_ldb_queue_create;
243 dlb2_iface_get_sn_allocation = dlb2_pf_get_sn_allocation;
244 dlb2_iface_set_sn_allocation = dlb2_pf_set_sn_allocation;
245 dlb2_iface_get_sn_occupancy = dlb2_pf_get_sn_occupancy;
250 dlb2_eventdev_pci_init(struct rte_eventdev *eventdev)
253 struct rte_pci_device *pci_dev;
254 struct dlb2_devargs dlb2_args = {
255 .socket_id = rte_socket_id(),
256 .max_num_events = DLB2_MAX_NUM_LDB_CREDITS,
257 .num_dir_credits_override = -1,
258 .qid_depth_thresholds = { {0} },
259 .cos_id = DLB2_COS_DEFAULT
261 struct dlb2_eventdev *dlb2;
263 DLB2_LOG_DBG("Enter with dev_id=%d socket_id=%d",
264 eventdev->data->dev_id, eventdev->data->socket_id);
266 dlb2_pf_iface_fn_ptrs_init();
268 pci_dev = RTE_DEV_TO_PCI(eventdev->dev);
270 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
271 dlb2 = dlb2_pmd_priv(eventdev); /* rte_zmalloc_socket mem */
273 /* Probe the DLB2 PF layer */
274 dlb2->qm_instance.pf_dev = dlb2_probe(pci_dev);
276 if (dlb2->qm_instance.pf_dev == NULL) {
277 DLB2_LOG_ERR("DLB2 PF Probe failed with error %d\n",
280 goto dlb2_probe_failed;
283 /* Were we invoked with runtime parameters? */
284 if (pci_dev->device.devargs) {
285 ret = dlb2_parse_params(pci_dev->device.devargs->args,
286 pci_dev->device.devargs->name,
289 DLB2_LOG_ERR("PFPMD failed to parse args ret=%d, errno=%d\n",
291 goto dlb2_probe_failed;
295 ret = dlb2_primary_eventdev_probe(eventdev,
299 ret = dlb2_secondary_eventdev_probe(eventdev,
303 goto dlb2_probe_failed;
305 DLB2_LOG_INFO("DLB2 PF Probe success\n");
311 DLB2_LOG_INFO("DLB2 PF Probe failed, ret=%d\n", ret);
316 #define EVENTDEV_INTEL_VENDOR_ID 0x8086
318 static const struct rte_pci_id pci_id_dlb2_map[] = {
320 RTE_PCI_DEVICE(EVENTDEV_INTEL_VENDOR_ID,
321 PCI_DEVICE_ID_INTEL_DLB2_PF)
329 event_dlb2_pci_probe(struct rte_pci_driver *pci_drv,
330 struct rte_pci_device *pci_dev)
334 ret = rte_event_pmd_pci_probe_named(pci_drv, pci_dev,
335 sizeof(struct dlb2_eventdev),
336 dlb2_eventdev_pci_init,
339 DLB2_LOG_INFO("rte_event_pmd_pci_probe_named() failed, "
347 event_dlb2_pci_remove(struct rte_pci_device *pci_dev)
351 ret = rte_event_pmd_pci_remove(pci_dev, NULL);
354 DLB2_LOG_INFO("rte_event_pmd_pci_remove() failed, "
362 static struct rte_pci_driver pci_eventdev_dlb2_pmd = {
363 .id_table = pci_id_dlb2_map,
364 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
365 .probe = event_dlb2_pci_probe,
366 .remove = event_dlb2_pci_remove,
369 RTE_PMD_REGISTER_PCI(event_dlb2_pf, pci_eventdev_dlb2_pmd);
370 RTE_PMD_REGISTER_PCI_TABLE(event_dlb2_pf, pci_id_dlb2_map);