drivers/event/dpaa2/dpaa2_eventdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright 2017 NXP.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of NXP nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <assert.h>
  34 #include <stdio.h>
  35 #include <stdbool.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <sys/epoll.h>
  40
  41 #include <rte_atomic.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_debug.h>
  45 #include <rte_dev.h>
  46 #include <rte_eal.h>
  47 #include <rte_fslmc.h>
  48 #include <rte_lcore.h>
  49 #include <rte_log.h>
  50 #include <rte_malloc.h>
  51 #include <rte_memcpy.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_pci.h>
  55 #include <rte_vdev.h>
  56
  57 #include <fslmc_vfio.h>
  58 #include <dpaa2_hw_pvt.h>
  59 #include <dpaa2_hw_mempool.h>
  60 #include <dpaa2_hw_dpio.h>
  61 #include "dpaa2_eventdev.h"
  62 #include <portal/dpaa2_hw_pvt.h>
  63 #include <mc/fsl_dpci.h>
  64
  65 /* Clarifications
  66  * Evendev = SoC Instance
  67  * Eventport = DPIO Instance
  68  * Eventqueue = DPCON Instance
  69  * 1 Eventdev can have N Eventqueue
  70  * Soft Event Flow is DPCI Instance
  71  */
  72
  73 static uint16_t
  74 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
  75                              uint16_t nb_events)
  76 {
  77         struct rte_eventdev *ev_dev =
  78                         ((struct dpaa2_io_portal_t *)port)->eventdev;
  79         struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
  80         uint32_t queue_id = ev[0].queue_id;
  81         struct evq_info_t *evq_info = &priv->evq_info[queue_id];
  82         uint32_t fqid;
  83         struct qbman_swp *swp;
  84         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
  85         uint32_t loop, frames_to_send;
  86         struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
  87         uint16_t num_tx = 0;
  88         int ret;
  89
  90         RTE_SET_USED(port);
  91
  92         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
  93                 ret = dpaa2_affine_qbman_swp();
  94                 if (ret) {
  95                         PMD_DRV_LOG(ERR, "Failure in affining portal\n");
  96                         return 0;
  97                 }
  98         }
  99
 100         swp = DPAA2_PER_LCORE_PORTAL;
 101
 102         while (nb_events) {
 103                 frames_to_send = (nb_events >> 3) ?
 104                         MAX_TX_RING_SLOTS : nb_events;
 105
 106                 for (loop = 0; loop < frames_to_send; loop++) {
 107                         const struct rte_event *event = &ev[num_tx + loop];
 108
 109                         if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
 110                                 fqid = evq_info->dpci->queue[
 111                                         DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
 112                         else
 113                                 fqid = evq_info->dpci->queue[
 114                                         DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
 115
 116                         /* Prepare enqueue descriptor */
 117                         qbman_eq_desc_clear(&eqdesc[loop]);
 118                         qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
 119                         qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
 120                         qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
 121
 122                         if (event->impl_opaque) {
 123                                 uint8_t dqrr_index = event->impl_opaque - 1;
 124
 125                                 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
 126                                                       dqrr_index, 0);
 127                                 DPAA2_PER_LCORE_DPIO->dqrr_size--;
 128                                 DPAA2_PER_LCORE_DPIO->dqrr_held &=
 129                                         ~(1 << dqrr_index);
 130                         }
 131
 132                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 133
 134                         /*
 135                          * todo - need to align with hw context data
 136                          * to avoid copy
 137                          */
 138                         struct rte_event *ev_temp = rte_malloc(NULL,
 139                                 sizeof(struct rte_event), 0);
 140                         rte_memcpy(ev_temp, event, sizeof(struct rte_event));
 141                         DPAA2_SET_FD_ADDR((&fd_arr[loop]), ev_temp);
 142                         DPAA2_SET_FD_LEN((&fd_arr[loop]),
 143                                          sizeof(struct rte_event));
 144                 }
 145                 loop = 0;
 146                 while (loop < frames_to_send) {
 147                         loop += qbman_swp_enqueue_multiple_desc(swp,
 148                                         &eqdesc[loop], &fd_arr[loop],
 149                                         frames_to_send - loop);
 150                 }
 151                 num_tx += frames_to_send;
 152                 nb_events -= frames_to_send;
 153         }
 154
 155         return num_tx;
 156 }
 157
 158 static uint16_t
 159 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
 160 {
 161         return dpaa2_eventdev_enqueue_burst(port, ev, 1);
 162 }
 163
 164 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
 165 {
 166         struct epoll_event epoll_ev;
 167         int ret, i = 0;
 168
 169         qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
 170                                          QBMAN_SWP_INTERRUPT_DQRI);
 171
 172 RETRY:
 173         ret = epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
 174                          &epoll_ev, 1, timeout_ticks);
 175         if (ret < 1) {
 176                 /* sometimes due to some spurious interrupts epoll_wait fails
 177                  * with errno EINTR. so here we are retrying epoll_wait in such
 178                  * case to avoid the problem.
 179                  */
 180                 if (errno == EINTR) {
 181                         PMD_DRV_LOG(DEBUG, "epoll_wait fails\n");
 182                         if (i++ > 10)
 183                                 PMD_DRV_LOG(DEBUG, "Dequeue burst Failed\n");
 184                 goto RETRY;
 185                 }
 186         }
 187 }
 188
 189 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
 190                                             const struct qbman_fd *fd,
 191                                             const struct qbman_result *dq,
 192                                             struct dpaa2_queue *rxq,
 193                                             struct rte_event *ev)
 194 {
 195         struct rte_event *ev_temp =
 196                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 197
 198         RTE_SET_USED(rxq);
 199
 200         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 201         rte_free(ev_temp);
 202
 203         qbman_swp_dqrr_consume(swp, dq);
 204 }
 205
 206 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
 207                                           const struct qbman_fd *fd,
 208                                           const struct qbman_result *dq,
 209                                           struct dpaa2_queue *rxq,
 210                                           struct rte_event *ev)
 211 {
 212         struct rte_event *ev_temp =
 213                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 214         uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
 215
 216         RTE_SET_USED(swp);
 217         RTE_SET_USED(rxq);
 218
 219         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 220         rte_free(ev_temp);
 221         ev->impl_opaque = dqrr_index + 1;
 222         DPAA2_PER_LCORE_DPIO->dqrr_size++;
 223         DPAA2_PER_LCORE_DPIO->dqrr_held |= 1 << dqrr_index;
 224 }
 225
 226 static uint16_t
 227 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
 228                              uint16_t nb_events, uint64_t timeout_ticks)
 229 {
 230         const struct qbman_result *dq;
 231         struct qbman_swp *swp;
 232         const struct qbman_fd *fd;
 233         struct dpaa2_queue *rxq;
 234         int num_pkts = 0, ret, i = 0;
 235
 236         RTE_SET_USED(port);
 237
 238         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 239                 ret = dpaa2_affine_qbman_swp();
 240                 if (ret) {
 241                         PMD_DRV_LOG(ERR, "Failure in affining portal\n");
 242                         return 0;
 243                 }
 244         }
 245
 246         swp = DPAA2_PER_LCORE_PORTAL;
 247
 248         /* Check if there are atomic contexts to be released */
 249         while (DPAA2_PER_LCORE_DPIO->dqrr_size) {
 250                 if (DPAA2_PER_LCORE_DPIO->dqrr_held & (1 << i)) {
 251                         dq = qbman_get_dqrr_from_idx(swp, i);
 252                         qbman_swp_dqrr_consume(swp, dq);
 253                         DPAA2_PER_LCORE_DPIO->dqrr_size--;
 254                 }
 255                 i++;
 256         }
 257         DPAA2_PER_LCORE_DPIO->dqrr_held = 0;
 258
 259         do {
 260                 dq = qbman_swp_dqrr_next(swp);
 261                 if (!dq) {
 262                         if (!num_pkts && timeout_ticks) {
 263                                 dpaa2_eventdev_dequeue_wait(timeout_ticks);
 264                                 timeout_ticks = 0;
 265                                 continue;
 266                         }
 267                         return num_pkts;
 268                 }
 269
 270                 fd = qbman_result_DQ_fd(dq);
 271
 272                 rxq = (struct dpaa2_queue *)qbman_result_DQ_fqd_ctx(dq);
 273                 if (rxq) {
 274                         rxq->cb(swp, fd, dq, rxq, &ev[num_pkts]);
 275                 } else {
 276                         qbman_swp_dqrr_consume(swp, dq);
 277                         PMD_DRV_LOG(ERR, "Null Return VQ received\n");
 278                         return 0;
 279                 }
 280
 281                 num_pkts++;
 282         } while (num_pkts < nb_events);
 283
 284         return num_pkts;
 285 }
 286
 287 static uint16_t
 288 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
 289                        uint64_t timeout_ticks)
 290 {
 291         return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
 292 }
 293
 294 static void
 295 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
 296                         struct rte_event_dev_info *dev_info)
 297 {
 298         struct dpaa2_eventdev *priv = dev->data->dev_private;
 299
 300         PMD_DRV_FUNC_TRACE();
 301
 302         RTE_SET_USED(dev);
 303
 304         memset(dev_info, 0, sizeof(struct rte_event_dev_info));
 305         dev_info->min_dequeue_timeout_ns =
 306                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 307         dev_info->max_dequeue_timeout_ns =
 308                 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
 309         dev_info->dequeue_timeout_ns =
 310                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 311         dev_info->max_event_queues = priv->max_event_queues;
 312         dev_info->max_event_queue_flows =
 313                 DPAA2_EVENT_MAX_QUEUE_FLOWS;
 314         dev_info->max_event_queue_priority_levels =
 315                 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
 316         dev_info->max_event_priority_levels =
 317                 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
 318         dev_info->max_event_ports = RTE_MAX_LCORE;
 319         dev_info->max_event_port_dequeue_depth =
 320                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 321         dev_info->max_event_port_enqueue_depth =
 322                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 323         dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
 324         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
 325                 RTE_EVENT_DEV_CAP_BURST_MODE;
 326 }
 327
 328 static int
 329 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
 330 {
 331         struct dpaa2_eventdev *priv = dev->data->dev_private;
 332         struct rte_event_dev_config *conf = &dev->data->dev_conf;
 333
 334         PMD_DRV_FUNC_TRACE();
 335
 336         priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
 337         priv->nb_event_queues = conf->nb_event_queues;
 338         priv->nb_event_ports = conf->nb_event_ports;
 339         priv->nb_event_queue_flows = conf->nb_event_queue_flows;
 340         priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
 341         priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
 342         priv->event_dev_cfg = conf->event_dev_cfg;
 343
 344         PMD_DRV_LOG(DEBUG, "Configured eventdev devid=%d", dev->data->dev_id);
 345         return 0;
 346 }
 347
 348 static int
 349 dpaa2_eventdev_start(struct rte_eventdev *dev)
 350 {
 351         PMD_DRV_FUNC_TRACE();
 352
 353         RTE_SET_USED(dev);
 354
 355         return 0;
 356 }
 357
 358 static void
 359 dpaa2_eventdev_stop(struct rte_eventdev *dev)
 360 {
 361         PMD_DRV_FUNC_TRACE();
 362
 363         RTE_SET_USED(dev);
 364 }
 365
 366 static int
 367 dpaa2_eventdev_close(struct rte_eventdev *dev)
 368 {
 369         PMD_DRV_FUNC_TRACE();
 370
 371         RTE_SET_USED(dev);
 372
 373         return 0;
 374 }
 375
 376 static void
 377 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
 378                               struct rte_event_queue_conf *queue_conf)
 379 {
 380         PMD_DRV_FUNC_TRACE();
 381
 382         RTE_SET_USED(dev);
 383         RTE_SET_USED(queue_id);
 384         RTE_SET_USED(queue_conf);
 385
 386         queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
 387         queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY |
 388                                       RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
 389         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 390 }
 391
 392 static void
 393 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
 394 {
 395         PMD_DRV_FUNC_TRACE();
 396
 397         RTE_SET_USED(dev);
 398         RTE_SET_USED(queue_id);
 399 }
 400
 401 static int
 402 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 403                            const struct rte_event_queue_conf *queue_conf)
 404 {
 405         struct dpaa2_eventdev *priv = dev->data->dev_private;
 406         struct evq_info_t *evq_info =
 407                 &priv->evq_info[queue_id];
 408
 409         PMD_DRV_FUNC_TRACE();
 410
 411         evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
 412
 413         return 0;
 414 }
 415
 416 static void
 417 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
 418                              struct rte_event_port_conf *port_conf)
 419 {
 420         PMD_DRV_FUNC_TRACE();
 421
 422         RTE_SET_USED(dev);
 423         RTE_SET_USED(port_id);
 424         RTE_SET_USED(port_conf);
 425
 426         port_conf->new_event_threshold =
 427                 DPAA2_EVENT_MAX_NUM_EVENTS;
 428         port_conf->dequeue_depth =
 429                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 430         port_conf->enqueue_depth =
 431                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 432 }
 433
 434 static void
 435 dpaa2_eventdev_port_release(void *port)
 436 {
 437         PMD_DRV_FUNC_TRACE();
 438
 439         RTE_SET_USED(port);
 440 }
 441
 442 static int
 443 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 444                           const struct rte_event_port_conf *port_conf)
 445 {
 446         PMD_DRV_FUNC_TRACE();
 447
 448         RTE_SET_USED(port_conf);
 449
 450         if (!dpaa2_io_portal[port_id].dpio_dev) {
 451                 dpaa2_io_portal[port_id].dpio_dev =
 452                                 dpaa2_get_qbman_swp(port_id);
 453                 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
 454                 if (!dpaa2_io_portal[port_id].dpio_dev)
 455                         return -1;
 456         }
 457
 458         dpaa2_io_portal[port_id].eventdev = dev;
 459         dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
 460         return 0;
 461 }
 462
 463 static int
 464 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 465                            uint8_t queues[], uint16_t nb_unlinks)
 466 {
 467         struct dpaa2_eventdev *priv = dev->data->dev_private;
 468         struct dpaa2_io_portal_t *dpaa2_portal = port;
 469         struct evq_info_t *evq_info;
 470         int i;
 471
 472         PMD_DRV_FUNC_TRACE();
 473
 474         for (i = 0; i < nb_unlinks; i++) {
 475                 evq_info = &priv->evq_info[queues[i]];
 476                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 477                                    evq_info->dpcon->channel_index, 0);
 478                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 479                                         0, dpaa2_portal->dpio_dev->token,
 480                         evq_info->dpcon->dpcon_id);
 481                 evq_info->link = 0;
 482         }
 483
 484         return (int)nb_unlinks;
 485 }
 486
 487 static int
 488 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
 489                          const uint8_t queues[], const uint8_t priorities[],
 490                         uint16_t nb_links)
 491 {
 492         struct dpaa2_eventdev *priv = dev->data->dev_private;
 493         struct dpaa2_io_portal_t *dpaa2_portal = port;
 494         struct evq_info_t *evq_info;
 495         uint8_t channel_index;
 496         int ret, i, n;
 497
 498         PMD_DRV_FUNC_TRACE();
 499
 500         for (i = 0; i < nb_links; i++) {
 501                 evq_info = &priv->evq_info[queues[i]];
 502                 if (evq_info->link)
 503                         continue;
 504
 505                 ret = dpio_add_static_dequeue_channel(
 506                         dpaa2_portal->dpio_dev->dpio,
 507                         CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
 508                         evq_info->dpcon->dpcon_id, &channel_index);
 509                 if (ret < 0) {
 510                         PMD_DRV_ERR("Static dequeue cfg failed with ret: %d\n",
 511                                     ret);
 512                         goto err;
 513                 }
 514
 515                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 516                                    channel_index, 1);
 517                 evq_info->dpcon->channel_index = channel_index;
 518                 evq_info->link = 1;
 519         }
 520
 521         RTE_SET_USED(priorities);
 522
 523         return (int)nb_links;
 524 err:
 525         for (n = 0; n < i; n++) {
 526                 evq_info = &priv->evq_info[queues[n]];
 527                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 528                                    evq_info->dpcon->channel_index, 0);
 529                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 530                                         0, dpaa2_portal->dpio_dev->token,
 531                         evq_info->dpcon->dpcon_id);
 532                 evq_info->link = 0;
 533         }
 534         return ret;
 535 }
 536
 537 static int
 538 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 539                              uint64_t *timeout_ticks)
 540 {
 541         uint32_t scale = 1;
 542
 543         PMD_DRV_FUNC_TRACE();
 544
 545         RTE_SET_USED(dev);
 546         *timeout_ticks = ns * scale;
 547
 548         return 0;
 549 }
 550
 551 static void
 552 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
 553 {
 554         PMD_DRV_FUNC_TRACE();
 555
 556         RTE_SET_USED(dev);
 557         RTE_SET_USED(f);
 558 }
 559
 560 static const struct rte_eventdev_ops dpaa2_eventdev_ops = {
 561         .dev_infos_get    = dpaa2_eventdev_info_get,
 562         .dev_configure    = dpaa2_eventdev_configure,
 563         .dev_start        = dpaa2_eventdev_start,
 564         .dev_stop         = dpaa2_eventdev_stop,
 565         .dev_close        = dpaa2_eventdev_close,
 566         .queue_def_conf   = dpaa2_eventdev_queue_def_conf,
 567         .queue_setup      = dpaa2_eventdev_queue_setup,
 568         .queue_release    = dpaa2_eventdev_queue_release,
 569         .port_def_conf    = dpaa2_eventdev_port_def_conf,
 570         .port_setup       = dpaa2_eventdev_port_setup,
 571         .port_release     = dpaa2_eventdev_port_release,
 572         .port_link        = dpaa2_eventdev_port_link,
 573         .port_unlink      = dpaa2_eventdev_port_unlink,
 574         .timeout_ticks    = dpaa2_eventdev_timeout_ticks,
 575         .dump             = dpaa2_eventdev_dump
 576 };
 577
 578 static int
 579 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
 580                           struct dpaa2_dpcon_dev *dpcon_dev)
 581 {
 582         struct dpci_rx_queue_cfg rx_queue_cfg;
 583         int ret, i;
 584
 585         /*Do settings to get the frame on a DPCON object*/
 586         rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
 587                   DPCI_QUEUE_OPT_USER_CTX;
 588         rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
 589         rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
 590         rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
 591
 592         dpci_dev->queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
 593                 dpaa2_eventdev_process_parallel;
 594         dpci_dev->queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
 595                 dpaa2_eventdev_process_atomic;
 596
 597         for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
 598                 rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
 599                 ret = dpci_set_rx_queue(&dpci_dev->dpci,
 600                                         CMD_PRI_LOW,
 601                                         dpci_dev->token, i,
 602                                         &rx_queue_cfg);
 603                 if (ret) {
 604                         PMD_DRV_LOG(ERR,
 605                                     "set_rx_q failed with err code: %d", ret);
 606                         return ret;
 607                 }
 608         }
 609         return 0;
 610 }
 611
 612 static int
 613 dpaa2_eventdev_create(const char *name)
 614 {
 615         struct rte_eventdev *eventdev;
 616         struct dpaa2_eventdev *priv;
 617         struct dpaa2_dpcon_dev *dpcon_dev = NULL;
 618         struct dpaa2_dpci_dev *dpci_dev = NULL;
 619         int ret;
 620
 621         eventdev = rte_event_pmd_vdev_init(name,
 622                                            sizeof(struct dpaa2_eventdev),
 623                                            rte_socket_id());
 624         if (eventdev == NULL) {
 625                 PMD_DRV_ERR("Failed to create eventdev vdev %s", name);
 626                 goto fail;
 627         }
 628
 629         eventdev->dev_ops       = &dpaa2_eventdev_ops;
 630         eventdev->schedule      = NULL;
 631         eventdev->enqueue       = dpaa2_eventdev_enqueue;
 632         eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
 633         eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
 634         eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
 635         eventdev->dequeue       = dpaa2_eventdev_dequeue;
 636         eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
 637
 638         /* For secondary processes, the primary has done all the work */
 639         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 640                 return 0;
 641
 642         priv = eventdev->data->dev_private;
 643         priv->max_event_queues = 0;
 644
 645         do {
 646                 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
 647                 if (!dpcon_dev)
 648                         break;
 649                 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
 650
 651                 dpci_dev = rte_dpaa2_alloc_dpci_dev();
 652                 if (!dpci_dev) {
 653                         rte_dpaa2_free_dpcon_dev(dpcon_dev);
 654                         break;
 655                 }
 656                 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
 657
 658                 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
 659                 if (ret) {
 660                         PMD_DRV_LOG(ERR,
 661                                     "dpci setup failed with err code: %d", ret);
 662                         return ret;
 663                 }
 664                 priv->max_event_queues++;
 665         } while (dpcon_dev && dpci_dev);
 666
 667         return 0;
 668 fail:
 669         return -EFAULT;
 670 }
 671
 672 static int
 673 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
 674 {
 675         const char *name;
 676
 677         name = rte_vdev_device_name(vdev);
 678         PMD_DRV_LOG(INFO, "Initializing %s", name);
 679         return dpaa2_eventdev_create(name);
 680 }
 681
 682 static int
 683 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
 684 {
 685         const char *name;
 686
 687         name = rte_vdev_device_name(vdev);
 688         PMD_DRV_LOG(INFO, "Closing %s", name);
 689
 690         return rte_event_pmd_vdev_uninit(name);
 691 }
 692
 693 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
 694         .probe = dpaa2_eventdev_probe,
 695         .remove = dpaa2_eventdev_remove
 696 };
 697
 698 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);