drivers/event/dpaa2/dpaa2_eventdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright 2017 NXP.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of NXP nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <assert.h>
  34 #include <stdio.h>
  35 #include <stdbool.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <sys/epoll.h>
  40
  41 #include <rte_atomic.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_debug.h>
  45 #include <rte_dev.h>
  46 #include <rte_eal.h>
  47 #include <rte_fslmc.h>
  48 #include <rte_lcore.h>
  49 #include <rte_log.h>
  50 #include <rte_malloc.h>
  51 #include <rte_memcpy.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_pci.h>
  55 #include <rte_vdev.h>
  56 #include <rte_ethdev.h>
  57 #include <rte_event_eth_rx_adapter.h>
  58
  59 #include <fslmc_vfio.h>
  60 #include <dpaa2_hw_pvt.h>
  61 #include <dpaa2_hw_mempool.h>
  62 #include <dpaa2_hw_dpio.h>
  63 #include <dpaa2_ethdev.h>
  64 #include "dpaa2_eventdev.h"
  65 #include <portal/dpaa2_hw_pvt.h>
  66 #include <mc/fsl_dpci.h>
  67
  68 /* Clarifications
  69  * Evendev = SoC Instance
  70  * Eventport = DPIO Instance
  71  * Eventqueue = DPCON Instance
  72  * 1 Eventdev can have N Eventqueue
  73  * Soft Event Flow is DPCI Instance
  74  */
  75
  76 static uint16_t
  77 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
  78                              uint16_t nb_events)
  79 {
  80         struct rte_eventdev *ev_dev =
  81                         ((struct dpaa2_io_portal_t *)port)->eventdev;
  82         struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
  83         uint32_t queue_id = ev[0].queue_id;
  84         struct evq_info_t *evq_info = &priv->evq_info[queue_id];
  85         uint32_t fqid;
  86         struct qbman_swp *swp;
  87         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
  88         uint32_t loop, frames_to_send;
  89         struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
  90         uint16_t num_tx = 0;
  91         int ret;
  92
  93         RTE_SET_USED(port);
  94
  95         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
  96                 ret = dpaa2_affine_qbman_swp();
  97                 if (ret) {
  98                         PMD_DRV_LOG(ERR, "Failure in affining portal\n");
  99                         return 0;
 100                 }
 101         }
 102
 103         swp = DPAA2_PER_LCORE_PORTAL;
 104
 105         while (nb_events) {
 106                 frames_to_send = (nb_events >> 3) ?
 107                         MAX_TX_RING_SLOTS : nb_events;
 108
 109                 for (loop = 0; loop < frames_to_send; loop++) {
 110                         const struct rte_event *event = &ev[num_tx + loop];
 111
 112                         if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
 113                                 fqid = evq_info->dpci->queue[
 114                                         DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
 115                         else
 116                                 fqid = evq_info->dpci->queue[
 117                                         DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
 118
 119                         /* Prepare enqueue descriptor */
 120                         qbman_eq_desc_clear(&eqdesc[loop]);
 121                         qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
 122                         qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
 123                         qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
 124
 125                         if (event->impl_opaque) {
 126                                 uint8_t dqrr_index = event->impl_opaque - 1;
 127
 128                                 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
 129                                                       dqrr_index, 0);
 130                                 DPAA2_PER_LCORE_DPIO->dqrr_size--;
 131                                 DPAA2_PER_LCORE_DPIO->dqrr_held &=
 132                                         ~(1 << dqrr_index);
 133                         }
 134
 135                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 136
 137                         /*
 138                          * todo - need to align with hw context data
 139                          * to avoid copy
 140                          */
 141                         struct rte_event *ev_temp = rte_malloc(NULL,
 142                                 sizeof(struct rte_event), 0);
 143                         rte_memcpy(ev_temp, event, sizeof(struct rte_event));
 144                         DPAA2_SET_FD_ADDR((&fd_arr[loop]), ev_temp);
 145                         DPAA2_SET_FD_LEN((&fd_arr[loop]),
 146                                          sizeof(struct rte_event));
 147                 }
 148                 loop = 0;
 149                 while (loop < frames_to_send) {
 150                         loop += qbman_swp_enqueue_multiple_desc(swp,
 151                                         &eqdesc[loop], &fd_arr[loop],
 152                                         frames_to_send - loop);
 153                 }
 154                 num_tx += frames_to_send;
 155                 nb_events -= frames_to_send;
 156         }
 157
 158         return num_tx;
 159 }
 160
 161 static uint16_t
 162 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
 163 {
 164         return dpaa2_eventdev_enqueue_burst(port, ev, 1);
 165 }
 166
 167 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
 168 {
 169         struct epoll_event epoll_ev;
 170         int ret, i = 0;
 171
 172         qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
 173                                          QBMAN_SWP_INTERRUPT_DQRI);
 174
 175 RETRY:
 176         ret = epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
 177                          &epoll_ev, 1, timeout_ticks);
 178         if (ret < 1) {
 179                 /* sometimes due to some spurious interrupts epoll_wait fails
 180                  * with errno EINTR. so here we are retrying epoll_wait in such
 181                  * case to avoid the problem.
 182                  */
 183                 if (errno == EINTR) {
 184                         PMD_DRV_LOG(DEBUG, "epoll_wait fails\n");
 185                         if (i++ > 10)
 186                                 PMD_DRV_LOG(DEBUG, "Dequeue burst Failed\n");
 187                 goto RETRY;
 188                 }
 189         }
 190 }
 191
 192 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
 193                                             const struct qbman_fd *fd,
 194                                             const struct qbman_result *dq,
 195                                             struct dpaa2_queue *rxq,
 196                                             struct rte_event *ev)
 197 {
 198         struct rte_event *ev_temp =
 199                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 200
 201         RTE_SET_USED(rxq);
 202
 203         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 204         rte_free(ev_temp);
 205
 206         qbman_swp_dqrr_consume(swp, dq);
 207 }
 208
 209 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
 210                                           const struct qbman_fd *fd,
 211                                           const struct qbman_result *dq,
 212                                           struct dpaa2_queue *rxq,
 213                                           struct rte_event *ev)
 214 {
 215         struct rte_event *ev_temp =
 216                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 217         uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
 218
 219         RTE_SET_USED(swp);
 220         RTE_SET_USED(rxq);
 221
 222         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 223         rte_free(ev_temp);
 224         ev->impl_opaque = dqrr_index + 1;
 225         DPAA2_PER_LCORE_DPIO->dqrr_size++;
 226         DPAA2_PER_LCORE_DPIO->dqrr_held |= 1 << dqrr_index;
 227 }
 228
 229 static uint16_t
 230 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
 231                              uint16_t nb_events, uint64_t timeout_ticks)
 232 {
 233         const struct qbman_result *dq;
 234         struct qbman_swp *swp;
 235         const struct qbman_fd *fd;
 236         struct dpaa2_queue *rxq;
 237         int num_pkts = 0, ret, i = 0;
 238
 239         RTE_SET_USED(port);
 240
 241         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 242                 ret = dpaa2_affine_qbman_swp();
 243                 if (ret) {
 244                         PMD_DRV_LOG(ERR, "Failure in affining portal\n");
 245                         return 0;
 246                 }
 247         }
 248
 249         swp = DPAA2_PER_LCORE_PORTAL;
 250
 251         /* Check if there are atomic contexts to be released */
 252         while (DPAA2_PER_LCORE_DPIO->dqrr_size) {
 253                 if (DPAA2_PER_LCORE_DPIO->dqrr_held & (1 << i)) {
 254                         dq = qbman_get_dqrr_from_idx(swp, i);
 255                         qbman_swp_dqrr_consume(swp, dq);
 256                         DPAA2_PER_LCORE_DPIO->dqrr_size--;
 257                 }
 258                 i++;
 259         }
 260         DPAA2_PER_LCORE_DPIO->dqrr_held = 0;
 261
 262         do {
 263                 dq = qbman_swp_dqrr_next(swp);
 264                 if (!dq) {
 265                         if (!num_pkts && timeout_ticks) {
 266                                 dpaa2_eventdev_dequeue_wait(timeout_ticks);
 267                                 timeout_ticks = 0;
 268                                 continue;
 269                         }
 270                         return num_pkts;
 271                 }
 272
 273                 fd = qbman_result_DQ_fd(dq);
 274
 275                 rxq = (struct dpaa2_queue *)qbman_result_DQ_fqd_ctx(dq);
 276                 if (rxq) {
 277                         rxq->cb(swp, fd, dq, rxq, &ev[num_pkts]);
 278                 } else {
 279                         qbman_swp_dqrr_consume(swp, dq);
 280                         PMD_DRV_LOG(ERR, "Null Return VQ received\n");
 281                         return 0;
 282                 }
 283
 284                 num_pkts++;
 285         } while (num_pkts < nb_events);
 286
 287         return num_pkts;
 288 }
 289
 290 static uint16_t
 291 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
 292                        uint64_t timeout_ticks)
 293 {
 294         return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
 295 }
 296
 297 static void
 298 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
 299                         struct rte_event_dev_info *dev_info)
 300 {
 301         struct dpaa2_eventdev *priv = dev->data->dev_private;
 302
 303         PMD_DRV_FUNC_TRACE();
 304
 305         RTE_SET_USED(dev);
 306
 307         memset(dev_info, 0, sizeof(struct rte_event_dev_info));
 308         dev_info->min_dequeue_timeout_ns =
 309                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 310         dev_info->max_dequeue_timeout_ns =
 311                 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
 312         dev_info->dequeue_timeout_ns =
 313                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 314         dev_info->max_event_queues = priv->max_event_queues;
 315         dev_info->max_event_queue_flows =
 316                 DPAA2_EVENT_MAX_QUEUE_FLOWS;
 317         dev_info->max_event_queue_priority_levels =
 318                 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
 319         dev_info->max_event_priority_levels =
 320                 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
 321         dev_info->max_event_ports = RTE_MAX_LCORE;
 322         dev_info->max_event_port_dequeue_depth =
 323                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 324         dev_info->max_event_port_enqueue_depth =
 325                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 326         dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
 327         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
 328                 RTE_EVENT_DEV_CAP_BURST_MODE;
 329 }
 330
 331 static int
 332 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
 333 {
 334         struct dpaa2_eventdev *priv = dev->data->dev_private;
 335         struct rte_event_dev_config *conf = &dev->data->dev_conf;
 336
 337         PMD_DRV_FUNC_TRACE();
 338
 339         priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
 340         priv->nb_event_queues = conf->nb_event_queues;
 341         priv->nb_event_ports = conf->nb_event_ports;
 342         priv->nb_event_queue_flows = conf->nb_event_queue_flows;
 343         priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
 344         priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
 345         priv->event_dev_cfg = conf->event_dev_cfg;
 346
 347         PMD_DRV_LOG(DEBUG, "Configured eventdev devid=%d", dev->data->dev_id);
 348         return 0;
 349 }
 350
 351 static int
 352 dpaa2_eventdev_start(struct rte_eventdev *dev)
 353 {
 354         PMD_DRV_FUNC_TRACE();
 355
 356         RTE_SET_USED(dev);
 357
 358         return 0;
 359 }
 360
 361 static void
 362 dpaa2_eventdev_stop(struct rte_eventdev *dev)
 363 {
 364         PMD_DRV_FUNC_TRACE();
 365
 366         RTE_SET_USED(dev);
 367 }
 368
 369 static int
 370 dpaa2_eventdev_close(struct rte_eventdev *dev)
 371 {
 372         PMD_DRV_FUNC_TRACE();
 373
 374         RTE_SET_USED(dev);
 375
 376         return 0;
 377 }
 378
 379 static void
 380 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
 381                               struct rte_event_queue_conf *queue_conf)
 382 {
 383         PMD_DRV_FUNC_TRACE();
 384
 385         RTE_SET_USED(dev);
 386         RTE_SET_USED(queue_id);
 387         RTE_SET_USED(queue_conf);
 388
 389         queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
 390         queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY |
 391                                       RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
 392         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 393 }
 394
 395 static void
 396 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
 397 {
 398         PMD_DRV_FUNC_TRACE();
 399
 400         RTE_SET_USED(dev);
 401         RTE_SET_USED(queue_id);
 402 }
 403
 404 static int
 405 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 406                            const struct rte_event_queue_conf *queue_conf)
 407 {
 408         struct dpaa2_eventdev *priv = dev->data->dev_private;
 409         struct evq_info_t *evq_info =
 410                 &priv->evq_info[queue_id];
 411
 412         PMD_DRV_FUNC_TRACE();
 413
 414         evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
 415
 416         return 0;
 417 }
 418
 419 static void
 420 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
 421                              struct rte_event_port_conf *port_conf)
 422 {
 423         PMD_DRV_FUNC_TRACE();
 424
 425         RTE_SET_USED(dev);
 426         RTE_SET_USED(port_id);
 427         RTE_SET_USED(port_conf);
 428
 429         port_conf->new_event_threshold =
 430                 DPAA2_EVENT_MAX_NUM_EVENTS;
 431         port_conf->dequeue_depth =
 432                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 433         port_conf->enqueue_depth =
 434                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 435 }
 436
 437 static void
 438 dpaa2_eventdev_port_release(void *port)
 439 {
 440         PMD_DRV_FUNC_TRACE();
 441
 442         RTE_SET_USED(port);
 443 }
 444
 445 static int
 446 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 447                           const struct rte_event_port_conf *port_conf)
 448 {
 449         PMD_DRV_FUNC_TRACE();
 450
 451         RTE_SET_USED(port_conf);
 452
 453         if (!dpaa2_io_portal[port_id].dpio_dev) {
 454                 dpaa2_io_portal[port_id].dpio_dev =
 455                                 dpaa2_get_qbman_swp(port_id);
 456                 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
 457                 if (!dpaa2_io_portal[port_id].dpio_dev)
 458                         return -1;
 459         }
 460
 461         dpaa2_io_portal[port_id].eventdev = dev;
 462         dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
 463         return 0;
 464 }
 465
 466 static int
 467 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 468                            uint8_t queues[], uint16_t nb_unlinks)
 469 {
 470         struct dpaa2_eventdev *priv = dev->data->dev_private;
 471         struct dpaa2_io_portal_t *dpaa2_portal = port;
 472         struct evq_info_t *evq_info;
 473         int i;
 474
 475         PMD_DRV_FUNC_TRACE();
 476
 477         for (i = 0; i < nb_unlinks; i++) {
 478                 evq_info = &priv->evq_info[queues[i]];
 479                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 480                                    evq_info->dpcon->channel_index, 0);
 481                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 482                                         0, dpaa2_portal->dpio_dev->token,
 483                         evq_info->dpcon->dpcon_id);
 484                 evq_info->link = 0;
 485         }
 486
 487         return (int)nb_unlinks;
 488 }
 489
 490 static int
 491 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
 492                          const uint8_t queues[], const uint8_t priorities[],
 493                         uint16_t nb_links)
 494 {
 495         struct dpaa2_eventdev *priv = dev->data->dev_private;
 496         struct dpaa2_io_portal_t *dpaa2_portal = port;
 497         struct evq_info_t *evq_info;
 498         uint8_t channel_index;
 499         int ret, i, n;
 500
 501         PMD_DRV_FUNC_TRACE();
 502
 503         for (i = 0; i < nb_links; i++) {
 504                 evq_info = &priv->evq_info[queues[i]];
 505                 if (evq_info->link)
 506                         continue;
 507
 508                 ret = dpio_add_static_dequeue_channel(
 509                         dpaa2_portal->dpio_dev->dpio,
 510                         CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
 511                         evq_info->dpcon->dpcon_id, &channel_index);
 512                 if (ret < 0) {
 513                         PMD_DRV_ERR("Static dequeue cfg failed with ret: %d\n",
 514                                     ret);
 515                         goto err;
 516                 }
 517
 518                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 519                                    channel_index, 1);
 520                 evq_info->dpcon->channel_index = channel_index;
 521                 evq_info->link = 1;
 522         }
 523
 524         RTE_SET_USED(priorities);
 525
 526         return (int)nb_links;
 527 err:
 528         for (n = 0; n < i; n++) {
 529                 evq_info = &priv->evq_info[queues[n]];
 530                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 531                                    evq_info->dpcon->channel_index, 0);
 532                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 533                                         0, dpaa2_portal->dpio_dev->token,
 534                         evq_info->dpcon->dpcon_id);
 535                 evq_info->link = 0;
 536         }
 537         return ret;
 538 }
 539
 540 static int
 541 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 542                              uint64_t *timeout_ticks)
 543 {
 544         uint32_t scale = 1;
 545
 546         PMD_DRV_FUNC_TRACE();
 547
 548         RTE_SET_USED(dev);
 549         *timeout_ticks = ns * scale;
 550
 551         return 0;
 552 }
 553
 554 static void
 555 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
 556 {
 557         PMD_DRV_FUNC_TRACE();
 558
 559         RTE_SET_USED(dev);
 560         RTE_SET_USED(f);
 561 }
 562
 563 static int
 564 dpaa2_eventdev_eth_caps_get(const struct rte_eventdev *dev,
 565                             const struct rte_eth_dev *eth_dev,
 566                             uint32_t *caps)
 567 {
 568         const char *ethdev_driver = eth_dev->device->driver->name;
 569
 570         PMD_DRV_FUNC_TRACE();
 571
 572         RTE_SET_USED(dev);
 573
 574         if (!strcmp(ethdev_driver, "net_dpaa2"))
 575                 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP;
 576         else
 577                 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
 578
 579         return 0;
 580 }
 581
 582 static int
 583 dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev,
 584                 const struct rte_eth_dev *eth_dev,
 585                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 586 {
 587         struct dpaa2_eventdev *priv = dev->data->dev_private;
 588         uint8_t ev_qid = queue_conf->ev.queue_id;
 589         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 590         int i, ret;
 591
 592         PMD_DRV_FUNC_TRACE();
 593
 594         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 595                 ret = dpaa2_eth_eventq_attach(eth_dev, i,
 596                                 dpcon_id, queue_conf);
 597                 if (ret) {
 598                         PMD_DRV_ERR("dpaa2_eth_eventq_attach failed: ret %d\n",
 599                                     ret);
 600                         goto fail;
 601                 }
 602         }
 603         return 0;
 604 fail:
 605         for (i = (i - 1); i >= 0 ; i--)
 606                 dpaa2_eth_eventq_detach(eth_dev, i);
 607
 608         return ret;
 609 }
 610
 611 static int
 612 dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
 613                 const struct rte_eth_dev *eth_dev,
 614                 int32_t rx_queue_id,
 615                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 616 {
 617         struct dpaa2_eventdev *priv = dev->data->dev_private;
 618         uint8_t ev_qid = queue_conf->ev.queue_id;
 619         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 620         int ret;
 621
 622         PMD_DRV_FUNC_TRACE();
 623
 624         if (rx_queue_id == -1)
 625                 return dpaa2_eventdev_eth_queue_add_all(dev,
 626                                 eth_dev, queue_conf);
 627
 628         ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
 629                         dpcon_id, queue_conf);
 630         if (ret) {
 631                 PMD_DRV_ERR("dpaa2_eth_eventq_attach failed: ret: %d\n", ret);
 632                 return ret;
 633         }
 634         return 0;
 635 }
 636
 637 static int
 638 dpaa2_eventdev_eth_queue_del_all(const struct rte_eventdev *dev,
 639                              const struct rte_eth_dev *eth_dev)
 640 {
 641         int i, ret;
 642
 643         PMD_DRV_FUNC_TRACE();
 644
 645         RTE_SET_USED(dev);
 646
 647         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 648                 ret = dpaa2_eth_eventq_detach(eth_dev, i);
 649                 if (ret) {
 650                         PMD_DRV_ERR("dpaa2_eth_eventq_detach failed: ret %d\n",
 651                                     ret);
 652                         return ret;
 653                 }
 654         }
 655
 656         return 0;
 657 }
 658
 659 static int
 660 dpaa2_eventdev_eth_queue_del(const struct rte_eventdev *dev,
 661                              const struct rte_eth_dev *eth_dev,
 662                              int32_t rx_queue_id)
 663 {
 664         int ret;
 665
 666         PMD_DRV_FUNC_TRACE();
 667
 668         if (rx_queue_id == -1)
 669                 return dpaa2_eventdev_eth_queue_del_all(dev, eth_dev);
 670
 671         ret = dpaa2_eth_eventq_detach(eth_dev, rx_queue_id);
 672         if (ret) {
 673                 PMD_DRV_ERR("dpaa2_eth_eventq_detach failed: ret: %d\n", ret);
 674                 return ret;
 675         }
 676
 677         return 0;
 678 }
 679
 680 static int
 681 dpaa2_eventdev_eth_start(const struct rte_eventdev *dev,
 682                          const struct rte_eth_dev *eth_dev)
 683 {
 684         PMD_DRV_FUNC_TRACE();
 685
 686         RTE_SET_USED(dev);
 687         RTE_SET_USED(eth_dev);
 688
 689         return 0;
 690 }
 691
 692 static int
 693 dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
 694                         const struct rte_eth_dev *eth_dev)
 695 {
 696         PMD_DRV_FUNC_TRACE();
 697
 698         RTE_SET_USED(dev);
 699         RTE_SET_USED(eth_dev);
 700
 701         return 0;
 702 }
 703
 704 static const struct rte_eventdev_ops dpaa2_eventdev_ops = {
 705         .dev_infos_get    = dpaa2_eventdev_info_get,
 706         .dev_configure    = dpaa2_eventdev_configure,
 707         .dev_start        = dpaa2_eventdev_start,
 708         .dev_stop         = dpaa2_eventdev_stop,
 709         .dev_close        = dpaa2_eventdev_close,
 710         .queue_def_conf   = dpaa2_eventdev_queue_def_conf,
 711         .queue_setup      = dpaa2_eventdev_queue_setup,
 712         .queue_release    = dpaa2_eventdev_queue_release,
 713         .port_def_conf    = dpaa2_eventdev_port_def_conf,
 714         .port_setup       = dpaa2_eventdev_port_setup,
 715         .port_release     = dpaa2_eventdev_port_release,
 716         .port_link        = dpaa2_eventdev_port_link,
 717         .port_unlink      = dpaa2_eventdev_port_unlink,
 718         .timeout_ticks    = dpaa2_eventdev_timeout_ticks,
 719         .dump             = dpaa2_eventdev_dump,
 720         .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get,
 721         .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add,
 722         .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
 723         .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
 724         .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
 725 };
 726
 727 static int
 728 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
 729                           struct dpaa2_dpcon_dev *dpcon_dev)
 730 {
 731         struct dpci_rx_queue_cfg rx_queue_cfg;
 732         int ret, i;
 733
 734         /*Do settings to get the frame on a DPCON object*/
 735         rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
 736                   DPCI_QUEUE_OPT_USER_CTX;
 737         rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
 738         rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
 739         rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
 740
 741         dpci_dev->queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
 742                 dpaa2_eventdev_process_parallel;
 743         dpci_dev->queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
 744                 dpaa2_eventdev_process_atomic;
 745
 746         for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
 747                 rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
 748                 ret = dpci_set_rx_queue(&dpci_dev->dpci,
 749                                         CMD_PRI_LOW,
 750                                         dpci_dev->token, i,
 751                                         &rx_queue_cfg);
 752                 if (ret) {
 753                         PMD_DRV_LOG(ERR,
 754                                     "set_rx_q failed with err code: %d", ret);
 755                         return ret;
 756                 }
 757         }
 758         return 0;
 759 }
 760
 761 static int
 762 dpaa2_eventdev_create(const char *name)
 763 {
 764         struct rte_eventdev *eventdev;
 765         struct dpaa2_eventdev *priv;
 766         struct dpaa2_dpcon_dev *dpcon_dev = NULL;
 767         struct dpaa2_dpci_dev *dpci_dev = NULL;
 768         int ret;
 769
 770         eventdev = rte_event_pmd_vdev_init(name,
 771                                            sizeof(struct dpaa2_eventdev),
 772                                            rte_socket_id());
 773         if (eventdev == NULL) {
 774                 PMD_DRV_ERR("Failed to create eventdev vdev %s", name);
 775                 goto fail;
 776         }
 777
 778         eventdev->dev_ops       = &dpaa2_eventdev_ops;
 779         eventdev->schedule      = NULL;
 780         eventdev->enqueue       = dpaa2_eventdev_enqueue;
 781         eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
 782         eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
 783         eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
 784         eventdev->dequeue       = dpaa2_eventdev_dequeue;
 785         eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
 786
 787         /* For secondary processes, the primary has done all the work */
 788         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 789                 return 0;
 790
 791         priv = eventdev->data->dev_private;
 792         priv->max_event_queues = 0;
 793
 794         do {
 795                 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
 796                 if (!dpcon_dev)
 797                         break;
 798                 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
 799
 800                 dpci_dev = rte_dpaa2_alloc_dpci_dev();
 801                 if (!dpci_dev) {
 802                         rte_dpaa2_free_dpcon_dev(dpcon_dev);
 803                         break;
 804                 }
 805                 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
 806
 807                 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
 808                 if (ret) {
 809                         PMD_DRV_LOG(ERR,
 810                                     "dpci setup failed with err code: %d", ret);
 811                         return ret;
 812                 }
 813                 priv->max_event_queues++;
 814         } while (dpcon_dev && dpci_dev);
 815
 816         return 0;
 817 fail:
 818         return -EFAULT;
 819 }
 820
 821 static int
 822 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
 823 {
 824         const char *name;
 825
 826         name = rte_vdev_device_name(vdev);
 827         PMD_DRV_LOG(INFO, "Initializing %s", name);
 828         return dpaa2_eventdev_create(name);
 829 }
 830
 831 static int
 832 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
 833 {
 834         const char *name;
 835
 836         name = rte_vdev_device_name(vdev);
 837         PMD_DRV_LOG(INFO, "Closing %s", name);
 838
 839         return rte_event_pmd_vdev_uninit(name);
 840 }
 841
 842 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
 843         .probe = dpaa2_eventdev_probe,
 844         .remove = dpaa2_eventdev_remove
 845 };
 846
 847 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);