1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright 2017,2019 NXP
6 #ifndef __DPAA_MEMPOOL_H__
7 #define __DPAA_MEMPOOL_H__
15 #include <rte_mempool.h>
17 #include <rte_dpaa_bus.h>
18 #include <rte_dpaa_logs.h>
23 #define CPU_SPIN_BACKOFF_CYCLES 512
25 /* total number of bpools on SoC */
26 #define DPAA_MAX_BPOOLS 256
28 /* Maximum release/acquire from BMAN */
29 #define DPAA_MBUF_MAX_ACQ_REL 8
31 /* Buffers are allocated from single mem segment i.e. phys contiguous */
32 #define DPAA_MPOOL_SINGLE_SEGMENT 0x01
35 struct rte_mempool *mp;
39 uint32_t meta_data_size;
40 int32_t dpaa_ops_index;
46 DPAA_MEMPOOL_PTOV(struct dpaa_bp_info *bp_info __rte_unused, uint64_t addr)
48 return rte_dpaa_mem_ptov(addr);
51 #define DPAA_MEMPOOL_TO_POOL_INFO(__mp) \
52 ((struct dpaa_bp_info *)__mp->pool_data)
54 #define DPAA_MEMPOOL_TO_BPID(__mp) \
55 (((struct dpaa_bp_info *)__mp->pool_data)->bpid)
57 extern struct dpaa_bp_info *rte_dpaa_bpid_info;
59 #define DPAA_BPID_TO_POOL_INFO(__bpid) (&rte_dpaa_bpid_info[__bpid])