405d94deb524d5d6b0da77d2d7a2815ef998d6f1
[dpdk.git] / drivers / net / bnxt / bnxt.h
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) Broadcom Limited.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Broadcom Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #ifndef _BNXT_H_
35 #define _BNXT_H_
36
37 #include <inttypes.h>
38 #include <stdbool.h>
39 #include <sys/queue.h>
40
41 #include <rte_pci.h>
42 #include <rte_ethdev.h>
43 #include <rte_memory.h>
44 #include <rte_lcore.h>
45 #include <rte_spinlock.h>
46
47 #include "bnxt_cpr.h"
48
49 #define BNXT_MAX_MTU            9500
50 #define VLAN_TAG_SIZE           4
51 #define BNXT_MAX_LED            4
52
53 struct bnxt_led_info {
54         uint8_t      led_id;
55         uint8_t      led_type;
56         uint8_t      led_group_id;
57         uint8_t      unused;
58         uint16_t  led_state_caps;
59 #define BNXT_LED_ALT_BLINK_CAP(x)       ((x) &  \
60         rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
61
62         uint16_t  led_color_caps;
63 };
64
65 struct bnxt_led_cfg {
66         uint8_t led_id;
67         uint8_t led_state;
68         uint8_t led_color;
69         uint8_t unused;
70         uint16_t led_blink_on;
71         uint16_t led_blink_off;
72         uint8_t led_group_id;
73         uint8_t rsvd;
74 };
75
76 #define BNXT_LED_DFLT_ENA                               \
77         (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID |             \
78          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE |          \
79          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON |       \
80          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF |      \
81          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
82
83 #define BNXT_LED_DFLT_ENA_SHIFT         6
84
85 #define BNXT_LED_DFLT_ENABLES(x)                        \
86         rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
87
88 enum bnxt_hw_context {
89         HW_CONTEXT_NONE     = 0,
90         HW_CONTEXT_IS_RSS   = 1,
91         HW_CONTEXT_IS_COS   = 2,
92         HW_CONTEXT_IS_LB    = 3,
93 };
94
95 struct bnxt_vlan_table_entry {
96         uint16_t                tpid;
97         uint16_t                vid;
98 } __attribute__((packed));
99
100 struct bnxt_vlan_antispoof_table_entry {
101         uint16_t                tpid;
102         uint16_t                vid;
103         uint16_t                mask;
104 } __attribute__((packed));
105
106 struct bnxt_child_vf_info {
107         void                    *req_buf;
108         struct bnxt_vlan_table_entry    *vlan_table;
109         struct bnxt_vlan_antispoof_table_entry  *vlan_as_table;
110         STAILQ_HEAD(, bnxt_filter_info) filter;
111         uint32_t                func_cfg_flags;
112         uint32_t                l2_rx_mask;
113         uint16_t                fid;
114         uint16_t                max_tx_rate;
115         uint16_t                dflt_vlan;
116         uint16_t                vlan_count;
117         uint8_t                 mac_spoof_en;
118         uint8_t                 vlan_spoof_en;
119         bool                    random_mac;
120         bool                    persist_stats;
121 };
122
123 struct bnxt_pf_info {
124 #define BNXT_FIRST_PF_FID       1
125 #define BNXT_MAX_VFS(bp)        (bp->pf.max_vfs)
126 #define BNXT_FIRST_VF_FID       128
127 #define BNXT_PF_RINGS_USED(bp)  bnxt_get_num_queues(bp)
128 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
129         uint8_t                 port_id;
130         uint16_t                first_vf_id;
131         uint16_t                active_vfs;
132         uint16_t                max_vfs;
133         uint32_t                func_cfg_flags;
134         void                    *vf_req_buf;
135         phys_addr_t             vf_req_buf_dma_addr;
136         uint32_t                vf_req_fwd[8];
137         uint16_t                total_vnics;
138         struct bnxt_child_vf_info       *vf_info;
139 #define BNXT_EVB_MODE_NONE      0
140 #define BNXT_EVB_MODE_VEB       1
141 #define BNXT_EVB_MODE_VEPA      2
142         uint8_t                 evb_mode;
143 };
144
145 /* Max wait time is 10 * 100ms = 1s */
146 #define BNXT_LINK_WAIT_CNT      10
147 #define BNXT_LINK_WAIT_INTERVAL 100
148 struct bnxt_link_info {
149         uint32_t                phy_flags;
150         uint8_t                 mac_type;
151         uint8_t                 phy_link_status;
152         uint8_t                 loop_back;
153         uint8_t                 link_up;
154         uint8_t                 duplex;
155         uint8_t                 pause;
156         uint8_t                 force_pause;
157         uint8_t                 auto_pause;
158         uint8_t                 auto_mode;
159 #define PHY_VER_LEN             3
160         uint8_t                 phy_ver[PHY_VER_LEN];
161         uint16_t                link_speed;
162         uint16_t                support_speeds;
163         uint16_t                auto_link_speed;
164         uint16_t                auto_link_speed_mask;
165         uint32_t                preemphasis;
166 };
167
168 #define BNXT_COS_QUEUE_COUNT    8
169 struct bnxt_cos_queue_info {
170         uint8_t id;
171         uint8_t profile;
172 };
173
174 #define BNXT_HWRM_SHORT_REQ_LEN         sizeof(struct hwrm_short_input)
175 struct bnxt {
176         void                            *bar0;
177
178         struct rte_eth_dev              *eth_dev;
179         struct rte_pci_device           *pdev;
180
181         uint32_t                flags;
182 #define BNXT_FLAG_REGISTERED    (1 << 0)
183 #define BNXT_FLAG_VF            (1 << 1)
184 #define BNXT_FLAG_PORT_STATS    (1 << 2)
185 #define BNXT_FLAG_JUMBO         (1 << 3)
186 #define BNXT_FLAG_SHORT_CMD     (1 << 4)
187 #define BNXT_PF(bp)             (!((bp)->flags & BNXT_FLAG_VF))
188 #define BNXT_VF(bp)             ((bp)->flags & BNXT_FLAG_VF)
189 #define BNXT_NPAR_ENABLED(bp)   ((bp)->port_partition_type)
190 #define BNXT_NPAR_PF(bp)        (BNXT_PF(bp) && BNXT_NPAR_ENABLED(bp))
191
192         unsigned int            rx_nr_rings;
193         unsigned int            rx_cp_nr_rings;
194         struct bnxt_rx_queue **rx_queues;
195         const void              *rx_mem_zone;
196         struct rx_port_stats    *hw_rx_port_stats;
197         phys_addr_t             hw_rx_port_stats_map;
198
199         unsigned int            tx_nr_rings;
200         unsigned int            tx_cp_nr_rings;
201         struct bnxt_tx_queue **tx_queues;
202         const void              *tx_mem_zone;
203         struct tx_port_stats    *hw_tx_port_stats;
204         phys_addr_t             hw_tx_port_stats_map;
205
206         /* Default completion ring */
207         struct bnxt_cp_ring_info        *def_cp_ring;
208         uint32_t                max_ring_grps;
209         struct bnxt_ring_grp_info       *grp_info;
210
211         unsigned int            nr_vnics;
212
213         struct bnxt_vnic_info   *vnic_info;
214         STAILQ_HEAD(, bnxt_vnic_info)   free_vnic_list;
215
216         struct bnxt_filter_info *filter_info;
217         STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
218
219         /* VNIC pointer for flow filter (VMDq) pools */
220 #define MAX_FF_POOLS    ETH_64_POOLS
221         STAILQ_HEAD(, bnxt_vnic_info)   ff_pool[MAX_FF_POOLS];
222
223         struct bnxt_irq         *irq_tbl;
224
225 #define MAX_NUM_MAC_ADDR        32
226         uint8_t                 mac_addr[ETHER_ADDR_LEN];
227
228         uint16_t                        hwrm_cmd_seq;
229         void                            *hwrm_cmd_resp_addr;
230         phys_addr_t                     hwrm_cmd_resp_dma_addr;
231         void                            *hwrm_short_cmd_req_addr;
232         phys_addr_t                     hwrm_short_cmd_req_dma_addr;
233         rte_spinlock_t                  hwrm_lock;
234         uint16_t                        max_req_len;
235         uint16_t                        max_resp_len;
236
237         struct bnxt_link_info   link_info;
238         struct bnxt_cos_queue_info      cos_queue[BNXT_COS_QUEUE_COUNT];
239
240         uint16_t                fw_fid;
241         uint8_t                 dflt_mac_addr[ETHER_ADDR_LEN];
242         uint16_t                max_rsscos_ctx;
243         uint16_t                max_cp_rings;
244         uint16_t                max_tx_rings;
245         uint16_t                max_rx_rings;
246         uint16_t                max_l2_ctx;
247         uint16_t                max_vnics;
248         uint16_t                max_stat_ctx;
249         uint16_t                vlan;
250         struct bnxt_pf_info             pf;
251         uint8_t                 port_partition_type;
252         uint8_t                 dev_stopped;
253         uint8_t                 vxlan_port_cnt;
254         uint8_t                 geneve_port_cnt;
255         uint16_t                vxlan_port;
256         uint16_t                geneve_port;
257         uint16_t                vxlan_fw_dst_port_id;
258         uint16_t                geneve_fw_dst_port_id;
259         uint32_t                fw_ver;
260         rte_atomic64_t          rx_mbuf_alloc_fail;
261
262         struct bnxt_led_info    leds[BNXT_MAX_LED];
263         uint8_t                 num_leds;
264 };
265
266 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
267 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
268
269 #define RX_PROD_AGG_BD_TYPE_RX_PROD_AGG         0x6
270
271 bool is_bnxt_supported(struct rte_eth_dev *dev);
272 #endif