d39baf11aa86113de2353a1f974b207d21f78300
[dpdk.git] / drivers / net / bnxt / bnxt.h
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) Broadcom Limited.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Broadcom Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #ifndef _BNXT_H_
35 #define _BNXT_H_
36
37 #include <inttypes.h>
38 #include <stdbool.h>
39 #include <sys/queue.h>
40
41 #include <rte_ethdev.h>
42 #include <rte_memory.h>
43 #include <rte_lcore.h>
44 #include <rte_spinlock.h>
45
46 #include "bnxt_cpr.h"
47
48 #define BNXT_MAX_MTU            9500
49 #define VLAN_TAG_SIZE           4
50 #define BNXT_MAX_LED            4
51
52 struct bnxt_led_info {
53         uint8_t      led_id;
54         uint8_t      led_type;
55         uint8_t      led_group_id;
56         uint8_t      unused;
57         uint16_t  led_state_caps;
58 #define BNXT_LED_ALT_BLINK_CAP(x)       ((x) &  \
59         rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
60
61         uint16_t  led_color_caps;
62 };
63
64 struct bnxt_led_cfg {
65         uint8_t led_id;
66         uint8_t led_state;
67         uint8_t led_color;
68         uint8_t unused;
69         uint16_t led_blink_on;
70         uint16_t led_blink_off;
71         uint8_t led_group_id;
72         uint8_t rsvd;
73 };
74
75 #define BNXT_LED_DFLT_ENA                               \
76         (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID |             \
77          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE |          \
78          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON |       \
79          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF |      \
80          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
81
82 #define BNXT_LED_DFLT_ENA_SHIFT         6
83
84 #define BNXT_LED_DFLT_ENABLES(x)                        \
85         rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
86
87 enum bnxt_hw_context {
88         HW_CONTEXT_NONE     = 0,
89         HW_CONTEXT_IS_RSS   = 1,
90         HW_CONTEXT_IS_COS   = 2,
91         HW_CONTEXT_IS_LB    = 3,
92 };
93
94 struct bnxt_vlan_table_entry {
95         uint16_t                tpid;
96         uint16_t                vid;
97 } __attribute__((packed));
98
99 struct bnxt_child_vf_info {
100         void                    *req_buf;
101         struct bnxt_vlan_table_entry    *vlan_table;
102         STAILQ_HEAD(, bnxt_filter_info) filter;
103         uint32_t                func_cfg_flags;
104         uint32_t                l2_rx_mask;
105         uint16_t                fid;
106         uint16_t                max_tx_rate;
107         uint16_t                dflt_vlan;
108         uint16_t                vlan_count;
109         uint8_t                 mac_spoof_en;
110         uint8_t                 vlan_spoof_en;
111         bool                    random_mac;
112 };
113
114 struct bnxt_pf_info {
115 #define BNXT_FIRST_PF_FID       1
116 #define BNXT_MAX_VFS(bp)        (bp->pf.max_vfs)
117 #define BNXT_FIRST_VF_FID       128
118 #define BNXT_PF_RINGS_USED(bp)  bnxt_get_num_queues(bp)
119 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
120         uint8_t                 port_id;
121         uint16_t                first_vf_id;
122         uint16_t                active_vfs;
123         uint16_t                max_vfs;
124         uint32_t                func_cfg_flags;
125         void                    *vf_req_buf;
126         phys_addr_t             vf_req_buf_dma_addr;
127         uint32_t                vf_req_fwd[8];
128         uint16_t                total_vnics;
129         struct bnxt_child_vf_info       *vf_info;
130 #define BNXT_EVB_MODE_NONE      0
131 #define BNXT_EVB_MODE_VEB       1
132 #define BNXT_EVB_MODE_VEPA      2
133         uint8_t                 evb_mode;
134 };
135
136 /* Max wait time is 10 * 100ms = 1s */
137 #define BNXT_LINK_WAIT_CNT      10
138 #define BNXT_LINK_WAIT_INTERVAL 100
139 struct bnxt_link_info {
140         uint32_t                phy_flags;
141         uint8_t                 mac_type;
142         uint8_t                 phy_link_status;
143         uint8_t                 loop_back;
144         uint8_t                 link_up;
145         uint8_t                 duplex;
146         uint8_t                 pause;
147         uint8_t                 force_pause;
148         uint8_t                 auto_pause;
149         uint8_t                 auto_mode;
150 #define PHY_VER_LEN             3
151         uint8_t                 phy_ver[PHY_VER_LEN];
152         uint16_t                link_speed;
153         uint16_t                support_speeds;
154         uint16_t                auto_link_speed;
155         uint16_t                auto_link_speed_mask;
156         uint32_t                preemphasis;
157 };
158
159 #define BNXT_COS_QUEUE_COUNT    8
160 struct bnxt_cos_queue_info {
161         uint8_t id;
162         uint8_t profile;
163 };
164
165 #define BNXT_HWRM_SHORT_REQ_LEN         sizeof(struct hwrm_short_input)
166 struct bnxt {
167         void                            *bar0;
168
169         struct rte_eth_dev              *eth_dev;
170         struct rte_pci_device           *pdev;
171
172         uint32_t                flags;
173 #define BNXT_FLAG_REGISTERED    (1 << 0)
174 #define BNXT_FLAG_VF            (1 << 1)
175 #define BNXT_FLAG_PORT_STATS    (1 << 2)
176 #define BNXT_FLAG_JUMBO         (1 << 3)
177 #define BNXT_FLAG_SHORT_CMD     (1 << 4)
178 #define BNXT_PF(bp)             (!((bp)->flags & BNXT_FLAG_VF))
179 #define BNXT_VF(bp)             ((bp)->flags & BNXT_FLAG_VF)
180 #define BNXT_NPAR_ENABLED(bp)   ((bp)->port_partition_type)
181 #define BNXT_NPAR_PF(bp)        (BNXT_PF(bp) && BNXT_NPAR_ENABLED(bp))
182
183         unsigned int            rx_nr_rings;
184         unsigned int            rx_cp_nr_rings;
185         struct bnxt_rx_queue **rx_queues;
186         const void              *rx_mem_zone;
187         struct rx_port_stats    *hw_rx_port_stats;
188         phys_addr_t             hw_rx_port_stats_map;
189
190         unsigned int            tx_nr_rings;
191         unsigned int            tx_cp_nr_rings;
192         struct bnxt_tx_queue **tx_queues;
193         const void              *tx_mem_zone;
194         struct tx_port_stats    *hw_tx_port_stats;
195         phys_addr_t             hw_tx_port_stats_map;
196
197         /* Default completion ring */
198         struct bnxt_cp_ring_info        *def_cp_ring;
199         uint32_t                max_ring_grps;
200         struct bnxt_ring_grp_info       *grp_info;
201
202         unsigned int            nr_vnics;
203
204         struct bnxt_vnic_info   *vnic_info;
205         STAILQ_HEAD(, bnxt_vnic_info)   free_vnic_list;
206
207         struct bnxt_filter_info *filter_info;
208         STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
209
210         /* VNIC pointer for flow filter (VMDq) pools */
211 #define MAX_FF_POOLS    ETH_64_POOLS
212         STAILQ_HEAD(, bnxt_vnic_info)   ff_pool[MAX_FF_POOLS];
213
214         struct bnxt_irq         *irq_tbl;
215
216 #define MAX_NUM_MAC_ADDR        32
217         uint8_t                 mac_addr[ETHER_ADDR_LEN];
218
219         uint16_t                        hwrm_cmd_seq;
220         void                            *hwrm_cmd_resp_addr;
221         phys_addr_t                     hwrm_cmd_resp_dma_addr;
222         void                            *hwrm_short_cmd_req_addr;
223         phys_addr_t                     hwrm_short_cmd_req_dma_addr;
224         rte_spinlock_t                  hwrm_lock;
225         uint16_t                        max_req_len;
226         uint16_t                        max_resp_len;
227
228         struct bnxt_link_info   link_info;
229         struct bnxt_cos_queue_info      cos_queue[BNXT_COS_QUEUE_COUNT];
230
231         uint16_t                fw_fid;
232         uint8_t                 dflt_mac_addr[ETHER_ADDR_LEN];
233         uint16_t                max_rsscos_ctx;
234         uint16_t                max_cp_rings;
235         uint16_t                max_tx_rings;
236         uint16_t                max_rx_rings;
237         uint16_t                max_l2_ctx;
238         uint16_t                max_vnics;
239         uint16_t                max_stat_ctx;
240         uint16_t                vlan;
241         struct bnxt_pf_info             pf;
242         uint8_t                 port_partition_type;
243         uint8_t                 dev_stopped;
244         uint8_t                 vxlan_port_cnt;
245         uint8_t                 geneve_port_cnt;
246         uint16_t                vxlan_port;
247         uint16_t                geneve_port;
248         uint16_t                vxlan_fw_dst_port_id;
249         uint16_t                geneve_fw_dst_port_id;
250         uint32_t                fw_ver;
251         rte_atomic64_t          rx_mbuf_alloc_fail;
252
253         struct bnxt_led_info    leds[BNXT_MAX_LED];
254         uint8_t                 num_leds;
255 };
256
257 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
258 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
259
260 #define RX_PROD_AGG_BD_TYPE_RX_PROD_AGG         0x6
261
262 bool is_bnxt_supported(struct rte_eth_dev *dev);
263 #endif